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IB/hfi1: Read all firmware versions
Read the version of the SBus, PCIe SerDes, and Fabric Serdes firmwares at driver load time. Reviewed-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Dean Luick <dean.luick@intel.com> Signed-off-by: Dennis Dalessandro <dennis.dalessandro@intel.com> Signed-off-by: Doug Ledford <dledford@redhat.com>
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@ -8826,30 +8826,6 @@ static int write_tx_settings(struct hfi1_devdata *dd,
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return load_8051_config(dd, TX_SETTINGS, GENERAL_CONFIG, frame);
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}
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static void check_fabric_firmware_versions(struct hfi1_devdata *dd)
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{
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u32 frame, version, prod_id;
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int ret, lane;
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/* 4 lanes */
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for (lane = 0; lane < 4; lane++) {
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ret = read_8051_config(dd, SPICO_FW_VERSION, lane, &frame);
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if (ret) {
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dd_dev_err(dd,
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"Unable to read lane %d firmware details\n",
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lane);
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continue;
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}
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version = (frame >> SPICO_ROM_VERSION_SHIFT)
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& SPICO_ROM_VERSION_MASK;
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prod_id = (frame >> SPICO_ROM_PROD_ID_SHIFT)
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& SPICO_ROM_PROD_ID_MASK;
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dd_dev_info(dd,
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"Lane %d firmware: version 0x%04x, prod_id 0x%04x\n",
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lane, version, prod_id);
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}
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}
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/*
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* Read an idle LCB message.
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*
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@ -14621,7 +14597,6 @@ struct hfi1_devdata *hfi1_init_dd(struct pci_dev *pdev,
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ret = load_firmware(dd); /* asymmetric with dispose_firmware() */
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if (ret)
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goto bail_clear_intr;
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check_fabric_firmware_versions(dd);
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thermal_init(dd);
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@ -640,6 +640,7 @@ extern uint platform_config_load;
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/* SBus commands */
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#define RESET_SBUS_RECEIVER 0x20
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#define WRITE_SBUS_RECEIVER 0x21
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#define READ_SBUS_RECEIVER 0x22
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void sbus_request(struct hfi1_devdata *dd,
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u8 receiver_addr, u8 data_addr, u8 command, u32 data_in);
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int sbus_request_slow(struct hfi1_devdata *dd,
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@ -471,6 +471,10 @@
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#define ASIC_STS_SBUS_RESULT (ASIC + 0x000000000010)
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#define ASIC_STS_SBUS_RESULT_DONE_SMASK 0x1ull
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#define ASIC_STS_SBUS_RESULT_RCV_DATA_VALID_SMASK 0x2ull
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#define ASIC_STS_SBUS_RESULT_RESULT_CODE_SHIFT 2
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#define ASIC_STS_SBUS_RESULT_RESULT_CODE_MASK 0x7ull
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#define ASIC_STS_SBUS_RESULT_DATA_OUT_SHIFT 32
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#define ASIC_STS_SBUS_RESULT_DATA_OUT_MASK 0xFFFFFFFFull
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#define ASIC_STS_THERM (ASIC + 0x000000000058)
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#define ASIC_STS_THERM_CRIT_TEMP_MASK 0x7FFull
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#define ASIC_STS_THERM_CRIT_TEMP_SHIFT 18
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@ -206,6 +206,9 @@ static const struct firmware *platform_config;
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/* the number of fabric SerDes on the SBus */
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#define NUM_FABRIC_SERDES 4
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/* ASIC_STS_SBUS_RESULT.RESULT_CODE value */
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#define SBUS_READ_COMPLETE 0x4
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/* SBus fabric SerDes addresses, one set per HFI */
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static const u8 fabric_serdes_addrs[2][NUM_FABRIC_SERDES] = {
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{ 0x01, 0x02, 0x03, 0x04 },
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@ -240,6 +243,7 @@ static const u8 all_pcie_serdes_broadcast = 0xe0;
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static void dispose_one_firmware(struct firmware_details *fdet);
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static int load_fabric_serdes_firmware(struct hfi1_devdata *dd,
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struct firmware_details *fdet);
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static void dump_fw_version(struct hfi1_devdata *dd);
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/*
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* Read a single 64-bit value from 8051 data memory.
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@ -1078,6 +1082,44 @@ void sbus_request(struct hfi1_devdata *dd,
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ASIC_CFG_SBUS_REQUEST_RECEIVER_ADDR_SHIFT));
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}
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/*
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* Read a value from the SBus.
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*
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* Requires the caller to be in fast mode
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*/
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static u32 sbus_read(struct hfi1_devdata *dd, u8 receiver_addr, u8 data_addr,
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u32 data_in)
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{
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u64 reg;
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int retries;
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int success = 0;
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u32 result = 0;
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u32 result_code = 0;
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sbus_request(dd, receiver_addr, data_addr, READ_SBUS_RECEIVER, data_in);
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for (retries = 0; retries < 100; retries++) {
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usleep_range(1000, 1200); /* arbitrary */
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reg = read_csr(dd, ASIC_STS_SBUS_RESULT);
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result_code = (reg >> ASIC_STS_SBUS_RESULT_RESULT_CODE_SHIFT)
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& ASIC_STS_SBUS_RESULT_RESULT_CODE_MASK;
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if (result_code != SBUS_READ_COMPLETE)
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continue;
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success = 1;
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result = (reg >> ASIC_STS_SBUS_RESULT_DATA_OUT_SHIFT)
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& ASIC_STS_SBUS_RESULT_DATA_OUT_MASK;
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break;
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}
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if (!success) {
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dd_dev_err(dd, "%s: read failed, result code 0x%x\n", __func__,
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result_code);
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}
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return result;
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}
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/*
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* Turn off the SBus and fabric serdes spicos.
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*
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@ -1636,6 +1678,7 @@ int load_firmware(struct hfi1_devdata *dd)
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return ret;
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}
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dump_fw_version(dd);
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return 0;
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}
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@ -2054,3 +2097,85 @@ void read_guid(struct hfi1_devdata *dd)
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dd_dev_info(dd, "GUID %llx",
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(unsigned long long)dd->base_guid);
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}
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/* read and display firmware version info */
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static void dump_fw_version(struct hfi1_devdata *dd)
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{
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u32 pcie_vers[NUM_PCIE_SERDES];
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u32 fabric_vers[NUM_FABRIC_SERDES];
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u32 sbus_vers;
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int i;
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int all_same;
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int ret;
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u8 rcv_addr;
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ret = acquire_chip_resource(dd, CR_SBUS, SBUS_TIMEOUT);
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if (ret) {
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dd_dev_err(dd, "Unable to acquire SBus to read firmware versions\n");
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return;
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}
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/* set fast mode */
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set_sbus_fast_mode(dd);
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/* read version for SBus Master */
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sbus_request(dd, SBUS_MASTER_BROADCAST, 0x02, WRITE_SBUS_RECEIVER, 0);
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sbus_request(dd, SBUS_MASTER_BROADCAST, 0x07, WRITE_SBUS_RECEIVER, 0x1);
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/* wait for interrupt to be processed */
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usleep_range(10000, 11000);
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sbus_vers = sbus_read(dd, SBUS_MASTER_BROADCAST, 0x08, 0x1);
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dd_dev_info(dd, "SBus Master firmware version 0x%08x\n", sbus_vers);
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/* read version for PCIe SerDes */
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all_same = 1;
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pcie_vers[0] = 0;
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for (i = 0; i < NUM_PCIE_SERDES; i++) {
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rcv_addr = pcie_serdes_addrs[dd->hfi1_id][i];
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sbus_request(dd, rcv_addr, 0x03, WRITE_SBUS_RECEIVER, 0);
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/* wait for interrupt to be processed */
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usleep_range(10000, 11000);
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pcie_vers[i] = sbus_read(dd, rcv_addr, 0x04, 0x0);
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if (i > 0 && pcie_vers[0] != pcie_vers[i])
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all_same = 0;
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}
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if (all_same) {
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dd_dev_info(dd, "PCIe SerDes firmware version 0x%x\n",
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pcie_vers[0]);
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} else {
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dd_dev_warn(dd, "PCIe SerDes do not have the same firmware version\n");
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for (i = 0; i < NUM_PCIE_SERDES; i++) {
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dd_dev_info(dd,
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"PCIe SerDes lane %d firmware version 0x%x\n",
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i, pcie_vers[i]);
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}
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}
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/* read version for fabric SerDes */
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all_same = 1;
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fabric_vers[0] = 0;
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for (i = 0; i < NUM_FABRIC_SERDES; i++) {
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rcv_addr = fabric_serdes_addrs[dd->hfi1_id][i];
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sbus_request(dd, rcv_addr, 0x03, WRITE_SBUS_RECEIVER, 0);
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/* wait for interrupt to be processed */
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usleep_range(10000, 11000);
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fabric_vers[i] = sbus_read(dd, rcv_addr, 0x04, 0x0);
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if (i > 0 && fabric_vers[0] != fabric_vers[i])
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all_same = 0;
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}
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if (all_same) {
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dd_dev_info(dd, "Fabric SerDes firmware version 0x%x\n",
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fabric_vers[0]);
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} else {
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dd_dev_warn(dd, "Fabric SerDes do not have the same firmware version\n");
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for (i = 0; i < NUM_FABRIC_SERDES; i++) {
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dd_dev_info(dd,
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"Fabric SerDes lane %d firmware version 0x%x\n",
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i, fabric_vers[i]);
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}
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}
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clear_sbus_fast_mode(dd);
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release_chip_resource(dd, CR_SBUS);
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}
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