mirror of https://gitee.com/openkylin/linux.git
perf/x86/intel/cqm: Use proper data types
'int' is really not a proper data type for an MSR. Use u32 to make it clear that we are dealing with a 32-bit unsigned hardware value. Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Acked-by: Matt Fleming <matt.fleming@intel.com> Cc: Kanaka Juvva <kanaka.d.juvva@intel.com> Cc: Linus Torvalds <torvalds@linux-foundation.org> Cc: Peter Zijlstra <peterz@infradead.org> Cc: Vikas Shivappa <vikas.shivappa@linux.intel.com> Cc: Will Auld <will.auld@intel.com> Link: http://lkml.kernel.org/r/20150518235149.919350144@linutronix.de Signed-off-by: Ingo Molnar <mingo@kernel.org>
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@ -18,7 +18,7 @@ static unsigned int cqm_l3_scale; /* supposedly cacheline size */
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struct intel_cqm_state {
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raw_spinlock_t lock;
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int rmid;
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u32 rmid;
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int cnt;
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};
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@ -962,7 +962,7 @@ static u64 intel_cqm_event_count(struct perf_event *event)
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static void intel_cqm_event_start(struct perf_event *event, int mode)
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{
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struct intel_cqm_state *state = this_cpu_ptr(&cqm_state);
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unsigned int rmid = event->hw.cqm_rmid;
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u32 rmid = event->hw.cqm_rmid;
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unsigned long flags;
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if (!(event->hw.cqm_state & PERF_HES_STOPPED))
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@ -120,7 +120,7 @@ struct hw_perf_event {
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};
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struct { /* intel_cqm */
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int cqm_state;
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int cqm_rmid;
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u32 cqm_rmid;
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struct list_head cqm_events_entry;
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struct list_head cqm_groups_entry;
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struct list_head cqm_group_entry;
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