net: stmmac: enable MTL ECC Error Address Status Over-ride by default

Turn on the MEEAO field of MTL_ECC_Control_Register by default.

As the MTL ECC Error Address Status Over-ride(MEEAO) is set by default,
the following error address fields will hold the last valid address
where the error is detected.

Signed-off-by: Voon Weifeng <weifeng.voon@intel.com>
Signed-off-by: Tan Tee Min <tee.min.tan@intel.com>
Co-developed-by: Wong Vee Khee <vee.khee.wong@linux.intel.com>
Signed-off-by: Wong Vee Khee <vee.khee.wong@linux.intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Voon Weifeng 2021-04-01 00:18:25 +08:00 committed by David S. Miller
parent 77890db10e
commit b494ba5a3c
2 changed files with 2 additions and 0 deletions

View File

@ -192,6 +192,7 @@ int dwmac5_safety_feat_config(void __iomem *ioaddr, unsigned int asp)
/* 1. Enable Safety Features */ /* 1. Enable Safety Features */
value = readl(ioaddr + MTL_ECC_CONTROL); value = readl(ioaddr + MTL_ECC_CONTROL);
value |= MEEAO; /* MTL ECC Error Addr Status Override */
value |= TSOEE; /* TSO ECC */ value |= TSOEE; /* TSO ECC */
value |= MRXPEE; /* MTL RX Parser ECC */ value |= MRXPEE; /* MTL RX Parser ECC */
value |= MESTEE; /* MTL EST ECC */ value |= MESTEE; /* MTL EST ECC */

View File

@ -98,6 +98,7 @@
#define ADDR GENMASK(15, 0) #define ADDR GENMASK(15, 0)
#define MTL_RXP_IACC_DATA 0x00000cb4 #define MTL_RXP_IACC_DATA 0x00000cb4
#define MTL_ECC_CONTROL 0x00000cc0 #define MTL_ECC_CONTROL 0x00000cc0
#define MEEAO BIT(8)
#define TSOEE BIT(4) #define TSOEE BIT(4)
#define MRXPEE BIT(3) #define MRXPEE BIT(3)
#define MESTEE BIT(2) #define MESTEE BIT(2)