mirror of https://gitee.com/openkylin/linux.git
Renesas ARM based SoC cleanups for v3.13
* Constify platform data and resources of r8a7790 SoC * Rename to r8a7790_init_delay() as r8a7790_init_early() - This is in preparation for doing more than just initialising the delay * Rename r8a73a4_init_delay() as r8a73a4_init_early() - This is in preparation for doing more than just initialising the delay -----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.14 (GNU/Linux) iQIcBAABAgAGBQJSSRy5AAoJENfPZGlqN0++sdUP/3b6wColkyIX0lVbenSQxyeL 5seUv0QsZY2wswIRlphFU8eZ/Oi5GF/7oXCx2tgjfZh1HaFpjV/Ocn+8bDL+7mOz KeLV/togLZwZTAYohuXIsZnLhR13x3y+adCyEtOn3VVNz/CbXTEAJuSG9iA+M+o2 9Btmsvff6i6GVbv1ksf0kIsFA5NZXoykE3qay7b/GnImCNpMj9SgmIZt7hXl35IS QdiRnmMJY2dl9WcTTIK2zHw+wxO29hMdpSsrEUOfQOcj8bPL09H35e2t5t+mx/bd Z7dowu82e0CzZhzir0NbFvWZWjSF0Q0cYHpWWL89tU4Y+2vbICM0okwEc7UiO1b/ KlcyrApnQvTMsazbR1kBrZ3cwHi+xRdDw27njtVkYIh1AGCkYplezlmUl+ALNOKn bCDh6XJOEDDuw7cuoKKwtsGUcVR+QCRNVUtbuUXwG1naCL06BUUpSvCrmCzsoUSW VPbMZWURaE4X7LNL2Q63Kl6JzFzC8iGfzH/tST7/Zvhw/7uN2Ppsuz7K6Crkhi8a zyITxIyiy+OKURFEUt8Fhy5mdkw9UUnAVjmAM6HPFGaxAfmsCV2Wvoks3I7/EBJl ks8Y5L8SSRQLLY6j3yGABavTvgj3k9TnUxxzUJMYnMX1/D++ohHxTwS3Dj0TpXtb p1D+V3Pz5mcfThlGRFg8 =1rby -----END PGP SIGNATURE----- Merge tag 'renesas-cleanup-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas into next/cleanup From Simon Horman: Renesas ARM based SoC cleanups for v3.13 * Constify platform data and resources of r8a7790 SoC * Rename to r8a7790_init_delay() as r8a7790_init_early() - This is in preparation for doing more than just initialising the delay * Rename r8a73a4_init_delay() as r8a73a4_init_early() - This is in preparation for doing more than just initialising the delay * tag 'renesas-cleanup-for-v3.13' of git://git.kernel.org/pub/scm/linux/kernel/git/horms/renesas: ARM: shmobile: r8a7790: Constify platform data and resources ARM: shmobile: Rename to r8a7790_init_early() ARM: shmobile: Rename to r8a73a4_init_early() Signed-off-by: Olof Johansson <olof@lixom.net>
This commit is contained in:
commit
b4e086f679
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@ -57,7 +57,7 @@ static const char *ape6evm_boards_compat_dt[] __initdata = {
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};
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DT_MACHINE_START(APE6EVM_DT, "ape6evm")
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.init_early = r8a73a4_init_delay,
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.init_early = r8a73a4_init_early,
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.init_machine = ape6evm_add_standard_devices,
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.dt_compat = ape6evm_boards_compat_dt,
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MACHINE_END
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@ -240,7 +240,7 @@ static const char *ape6evm_boards_compat_dt[] __initdata = {
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};
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DT_MACHINE_START(APE6EVM_DT, "ape6evm")
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.init_early = r8a73a4_init_delay,
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.init_early = r8a73a4_init_early,
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.init_machine = ape6evm_add_standard_devices,
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.dt_compat = ape6evm_boards_compat_dt,
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MACHINE_END
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@ -38,7 +38,7 @@ static const char *lager_boards_compat_dt[] __initdata = {
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};
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DT_MACHINE_START(LAGER_DT, "lager")
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.init_early = r8a7790_init_delay,
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.init_early = r8a7790_init_early,
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.init_machine = lager_add_standard_devices,
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.init_time = r8a7790_timer_init,
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.dt_compat = lager_boards_compat_dt,
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@ -186,7 +186,7 @@ static const char *lager_boards_compat_dt[] __initdata = {
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};
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DT_MACHINE_START(LAGER_DT, "lager")
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.init_early = r8a7790_init_delay,
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.init_early = r8a7790_init_early,
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.init_time = r8a7790_timer_init,
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.init_machine = lager_init,
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.dt_compat = lager_boards_compat_dt,
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@ -5,6 +5,6 @@ void r8a73a4_add_standard_devices(void);
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void r8a73a4_add_dt_devices(void);
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void r8a73a4_clock_init(void);
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void r8a73a4_pinmux_init(void);
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void r8a73a4_init_delay(void);
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void r8a73a4_init_early(void);
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#endif /* __ASM_R8A73A4_H__ */
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@ -5,7 +5,7 @@ void r8a7790_add_standard_devices(void);
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void r8a7790_add_dt_devices(void);
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void r8a7790_clock_init(void);
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void r8a7790_pinmux_init(void);
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void r8a7790_init_delay(void);
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void r8a7790_init_early(void);
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void r8a7790_timer_init(void);
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#define MD(nr) BIT(nr)
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@ -207,7 +207,7 @@ void __init r8a73a4_add_standard_devices(void)
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r8a73a4_register_thermal();
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}
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void __init r8a73a4_init_delay(void)
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void __init r8a73a4_init_early(void)
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{
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#ifndef CONFIG_ARM_ARCH_TIMER
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shmobile_setup_delay(1500, 2, 4); /* Cortex-A15 @ 1500MHz */
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@ -222,7 +222,7 @@ static const char *r8a73a4_boards_compat_dt[] __initdata = {
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};
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DT_MACHINE_START(R8A73A4_DT, "Generic R8A73A4 (Flattened Device Tree)")
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.init_early = r8a73a4_init_delay,
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.init_early = r8a73a4_init_early,
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.dt_compat = r8a73a4_boards_compat_dt,
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MACHINE_END
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#endif /* CONFIG_USE_OF */
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@ -31,17 +31,18 @@
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#include <mach/r8a7790.h>
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#include <asm/mach/arch.h>
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static struct resource pfc_resources[] __initdata = {
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static const struct resource pfc_resources[] __initconst = {
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DEFINE_RES_MEM(0xe6060000, 0x250),
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};
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#define R8A7790_GPIO(idx) \
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static struct resource r8a7790_gpio##idx##_resources[] __initdata = { \
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static const struct resource r8a7790_gpio##idx##_resources[] __initconst = { \
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DEFINE_RES_MEM(0xe6050000 + 0x1000 * (idx), 0x50), \
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DEFINE_RES_IRQ(gic_spi(4 + (idx))), \
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}; \
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\
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static struct gpio_rcar_config r8a7790_gpio##idx##_platform_data __initdata = { \
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static const struct gpio_rcar_config \
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r8a7790_gpio##idx##_platform_data __initconst = { \
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.gpio_base = 32 * (idx), \
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.irq_base = 0, \
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.number_of_pins = 32, \
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@ -112,7 +113,7 @@ void __init r8a7790_pinmux_init(void)
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enum { SCIFA0, SCIFA1, SCIFB0, SCIFB1, SCIFB2, SCIFA2, SCIF0, SCIF1,
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HSCIF0, HSCIF1 };
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static struct plat_sci_port scif[] __initdata = {
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static const struct plat_sci_port scif[] __initconst = {
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SCIFA_DATA(SCIFA0, 0xe6c40000, gic_spi(144)), /* SCIFA0 */
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SCIFA_DATA(SCIFA1, 0xe6c50000, gic_spi(145)), /* SCIFA1 */
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SCIFB_DATA(SCIFB0, 0xe6c20000, gic_spi(148)), /* SCIFB0 */
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@ -131,11 +132,11 @@ static inline void r8a7790_register_scif(int idx)
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sizeof(struct plat_sci_port));
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}
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static struct renesas_irqc_config irqc0_data __initdata = {
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static const struct renesas_irqc_config irqc0_data __initconst = {
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.irq_base = irq_pin(0), /* IRQ0 -> IRQ3 */
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};
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static struct resource irqc0_resources[] __initdata = {
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static const struct resource irqc0_resources[] __initconst = {
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DEFINE_RES_MEM(0xe61c0000, 0x200), /* IRQC Event Detector Block_0 */
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DEFINE_RES_IRQ(gic_spi(0)), /* IRQ0 */
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DEFINE_RES_IRQ(gic_spi(1)), /* IRQ1 */
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@ -150,7 +151,7 @@ static struct resource irqc0_resources[] __initdata = {
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&irqc##idx##_data, \
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sizeof(struct renesas_irqc_config))
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static struct resource thermal_resources[] __initdata = {
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static const struct resource thermal_resources[] __initconst = {
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DEFINE_RES_MEM(0xe61f0000, 0x14),
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DEFINE_RES_MEM(0xe61f0100, 0x38),
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DEFINE_RES_IRQ(gic_spi(69)),
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@ -161,13 +162,13 @@ static struct resource thermal_resources[] __initdata = {
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thermal_resources, \
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ARRAY_SIZE(thermal_resources))
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static struct sh_timer_config cmt00_platform_data __initdata = {
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static const struct sh_timer_config cmt00_platform_data __initconst = {
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.name = "CMT00",
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.timer_bit = 0,
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.clockevent_rating = 80,
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};
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static struct resource cmt00_resources[] __initdata = {
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static const struct resource cmt00_resources[] __initconst = {
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DEFINE_RES_MEM(0xffca0510, 0x0c),
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DEFINE_RES_MEM(0xffca0500, 0x04),
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DEFINE_RES_IRQ(gic_spi(142)), /* CMT0_0 */
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@ -267,7 +268,7 @@ void __init r8a7790_timer_init(void)
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clocksource_of_init();
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}
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void __init r8a7790_init_delay(void)
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void __init r8a7790_init_early(void)
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{
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#ifndef CONFIG_ARM_ARCH_TIMER
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shmobile_setup_delay(1300, 2, 4); /* Cortex-A15 @ 1300MHz */
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@ -276,13 +277,13 @@ void __init r8a7790_init_delay(void)
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#ifdef CONFIG_USE_OF
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static const char *r8a7790_boards_compat_dt[] __initdata = {
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static const char * const r8a7790_boards_compat_dt[] __initconst = {
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"renesas,r8a7790",
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NULL,
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};
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DT_MACHINE_START(R8A7790_DT, "Generic R8A7790 (Flattened Device Tree)")
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.init_early = r8a7790_init_delay,
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.init_early = r8a7790_init_early,
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.init_time = r8a7790_timer_init,
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.dt_compat = r8a7790_boards_compat_dt,
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MACHINE_END
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