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Merge ath-next from git://git.kernel.org/pub/scm/linux/kernel/git/kvalo/ath.git 

ath.git patches for v5.15. Major changes:

ath5k, ath9k, ath10k, ath11k:

* switch from 'pci_' to 'dma_' API
This commit is contained in:
Kalle Valo 2021-07-28 18:21:10 +03:00
parent af996031e1 0791ba2bc7
commit b4f8e2d9b5
5 changed files with 5 additions and 29 deletions
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9
drivers/net/wireless/ath/ath10k/pci.c
View File

@ -3393,19 +3393,12 @@ static int ath10k_pci_claim(struct ath10k *ar)
}
/* Target expects 32 bit DMA. Enforce it. */
ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
if (ret) {
ath10k_err(ar, "failed to set dma mask to 32-bit: %d\n", ret);
goto err_region;
}
ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
if (ret) {
ath10k_err(ar, "failed to set consistent dma mask to 32-bit: %d\n",
ret);
goto err_region;
}
pci_set_master(pdev);
/* Arrange for access to Target SoC registers. */

5
drivers/net/wireless/ath/ath11k/dp_rx.c
View File

@ -1406,11 +1406,6 @@ ath11k_update_per_peer_tx_stats(struct ath11k *ar,
* Firmware rate's control to be skipped for this?
*/
if (flags == WMI_RATE_PREAMBLE_HE && mcs > 11) {
ath11k_warn(ab, "Invalid HE mcs %d peer stats", mcs);
return;
}
if (flags == WMI_RATE_PREAMBLE_HE && mcs > ATH11K_HE_MCS_MAX) {
ath11k_warn(ab, "Invalid HE mcs %d peer stats", mcs);
return;

10
drivers/net/wireless/ath/ath11k/pci.c
View File

@ -933,20 +933,14 @@ static int ath11k_pci_claim(struct ath11k_pci *ab_pci, struct pci_dev *pdev)
goto disable_device;
}
ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(ATH11K_PCI_DMA_MASK));
ret = dma_set_mask_and_coherent(&pdev->dev,
DMA_BIT_MASK(ATH11K_PCI_DMA_MASK));
if (ret) {
ath11k_err(ab, "failed to set pci dma mask to %d: %d\n",
ATH11K_PCI_DMA_MASK, ret);
goto release_region;
}
ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(ATH11K_PCI_DMA_MASK));
if (ret) {
ath11k_err(ab, "failed to set pci consistent dma mask to %d: %d\n",
ATH11K_PCI_DMA_MASK, ret);
goto release_region;
}
pci_set_master(pdev);
ab->mem_len = pci_resource_len(pdev, ATH11K_PCI_BAR_NUM);

2
drivers/net/wireless/ath/ath5k/pci.c
View File

@ -191,7 +191,7 @@ ath5k_pci_probe(struct pci_dev *pdev,
}
/* XXX 32-bit addressing only */
ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
ret = dma_set_mask(&pdev->dev, DMA_BIT_MASK(32));
if (ret) {
dev_err(&pdev->dev, "32-bit DMA not available\n");
goto err_dis;

8
drivers/net/wireless/ath/ath9k/pci.c
View File

@ -896,18 +896,12 @@ static int ath_pci_probe(struct pci_dev *pdev, const struct pci_device_id *id)
if (pcim_enable_device(pdev))
return -EIO;
ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
ret = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
if (ret) {
pr_err("32-bit DMA not available\n");
return ret;
}
ret = pci_set_consistent_dma_mask(pdev, DMA_BIT_MASK(32));
if (ret) {
pr_err("32-bit DMA consistent DMA enable failed\n");
return ret;
}
/*
* Cache line size is used to size and align various
* structures used to communicate with the hardware.