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usb: dwc3: USB2 PHY register access bits
Definitions for Global USB2 PHY Vendor Control Register bits. We will need them to access ULPI PHY registers later. Signed-off-by: Heikki Krogerus <heikki.krogerus@linux.intel.com> Acked-by: David Cohen <david.a.cohen@linux.intel.com> Signed-off-by: Felipe Balbi <balbi@ti.com>
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#define DWC3_GUSB2PHYCFG_PHYSOFTRST (1 << 31)
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#define DWC3_GUSB2PHYCFG_SUSPHY (1 << 6)
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/* Global USB2 PHY Vendor Control Register */
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#define DWC3_GUSB2PHYACC_NEWREGREQ (1 << 25)
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#define DWC3_GUSB2PHYACC_BUSY (1 << 23)
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#define DWC3_GUSB2PHYACC_WRITE (1 << 22)
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#define DWC3_GUSB2PHYACC_ADDR(n) (n << 16)
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#define DWC3_GUSB2PHYACC_EXTEND_ADDR(n) (n << 8)
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#define DWC3_GUSB2PHYACC_DATA(n) (n & 0xff)
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/* Global USB3 PIPE Control Register */
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#define DWC3_GUSB3PIPECTL_PHYSOFTRST (1 << 31)
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#define DWC3_GUSB3PIPECTL_U2SSINP3OK (1 << 29)
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