mirror of https://gitee.com/openkylin/linux.git
bnx2x: Modify BCM8706 link init seq
Modify BCM8706 link initialization sequence so that first it link up between Serdes and BCM8706, and only then between BCM8706 to network Signed-off-by: Yaniv Rosner <yanivr@broadcom.com> Signed-off-by: Eilon Greenstein <eilong@broadcom.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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@ -1929,6 +1929,8 @@ static u8 bnx2x_link_settings_status(struct link_params *params,
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PORT_HW_CFG_XGXS_EXT_PHY_TYPE_DIRECT) ||
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(XGXS_EXT_PHY_TYPE(params->ext_phy_config) ==
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PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8705) ||
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(XGXS_EXT_PHY_TYPE(params->ext_phy_config) ==
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PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8706) ||
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(XGXS_EXT_PHY_TYPE(params->ext_phy_config) ==
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PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726))) {
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vars->autoneg = AUTO_NEG_ENABLED;
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@ -3772,19 +3774,6 @@ static u8 bnx2x_ext_phy_init(struct link_params *params, struct link_vars *vars)
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}
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}
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/* Force speed */
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/* First enable LASI */
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bnx2x_cl45_write(bp, params->port,
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ext_phy_type,
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ext_phy_addr,
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MDIO_PMA_DEVAD,
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MDIO_PMA_REG_RX_ALARM_CTRL,
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0x0400);
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bnx2x_cl45_write(bp, params->port,
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ext_phy_type,
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ext_phy_addr,
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MDIO_PMA_DEVAD,
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MDIO_PMA_REG_LASI_CTRL, 0x0004);
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if (params->req_line_speed == SPEED_10000) {
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DP(NETIF_MSG_LINK, "XGXS 8706 force 10Gbps\n");
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@ -3794,6 +3783,9 @@ static u8 bnx2x_ext_phy_init(struct link_params *params, struct link_vars *vars)
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MDIO_PMA_DEVAD,
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MDIO_PMA_REG_DIGITAL_CTRL,
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0x400);
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bnx2x_cl45_write(bp, params->port, ext_phy_type,
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ext_phy_addr, MDIO_PMA_DEVAD,
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MDIO_PMA_REG_LASI_CTRL, 1);
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} else {
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/* Force 1Gbps using autoneg with 1G
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advertisment */
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@ -3835,6 +3827,17 @@ static u8 bnx2x_ext_phy_init(struct link_params *params, struct link_vars *vars)
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MDIO_AN_DEVAD,
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MDIO_AN_REG_CTRL,
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0x1200);
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bnx2x_cl45_write(bp, params->port,
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ext_phy_type,
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ext_phy_addr,
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MDIO_PMA_DEVAD,
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MDIO_PMA_REG_RX_ALARM_CTRL,
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0x0400);
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bnx2x_cl45_write(bp, params->port,
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ext_phy_type,
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ext_phy_addr,
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MDIO_PMA_DEVAD,
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MDIO_PMA_REG_LASI_CTRL, 0x0004);
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}
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bnx2x_save_bcm_spirom_ver(bp, params->port,
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@ -5952,6 +5955,7 @@ static u8 bnx2x_link_initialize(struct link_params *params,
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if (non_ext_phy ||
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(ext_phy_type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8705) ||
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(ext_phy_type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8706) ||
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(ext_phy_type == PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726) ||
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(params->loopback_mode == LOOPBACK_EXT_PHY)) {
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if (params->req_line_speed == SPEED_AUTO_NEG)
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@ -6421,6 +6425,7 @@ u8 bnx2x_link_update(struct link_params *params, struct link_vars *vars)
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if ((ext_phy_type != PORT_HW_CFG_SERDES_EXT_PHY_TYPE_DIRECT) &&
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(ext_phy_type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8705) &&
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(ext_phy_type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8706) &&
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(ext_phy_type != PORT_HW_CFG_XGXS_EXT_PHY_TYPE_BCM8726) &&
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(ext_phy_link_up && !vars->phy_link_up))
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bnx2x_init_internal_phy(params, vars, 0);
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