[SCSI] qla2xxx: Pass in optional extended-initialization control block.

Recent ISPs use this data to configure FCF information.

Signed-off-by: Andrew Vasquez <andrew.vasquez@qlogic.com>
Signed-off-by: James Bottomley <James.Bottomley@HansenPartnership.com>
This commit is contained in:
Andrew Vasquez 2009-03-24 09:08:01 -07:00 committed by James Bottomley
parent dda772e8e3
commit b64b0e8fd9
5 changed files with 54 additions and 7 deletions

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@ -2440,6 +2440,8 @@ struct qla_hw_data {
dma_addr_t init_cb_dma; dma_addr_t init_cb_dma;
init_cb_t *init_cb; init_cb_t *init_cb;
int init_cb_size; int init_cb_size;
dma_addr_t ex_init_cb_dma;
struct ex_init_cb_81xx *ex_init_cb;
/* These are used by mailbox operations. */ /* These are used by mailbox operations. */
volatile uint16_t mailbox_out[MAILBOX_REGISTER_COUNT]; volatile uint16_t mailbox_out[MAILBOX_REGISTER_COUNT];

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@ -1440,7 +1440,17 @@ struct nvram_81xx {
uint16_t reserved_6[24]; uint16_t reserved_6[24];
/* Offset 128. */ /* Offset 128. */
uint16_t reserved_7[64]; uint16_t ex_version;
uint8_t prio_fcf_matching_flags;
uint8_t reserved_6_1[3];
uint16_t pri_fcf_vlan_id;
uint8_t pri_fcf_fabric_name[8];
uint16_t reserved_6_2[7];
uint8_t spma_mac_addr[6];
uint16_t reserved_6_3[14];
/* Offset 192. */
uint16_t reserved_7[32];
/* /*
* BIT 0 = Enable spinup delay * BIT 0 = Enable spinup delay
@ -1664,6 +1674,17 @@ struct mid_init_cb_81xx {
struct mid_conf_entry_24xx entries[MAX_MULTI_ID_FABRIC]; struct mid_conf_entry_24xx entries[MAX_MULTI_ID_FABRIC];
}; };
struct ex_init_cb_81xx {
uint16_t ex_version;
uint8_t prio_fcf_matching_flags;
uint8_t reserved_1[3];
uint16_t pri_fcf_vlan_id;
uint8_t pri_fcf_fabric_name[8];
uint16_t reserved_2[7];
uint8_t spma_mac_addr[6];
uint16_t reserved_3[14];
};
#define FARX_ACCESS_FLASH_CONF_81XX 0x7FFD0000 #define FARX_ACCESS_FLASH_CONF_81XX 0x7FFD0000
#define FARX_ACCESS_FLASH_DATA_81XX 0x7F800000 #define FARX_ACCESS_FLASH_DATA_81XX 0x7F800000

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@ -4455,6 +4455,9 @@ qla81xx_nvram_config(scsi_qla_host_t *vha)
icb->enode_mac[5] = 0x06 + PCI_FUNC(ha->pdev->devfn); icb->enode_mac[5] = 0x06 + PCI_FUNC(ha->pdev->devfn);
} }
/* Use extended-initialization control block. */
memcpy(ha->ex_init_cb, &nv->ex_version, sizeof(*ha->ex_init_cb));
/* /*
* Setup driver NVRAM options. * Setup driver NVRAM options.
*/ */

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@ -1043,14 +1043,22 @@ qla2x00_init_firmware(scsi_qla_host_t *vha, uint16_t size)
else else
mcp->mb[0] = MBC_INITIALIZE_FIRMWARE; mcp->mb[0] = MBC_INITIALIZE_FIRMWARE;
mcp->mb[1] = 0;
mcp->mb[2] = MSW(ha->init_cb_dma); mcp->mb[2] = MSW(ha->init_cb_dma);
mcp->mb[3] = LSW(ha->init_cb_dma); mcp->mb[3] = LSW(ha->init_cb_dma);
mcp->mb[4] = 0;
mcp->mb[5] = 0;
mcp->mb[6] = MSW(MSD(ha->init_cb_dma)); mcp->mb[6] = MSW(MSD(ha->init_cb_dma));
mcp->mb[7] = LSW(MSD(ha->init_cb_dma)); mcp->mb[7] = LSW(MSD(ha->init_cb_dma));
mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_0; mcp->out_mb = MBX_7|MBX_6|MBX_3|MBX_2|MBX_1|MBX_0;
mcp->in_mb = MBX_5|MBX_4|MBX_0; if (IS_QLA81XX(ha) && ha->ex_init_cb->ex_version) {
mcp->mb[1] = BIT_0;
mcp->mb[10] = MSW(ha->ex_init_cb_dma);
mcp->mb[11] = LSW(ha->ex_init_cb_dma);
mcp->mb[12] = MSW(MSD(ha->ex_init_cb_dma));
mcp->mb[13] = LSW(MSD(ha->ex_init_cb_dma));
mcp->mb[14] = sizeof(*ha->ex_init_cb);
mcp->out_mb |= MBX_14|MBX_13|MBX_12|MBX_11|MBX_10;
}
mcp->in_mb = MBX_0;
mcp->buf_size = size; mcp->buf_size = size;
mcp->flags = MBX_DMA_OUT; mcp->flags = MBX_DMA_OUT;
mcp->tov = MBX_TOV_SECONDS; mcp->tov = MBX_TOV_SECONDS;

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@ -2203,9 +2203,19 @@ qla2x00_mem_alloc(struct qla_hw_data *ha, uint16_t req_len, uint16_t rsp_len,
} else } else
ha->npiv_info = NULL; ha->npiv_info = NULL;
/* Get consistent memory allocated for EX-INIT-CB. */
if (IS_QLA81XX(ha)) {
ha->ex_init_cb = dma_pool_alloc(ha->s_dma_pool, GFP_KERNEL,
&ha->ex_init_cb_dma);
if (!ha->ex_init_cb)
goto fail_ex_init_cb;
}
INIT_LIST_HEAD(&ha->vp_list); INIT_LIST_HEAD(&ha->vp_list);
return 1; return 1;
fail_ex_init_cb:
kfree(ha->npiv_info);
fail_npiv_info: fail_npiv_info:
dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) * dma_free_coherent(&ha->pdev->dev, ((*rsp)->length + 1) *
sizeof(response_t), (*rsp)->ring, (*rsp)->dma); sizeof(response_t), (*rsp)->ring, (*rsp)->dma);
@ -2291,15 +2301,16 @@ qla2x00_mem_free(struct qla_hw_data *ha)
if (ha->ms_iocb) if (ha->ms_iocb)
dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma); dma_pool_free(ha->s_dma_pool, ha->ms_iocb, ha->ms_iocb_dma);
if (ha->ex_init_cb)
dma_pool_free(ha->s_dma_pool, ha->ex_init_cb, ha->ex_init_cb_dma);
if (ha->s_dma_pool) if (ha->s_dma_pool)
dma_pool_destroy(ha->s_dma_pool); dma_pool_destroy(ha->s_dma_pool);
if (ha->gid_list) if (ha->gid_list)
dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list, dma_free_coherent(&ha->pdev->dev, GID_LIST_SIZE, ha->gid_list,
ha->gid_list_dma); ha->gid_list_dma);
if (ha->init_cb) if (ha->init_cb)
dma_free_coherent(&ha->pdev->dev, ha->init_cb_size, dma_free_coherent(&ha->pdev->dev, ha->init_cb_size,
ha->init_cb, ha->init_cb_dma); ha->init_cb, ha->init_cb_dma);
@ -2318,6 +2329,8 @@ qla2x00_mem_free(struct qla_hw_data *ha)
ha->ms_iocb_dma = 0; ha->ms_iocb_dma = 0;
ha->init_cb = NULL; ha->init_cb = NULL;
ha->init_cb_dma = 0; ha->init_cb_dma = 0;
ha->ex_init_cb = NULL;
ha->ex_init_cb_dma = 0;
ha->s_dma_pool = NULL; ha->s_dma_pool = NULL;