mirror of https://gitee.com/openkylin/linux.git
x86, AMD IOMMU: add comments to the initialization code
This patch adds some comments to the AMD IOMMU initialization code to increase its readability. Signed-off-by: Joerg Roedel <joerg.roedel@amd.com> Cc: iommu@lists.linux-foundation.org Cc: bhavna.sarathy@amd.com Cc: robert.richter@amd.com Signed-off-by: Ingo Molnar <mingo@elte.hu>
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@ -71,6 +71,17 @@
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#define ACPI_DEVFLAG_LINT1 0x80
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#define ACPI_DEVFLAG_ATSDIS 0x10000000
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/*
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* ACPI table definitions
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*
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* These data structures are laid over the table to parse the important values
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* out of it.
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*/
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/*
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* structure describing one IOMMU in the ACPI table. Typically followed by one
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* or more ivhd_entrys.
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*/
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struct ivhd_header {
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u8 type;
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u8 flags;
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@ -83,6 +94,10 @@ struct ivhd_header {
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u32 reserved;
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} __attribute__((packed));
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/*
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* A device entry describing which devices a specific IOMMU translates and
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* which requestor ids they use.
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*/
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struct ivhd_entry {
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u8 type;
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u16 devid;
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@ -90,6 +105,10 @@ struct ivhd_entry {
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u32 ext;
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} __attribute__((packed));
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/*
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* An AMD IOMMU memory definition structure. It defines things like exclusion
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* ranges for devices and regions that should be unity mapped.
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*/
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struct ivmd_header {
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u8 type;
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u8 flags;
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@ -103,22 +122,66 @@ struct ivmd_header {
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static int __initdata amd_iommu_detected;
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u16 amd_iommu_last_bdf;
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struct list_head amd_iommu_unity_map;
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unsigned amd_iommu_aperture_order = 26;
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int amd_iommu_isolate;
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u16 amd_iommu_last_bdf; /* largest PCI device id we have
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to handle */
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struct list_head amd_iommu_unity_map; /* a list of required unity mappings
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we find in ACPI */
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unsigned amd_iommu_aperture_order = 26; /* size of aperture in power of 2 */
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int amd_iommu_isolate; /* if 1, device isolation is enabled */
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struct list_head amd_iommu_list;
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struct list_head amd_iommu_list; /* list of all AMD IOMMUs in the
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system */
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/*
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* Pointer to the device table which is shared by all AMD IOMMUs
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* it is indexed by the PCI device id or the HT unit id and contains
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* information about the domain the device belongs to as well as the
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* page table root pointer.
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*/
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struct dev_table_entry *amd_iommu_dev_table;
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/*
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* The alias table is a driver specific data structure which contains the
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* mappings of the PCI device ids to the actual requestor ids on the IOMMU.
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* More than one device can share the same requestor id.
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*/
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u16 *amd_iommu_alias_table;
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/*
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* The rlookup table is used to find the IOMMU which is responsible
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* for a specific device. It is also indexed by the PCI device id.
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*/
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struct amd_iommu **amd_iommu_rlookup_table;
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/*
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* The pd table (protection domain table) is used to find the protection domain
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* data structure a device belongs to. Indexed with the PCI device id too.
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*/
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struct protection_domain **amd_iommu_pd_table;
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/*
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* AMD IOMMU allows up to 2^16 differend protection domains. This is a bitmap
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* to know which ones are already in use.
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*/
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unsigned long *amd_iommu_pd_alloc_bitmap;
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static u32 dev_table_size;
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static u32 alias_table_size;
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static u32 rlookup_table_size;
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static u32 dev_table_size; /* size of the device table */
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static u32 alias_table_size; /* size of the alias table */
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static u32 rlookup_table_size; /* size if the rlookup table */
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/****************************************************************************
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*
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* AMD IOMMU MMIO register space handling functions
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*
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* These functions are used to program the IOMMU device registers in
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* MMIO space required for that driver.
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*
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****************************************************************************/
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/*
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* This function set the exclusion range in the IOMMU. DMA accesses to the
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* exclusion range are passed through untranslated
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*/
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static void __init iommu_set_exclusion_range(struct amd_iommu *iommu)
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{
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u64 start = iommu->exclusion_start & PAGE_MASK;
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@ -137,6 +200,7 @@ static void __init iommu_set_exclusion_range(struct amd_iommu *iommu)
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&entry, sizeof(entry));
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}
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/* Programs the physical address of the device table into the IOMMU hardware */
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static void __init iommu_set_device_table(struct amd_iommu *iommu)
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{
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u32 entry;
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@ -149,6 +213,7 @@ static void __init iommu_set_device_table(struct amd_iommu *iommu)
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&entry, sizeof(entry));
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}
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/* Generic functions to enable/disable certain features of the IOMMU. */
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static void __init iommu_feature_enable(struct amd_iommu *iommu, u8 bit)
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{
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u32 ctrl;
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@ -167,6 +232,7 @@ static void __init iommu_feature_disable(struct amd_iommu *iommu, u8 bit)
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writel(ctrl, iommu->mmio_base + MMIO_CONTROL_OFFSET);
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}
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/* Function to enable the hardware */
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void __init iommu_enable(struct amd_iommu *iommu)
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{
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printk(KERN_INFO "AMD IOMMU: Enabling IOMMU at ");
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@ -176,6 +242,10 @@ void __init iommu_enable(struct amd_iommu *iommu)
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iommu_feature_enable(iommu, CONTROL_IOMMU_EN);
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}
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/*
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* mapping and unmapping functions for the IOMMU MMIO space. Each AMD IOMMU in
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* the system has one.
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*/
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static u8 * __init iommu_map_mmio_space(u64 address)
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{
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u8 *ret;
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@ -199,6 +269,19 @@ static void __init iommu_unmap_mmio_space(struct amd_iommu *iommu)
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release_mem_region(iommu->mmio_phys, MMIO_REGION_LENGTH);
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}
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/****************************************************************************
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*
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* The functions below belong to the first pass of AMD IOMMU ACPI table
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* parsing. In this pass we try to find out the highest device id this
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* code has to handle. Upon this information the size of the shared data
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* structures is determined later.
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*
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****************************************************************************/
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/*
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* This function reads the last device id the IOMMU has to handle from the PCI
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* capability header for this IOMMU
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*/
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static int __init find_last_devid_on_pci(int bus, int dev, int fn, int cap_ptr)
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{
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u32 cap;
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@ -209,6 +292,10 @@ static int __init find_last_devid_on_pci(int bus, int dev, int fn, int cap_ptr)
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return 0;
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}
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/*
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* After reading the highest device id from the IOMMU PCI capability header
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* this function looks if there is a higher device id defined in the ACPI table
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*/
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static int __init find_last_devid_from_ivhd(struct ivhd_header *h)
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{
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u8 *p = (void *)h, *end = (void *)h;
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@ -229,6 +316,7 @@ static int __init find_last_devid_from_ivhd(struct ivhd_header *h)
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case IVHD_DEV_RANGE_END:
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case IVHD_DEV_ALIAS:
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case IVHD_DEV_EXT_SELECT:
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/* all the above subfield types refer to device ids */
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UPDATE_LAST_BDF(dev->devid);
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break;
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default:
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return 0;
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}
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/*
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* Iterate over all IVHD entries in the ACPI table and find the highest device
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* id which we need to handle. This is the first of three functions which parse
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* the ACPI table. So we check the checksum here.
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*/
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static int __init find_last_devid_acpi(struct acpi_table_header *table)
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{
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int i;
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return 0;
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}
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/****************************************************************************
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*
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* The following functions belong the the code path which parses the ACPI table
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* the second time. In this ACPI parsing iteration we allocate IOMMU specific
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* data structures, initialize the device/alias/rlookup table and also
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* basically initialize the hardware.
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*
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****************************************************************************/
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/*
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* Allocates the command buffer. This buffer is per AMD IOMMU. We can
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* write commands to that buffer later and the IOMMU will execute them
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* asynchronously
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*/
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static u8 * __init alloc_command_buffer(struct amd_iommu *iommu)
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{
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u8 *cmd_buf = (u8 *)__get_free_pages(GFP_KERNEL,
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get_order(CMD_BUFFER_SIZE));
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}
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/* sets a specific bit in the device table entry. */
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static void set_dev_entry_bit(u16 devid, u8 bit)
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{
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int i = (bit >> 5) & 0x07;
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amd_iommu_dev_table[devid].data[i] |= (1 << _bit);
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}
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/*
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* This function takes the device specific flags read from the ACPI
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* table and sets up the device table entry with that information
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*/
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static void __init set_dev_entry_from_acpi(u16 devid, u32 flags, u32 ext_flags)
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{
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if (flags & ACPI_DEVFLAG_INITPASS)
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set_dev_entry_bit(devid, DEV_ENTRY_LINT1_PASS);
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}
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/* Writes the specific IOMMU for a device into the rlookup table */
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static void __init set_iommu_for_device(struct amd_iommu *iommu, u16 devid)
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{
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amd_iommu_rlookup_table[devid] = iommu;
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}
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/*
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* Reads the device exclusion range from ACPI and initialize IOMMU with
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* it
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*/
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static void __init set_device_exclusion_range(u16 devid, struct ivmd_header *m)
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{
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struct amd_iommu *iommu = amd_iommu_rlookup_table[devid];
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return;
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if (iommu) {
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/*
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* We only can configure exclusion ranges per IOMMU, not
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* per device. But we can enable the exclusion range per
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* device. This is done here
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*/
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set_dev_entry_bit(m->devid, DEV_ENTRY_EX);
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iommu->exclusion_start = m->range_start;
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iommu->exclusion_length = m->range_length;
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}
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}
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/*
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* This function reads some important data from the IOMMU PCI space and
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* initializes the driver data structure with it. It reads the hardware
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* capabilities and the first/last device entries
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*/
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static void __init init_iommu_from_pci(struct amd_iommu *iommu)
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{
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int bus = PCI_BUS(iommu->devid);
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iommu->last_device = DEVID(MMIO_GET_BUS(range), MMIO_GET_LD(range));
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}
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/*
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* Takes a pointer to an AMD IOMMU entry in the ACPI table and
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* initializes the hardware and our data structures with it.
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*/
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static void __init init_iommu_from_acpi(struct amd_iommu *iommu,
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struct ivhd_header *h)
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{
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}
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}
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/* Initializes the device->iommu mapping for the driver */
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static int __init init_iommu_devices(struct amd_iommu *iommu)
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{
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u16 i;
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}
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}
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/*
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* This function clues the initialization function for one IOMMU
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* together and also allocates the command buffer and programs the
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* hardware. It does NOT enable the IOMMU. This is done afterwards.
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*/
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static int __init init_iommu_one(struct amd_iommu *iommu, struct ivhd_header *h)
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{
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spin_lock_init(&iommu->lock);
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return 0;
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}
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/*
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* Iterates over all IOMMU entries in the ACPI table, allocates the
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* IOMMU structure and initializes it with init_iommu_one()
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*/
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static int __init init_iommu_all(struct acpi_table_header *table)
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{
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u8 *p = (u8 *)table, *end = (u8 *)table;
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return 0;
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}
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/****************************************************************************
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*
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* The next functions belong to the third pass of parsing the ACPI
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* table. In this last pass the memory mapping requirements are
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* gathered (like exclusion and unity mapping reanges).
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*
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****************************************************************************/
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static void __init free_unity_maps(void)
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{
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struct unity_map_entry *entry, *next;
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}
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}
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/* called when we find an exclusion range definition in ACPI */
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static int __init init_exclusion_range(struct ivmd_header *m)
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{
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int i;
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return 0;
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}
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/* called for unity map ACPI definition */
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static int __init init_unity_map_range(struct ivmd_header *m)
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{
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struct unity_map_entry *e = 0;
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return 0;
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}
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/* iterates over all memory definitions we find in the ACPI table */
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static int __init init_memory_definitions(struct acpi_table_header *table)
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{
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u8 *p = (u8 *)table, *end = (u8 *)table;
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return 0;
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}
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/*
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* This function finally enables all IOMMUs found in the system after
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* they have been initialized
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*/
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static void __init enable_iommus(void)
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{
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struct amd_iommu *iommu;
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.cls = &amd_iommu_sysdev_class,
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};
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/*
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* This is the core init function for AMD IOMMU hardware in the system.
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* This function is called from the generic x86 DMA layer initialization
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* code.
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*
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* This function basically parses the ACPI table for AMD IOMMU (IVRS)
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* three times:
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*
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* 1 pass) Find the highest PCI device id the driver has to handle.
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* Upon this information the size of the data structures is
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* determined that needs to be allocated.
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*
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* 2 pass) Initialize the data structures just allocated with the
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* information in the ACPI table about available AMD IOMMUs
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* in the system. It also maps the PCI devices in the
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* system to specific IOMMUs
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*
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* 3 pass) After the basic data structures are allocated and
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* initialized we update them with information about memory
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* remapping requirements parsed out of the ACPI table in
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* this last pass.
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*
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* After that the hardware is initialized and ready to go. In the last
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* step we do some Linux specific things like registering the driver in
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* the dma_ops interface and initializing the suspend/resume support
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* functions. Finally it prints some information about AMD IOMMUs and
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* the driver state and enables the hardware.
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*/
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int __init amd_iommu_init(void)
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{
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int i, ret = 0;
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@ -821,6 +1005,13 @@ int __init amd_iommu_init(void)
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goto out;
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}
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/****************************************************************************
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*
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* Early detect code. This code runs at IOMMU detection time in the DMA
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* layer. It just looks if there is an IVRS ACPI table to detect AMD
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* IOMMUs
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*
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****************************************************************************/
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static int __init early_amd_iommu_detect(struct acpi_table_header *table)
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{
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return 0;
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}
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}
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/****************************************************************************
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*
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* Parsing functions for the AMD IOMMU specific kernel command line
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* options.
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*
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****************************************************************************/
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static int __init parse_amd_iommu_options(char *str)
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{
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for (; *str; ++str) {
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