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drm/i915: rename intel_enable_pch_pll to ironlake_enable_pch_pll 

Because this function is only for the older PCHs, not the newer ones.

Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com>
Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Paulo Zanoni 2012-10-31 18:12:38 -02:00 committed by Daniel Vetter
parent 8c52b5e855
commit b6b4e185a7
1 changed files with 4 additions and 4 deletions
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8
drivers/gpu/drm/i915/intel_display.c
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@ -1579,14 +1579,14 @@ intel_sbi_read(struct drm_i915_private *dev_priv, u16 reg)
}
/**
* intel_enable_pch_pll - enable PCH PLL
* ironlake_enable_pch_pll - enable PCH PLL
* @dev_priv: i915 private structure
* @pipe: pipe PLL to enable
*
* The PCH PLL needs to be enabled before the PCH transcoder, since it
* drives the transcoder clock.
*/
static void intel_enable_pch_pll(struct intel_crtc *intel_crtc)
static void ironlake_enable_pch_pll(struct intel_crtc *intel_crtc)
{
struct drm_i915_private *dev_priv = intel_crtc->base.dev->dev_private;
struct intel_pch_pll *pll;
@ -3084,7 +3084,7 @@ static void ironlake_pch_enable(struct drm_crtc *crtc)
* Note that enable_pch_pll tries to do the right thing, but get_pch_pll
* unconditionally resets the pll - we need that to have the right LVDS
* enable sequence. */
intel_enable_pch_pll(intel_crtc);
ironlake_enable_pch_pll(intel_crtc);
if (HAS_PCH_CPT(dev)) {
u32 sel;
@ -3188,7 +3188,7 @@ static void lpt_pch_enable(struct drm_crtc *crtc)
* Note that enable_pch_pll tries to do the right thing, but get_pch_pll
* unconditionally resets the pll - we need that to have the right LVDS
* enable sequence. */
intel_enable_pch_pll(intel_crtc);
ironlake_enable_pch_pll(intel_crtc);
lpt_program_iclkip(crtc);