mirror of https://gitee.com/openkylin/linux.git
powerpc/pseries: Enable VFIO
This enables VFIO on pseries host in order to allow VFIO in nested guest under PR KVM or DPDK in a HV guest. This adds support of the VFIO_SPAPR_TCE_IOMMU type. This adds exchange() callback to allow TCE updates by the SPAPR TCE IOMMU driver in VFIO. This initializes DMA32 window parameters in iommu_table_group as as this does not implement VFIO_SPAPR_TCE_v2_IOMMU and VFIO_SPAPR_TCE_IOMMU just reuses the existing DMA32 window. Signed-off-by: Alexey Kardashevskiy <aik@ozlabs.ru> Reviewed-by: David Gibson <david@gibson.dropbear.id.au> Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
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@ -551,6 +551,7 @@ static void iommu_table_setparms(struct pci_controller *phb,
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static void iommu_table_setparms_lpar(struct pci_controller *phb,
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struct device_node *dn,
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struct iommu_table *tbl,
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struct iommu_table_group *table_group,
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const __be32 *dma_window)
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{
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unsigned long offset, size;
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@ -564,6 +565,9 @@ static void iommu_table_setparms_lpar(struct pci_controller *phb,
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tbl->it_type = TCE_PCI;
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tbl->it_offset = offset >> tbl->it_page_shift;
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tbl->it_size = size >> tbl->it_page_shift;
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table_group->tce32_start = offset;
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table_group->tce32_size = size;
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}
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struct iommu_table_ops iommu_table_pseries_ops = {
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@ -652,8 +656,38 @@ static void pci_dma_bus_setup_pSeries(struct pci_bus *bus)
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pr_debug("ISA/IDE, window size is 0x%llx\n", pci->phb->dma_window_size);
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}
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#ifdef CONFIG_IOMMU_API
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static int tce_exchange_pseries(struct iommu_table *tbl, long index, unsigned
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long *tce, enum dma_data_direction *direction)
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{
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long rc;
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unsigned long ioba = (unsigned long) index << tbl->it_page_shift;
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unsigned long flags, oldtce = 0;
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u64 proto_tce = iommu_direction_to_tce_perm(*direction);
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unsigned long newtce = *tce | proto_tce;
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spin_lock_irqsave(&tbl->large_pool.lock, flags);
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rc = plpar_tce_get((u64)tbl->it_index, ioba, &oldtce);
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if (!rc)
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rc = plpar_tce_put((u64)tbl->it_index, ioba, newtce);
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if (!rc) {
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*direction = iommu_tce_direction(oldtce);
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*tce = oldtce & ~(TCE_PCI_READ | TCE_PCI_WRITE);
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}
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spin_unlock_irqrestore(&tbl->large_pool.lock, flags);
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return rc;
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}
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#endif
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struct iommu_table_ops iommu_table_lpar_multi_ops = {
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.set = tce_buildmulti_pSeriesLP,
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#ifdef CONFIG_IOMMU_API
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.exchange = tce_exchange_pseries,
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#endif
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.clear = tce_freemulti_pSeriesLP,
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.get = tce_get_pSeriesLP
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};
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@ -690,7 +724,8 @@ static void pci_dma_bus_setup_pSeriesLP(struct pci_bus *bus)
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if (!ppci->table_group) {
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ppci->table_group = iommu_pseries_alloc_group(ppci->phb->node);
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tbl = ppci->table_group->tables[0];
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iommu_table_setparms_lpar(ppci->phb, pdn, tbl, dma_window);
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iommu_table_setparms_lpar(ppci->phb, pdn, tbl,
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ppci->table_group, dma_window);
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tbl->it_ops = &iommu_table_lpar_multi_ops;
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iommu_init_table(tbl, ppci->phb->node);
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iommu_register_group(ppci->table_group,
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@ -1144,7 +1179,8 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)
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if (!pci->table_group) {
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pci->table_group = iommu_pseries_alloc_group(pci->phb->node);
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tbl = pci->table_group->tables[0];
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iommu_table_setparms_lpar(pci->phb, pdn, tbl, dma_window);
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iommu_table_setparms_lpar(pci->phb, pdn, tbl,
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pci->table_group, dma_window);
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tbl->it_ops = &iommu_table_lpar_multi_ops;
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iommu_init_table(tbl, pci->phb->node);
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iommu_register_group(pci->table_group,
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