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dt-bindings: reset: Add AOSS reset bindings for SDM845 SoCs 

Add SDM845 AOSS (always on subsystem) reset controller binding

Signed-off-by: Sibi Sankar <sibis@codeaurora.org>
Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
This commit is contained in:
Sibi Sankar 2018-06-27 19:54:42 +05:30 committed by Philipp Zabel
parent ce397d215c
commit b79df1ec22
2 changed files with 69 additions and 0 deletions
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52
Documentation/devicetree/bindings/reset/qcom,aoss-reset.txt Normal file
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Qualcomm AOSS Reset Controller
======================================
This binding describes a reset-controller found on AOSS-CC (always on subsystem)
for Qualcomm SDM845 SoCs.
Required properties:
- compatible:
Usage: required
Value type: <string>
Definition: must be:
"qcom,sdm845-aoss-cc"
- reg:
Usage: required
Value type: <prop-encoded-array>
Definition: must specify the base address and size of the register
space.
- #reset-cells:
Usage: required
Value type: <uint>
Definition: must be 1; cell entry represents the reset index.
Example:
aoss_reset: reset-controller@c2a0000 {
compatible = "qcom,sdm845-aoss-cc";
reg = <0xc2a0000 0x31000>;
#reset-cells = <1>;
};
Specifying reset lines connected to IP modules
==============================================
Device nodes that need access to reset lines should
specify them as a reset phandle in their corresponding node as
specified in reset.txt.
For list of all valid reset indicies see
<dt-bindings/reset/qcom,sdm845-aoss.h>
Example:
modem-pil@4080000 {
...
resets = <&aoss_reset AOSS_CC_MSS_RESTART>;
reset-names = "mss_restart";
...
};

17
include/dt-bindings/reset/qcom,sdm845-aoss.h Normal file
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/* SPDX-License-Identifier: GPL-2.0 */
/*
* Copyright (C) 2018 The Linux Foundation. All rights reserved.
*/
#ifndef _DT_BINDINGS_RESET_AOSS_SDM_845_H
#define _DT_BINDINGS_RESET_AOSS_SDM_845_H
#define AOSS_CC_MSS_RESTART 0
#define AOSS_CC_CAMSS_RESTART 1
#define AOSS_CC_VENUS_RESTART 2
#define AOSS_CC_GPU_RESTART 3
#define AOSS_CC_DISPSS_RESTART 4
#define AOSS_CC_WCSS_RESTART 5
#define AOSS_CC_LPASS_RESTART 6
#endif