From b7e2e9f709222687cc0178b31aa8a2a4e5b5f462 Mon Sep 17 00:00:00 2001 From: jimqu Date: Tue, 19 Jul 2016 14:58:02 +0800 Subject: [PATCH] drm/amdgpu: correct coding style MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Signed-off-by: JimQu Reviewed-by: Michel Dänzer Signed-off-by: Alex Deucher --- drivers/gpu/drm/amd/amdgpu/vce_v3_0.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c index d7b8da433fe2..559209bb0083 100644 --- a/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c +++ b/drivers/gpu/drm/amd/amdgpu/vce_v3_0.c @@ -210,11 +210,11 @@ static void vce_v3_0_set_vce_sw_clock_gating(struct amdgpu_device *adev, static int vce_v3_0_firmware_loaded(struct amdgpu_device *adev) { int i, j; - uint32_t status = 0; for (i = 0; i < 10; ++i) { for (j = 0; j < 100; ++j) { - status = RREG32(mmVCE_STATUS); + uint32_t status = RREG32(mmVCE_STATUS); + if (status & VCE_STATUS_VCPU_REPORT_FW_LOADED_MASK) return 0; mdelay(10);