mirror of https://gitee.com/openkylin/linux.git
OMAP2+: clock: autoidle as many clocks as possible if CONFIG_OMAP_RESET_CLOCKS
Attempt to enable autoidle for as many clocks as possible in the OMAP2+-common CONFIG_OMAP_RESET_CLOCKS code. Currently, this only enables DPLL autoidle for OMAP3/4 DPLLs; but future patches will enable autoidle for other clocks and the OMAP2 DPLL/APLLs. In the long run, we should probably get rid of CONFIG_OMAP_RESET_CLOCKS, and unconditionally run the code that it selects. Otherwise, the state of the clock tree won't match the hardware state - this could result in clocks being enabled or disabled unpredictably. Based on a patch by Rajendra Nayak <rnayak@ti.com> that did this in the pm34xx.c/pm44xx.c code. Signed-off-by: Paul Walmsley <paul@pwsan.com> Cc: Rajendra Nayak <rnayak@ti.com>
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@ -813,23 +813,6 @@ static void __init prcm_setup_regs(void)
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omap_ctrl_writel(OMAP3430_AUTOIDLE_MASK, OMAP2_CONTROL_SYSCONFIG);
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/*
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* Set all plls to autoidle. This is needed until autoidle is
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* enabled by clockfw
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*/
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omap2_cm_write_mod_reg(1 << OMAP3430_AUTO_IVA2_DPLL_SHIFT,
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OMAP3430_IVA2_MOD, CM_AUTOIDLE2);
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omap2_cm_write_mod_reg(1 << OMAP3430_AUTO_MPU_DPLL_SHIFT,
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MPU_MOD,
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CM_AUTOIDLE2);
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omap2_cm_write_mod_reg((1 << OMAP3430_AUTO_PERIPH_DPLL_SHIFT) |
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(1 << OMAP3430_AUTO_CORE_DPLL_SHIFT),
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PLL_MOD,
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CM_AUTOIDLE);
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omap2_cm_write_mod_reg(1 << OMAP3430ES2_AUTO_PERIPH2_DPLL_SHIFT,
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PLL_MOD,
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CM_AUTOIDLE2);
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/*
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* Enable control of expternal oscillator through
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* sys_clkreq. In the long run clock framework should
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@ -446,6 +446,7 @@ static int __init clk_disable_unused(void)
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return 0;
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}
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late_initcall(clk_disable_unused);
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late_initcall(omap_clk_enable_autoidle_all);
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#endif
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int __init clk_init(struct clk_functions * custom_clocks)
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