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ARM: dts: Fix wrong address for omap5 sata phy 

Looks like I missed converting the omap5 sata phy addresses to use offset
from the module base instead of full physical address.

While at it, we can also more it to be a direct child of the interconnect
target module, it is not really a child of the ocp2scp control device.

Cc: Peter Ujfalusi <peter.ujfalusi@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
This commit is contained in:
Tony Lindgren 2018-12-12 15:46:16 -08:00
parent 5241ccbf28
commit b822233593
1 changed files with 13 additions and 13 deletions
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26
arch/arm/boot/dts/omap5-l4.dtsi
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@ -515,19 +515,19 @@ ocp2scp@0 {
#address-cells = <1>;
#size-cells = <1>;
reg = <0x0 0x20>;
ranges = <0 0 0x4000>;
sata_phy: phy@4a096000 {
compatible = "ti,phy-pipe3-sata";
reg = <0x6000 0x80>, /* phy_rx */
<0x4A096400 0x64>, /* phy_tx */
<0x4A096800 0x40>; /* pll_ctrl */
reg-names = "phy_rx", "phy_tx", "pll_ctrl";
syscon-phy-power = <&scm_conf 0x374>;
clocks = <&sys_clkin>,
<&l3init_clkctrl OMAP5_SATA_CLKCTRL 8>;
clock-names = "sysclk", "refclk";
#phy-cells = <0>;
};
};
sata_phy: phy@6000 {
compatible = "ti,phy-pipe3-sata";
reg = <0x6000 0x80>, /* phy_rx */
<0x6400 0x64>, /* phy_tx */
<0x6800 0x40>; /* pll_ctrl */
reg-names = "phy_rx", "phy_tx", "pll_ctrl";
syscon-phy-power = <&scm_conf 0x374>;
clocks = <&sys_clkin>,
<&l3init_clkctrl OMAP5_SATA_CLKCTRL 8>;
clock-names = "sysclk", "refclk";
#phy-cells = <0>;
};
};