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docs: perf: Address some html build warnings
Fix following html build warnings:
Documentation/admin-guide/perf/hisi-pmu.rst:61: WARNING: Unexpected indentation.
Documentation/admin-guide/perf/hisi-pmu.rst:62: WARNING: Block quote ends without a blank line; unexpected unindent.
Documentation/admin-guide/perf/hisi-pmu.rst:69: WARNING: Unexpected indentation.
Documentation/admin-guide/perf/hisi-pmu.rst:70: WARNING: Block quote ends without a blank line; unexpected unindent.
Documentation/admin-guide/perf/hisi-pmu.rst:83: WARNING: Unexpected indentation.
Fixes: 9b86b1b41e
("docs: perf: Add new description on HiSilicon uncore PMU v2")
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Qi Liu <liuqi115@huawei.com>
Link: https://lore.kernel.org/r/1617021121-31450-1-git-send-email-liuqi115@huawei.com
Signed-off-by: Will Deacon <will@kernel.org>
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@ -57,16 +57,20 @@ For HiSilicon uncore PMU v2 whose identifier is 0x30, the topology is the same
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as PMU v1, but some new functions are added to the hardware.
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(a) L3C PMU supports filtering by core/thread within the cluster which can be
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specified as a bitmap.
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specified as a bitmap::
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$# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_core=0x3/ sleep 5
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This will only count the operations from core/thread 0 and 1 in this cluster.
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(b) Tracetag allow the user to chose to count only read, write or atomic
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operations via the tt_req parameeter in perf. The default value counts all
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operations. tt_req is 3bits, 3'b100 represents read operations, 3'b101
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represents write operations, 3'b110 represents atomic store operations and
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3'b111 represents atomic non-store operations, other values are reserved.
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3'b111 represents atomic non-store operations, other values are reserved::
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$# perf stat -a -e hisi_sccl3_l3c0/config=0x02,tt_req=0x4/ sleep 5
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This will only count the read operations in this cluster.
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(c) Datasrc allows the user to check where the data comes from. It is 5 bits.
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@ -79,7 +83,8 @@ Some important codes are as follows:
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5'b10000: comes from cross-socket DDR;
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etc, it is mainly helpful to find that the data source is nearest from the CPU
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cores. If datasrc_cfg is used in the multi-chips, the datasrc_skt shall be
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configured in perf command.
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configured in perf command::
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$# perf stat -a -e hisi_sccl3_l3c0/config=0xb9,datasrc_cfg=0xE/,
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hisi_sccl3_l3c0/config=0xb9,datasrc_cfg=0xF/ sleep 5
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