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drm/amd/display: Remove switching of clk sources at end of commit 

This should be taken care of in validate now.

All of timing sync is quite broken at the moment anyways. Will submit
another patch set to address that.

Signed-off-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Andrey Grodzovsky <Andrey.Grodzovsky@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This commit is contained in:
Harry Wentland 2017-08-28 19:44:38 -04:00 committed by Alex Deucher
parent 9d0dcecd93
commit b8ea60cea2
1 changed files with 0 additions and 36 deletions
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36
drivers/gpu/drm/amd/display/dc/dce110/dce110_hw_sequencer.c
View File

@ -1344,40 +1344,6 @@ static void set_safe_displaymarks(
}
}
static void switch_dp_clock_sources(
const struct dc *dc,
struct resource_context *res_ctx)
{
uint8_t i;
for (i = 0; i < MAX_PIPES; i++) {
struct pipe_ctx *pipe_ctx = &res_ctx->pipe_ctx[i];
if (pipe_ctx->stream == NULL || pipe_ctx->top_pipe)
continue;
if (dc_is_dp_signal(pipe_ctx->stream->signal)) {
struct clock_source *clk_src =
resource_find_used_clk_src_for_sharing(
res_ctx, pipe_ctx);
if (clk_src &&
clk_src != pipe_ctx->clock_source) {
if (resource_unreference_clock_source(res_ctx,
dc->res_pool, pipe_ctx->clock_source)) {
pipe_ctx->clock_source->funcs->cs_power_down(pipe_ctx->clock_source);
pipe_ctx->clock_source = NULL;
}
pipe_ctx->clock_source = clk_src;
resource_reference_clock_source(
res_ctx, dc->res_pool, clk_src);
dce_crtc_switch_to_clk_src(dc->hwseq, clk_src, i);
}
}
}
}
/*******************************************************************************
* Public functions
******************************************************************************/
@ -1939,8 +1905,6 @@ enum dc_status dce110_apply_ctx_to_hw(
dcb->funcs->set_scratch_critical_state(dcb, false);
switch_dp_clock_sources(dc, &context->res_ctx);
#ifdef ENABLE_FBC
if (dc->fbc_compressor)
enable_fbc(dc, context);