mirror of https://gitee.com/openkylin/linux.git
drm/amdkfd: Add GFXv9 MQD manager
Signed-off-by: John Bridgman <john.bridgman@amd.com> Signed-off-by: Jay Cornwall <Jay.Cornwall@amd.com> Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com> Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com> Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
This commit is contained in:
Felix Kuehling
Oded Gabbay
parent
454150b1f9
commit
b91d43dd01
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@ -30,6 +30,7 @@ amdkfd-y := kfd_module.o kfd_device.o kfd_chardev.o kfd_topology.o \
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kfd_pasid.o kfd_doorbell.o kfd_flat_memory.o \
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kfd_process.o kfd_queue.o kfd_mqd_manager.o \
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kfd_mqd_manager_cik.o kfd_mqd_manager_vi.o \
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kfd_mqd_manager_v9.o \
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kfd_kernel_queue.o kfd_kernel_queue_cik.o \
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kfd_kernel_queue_vi.o kfd_kernel_queue_v9.o \
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kfd_packet_manager.o kfd_process_queue_manager.o \
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@ -700,7 +700,7 @@ int kfd_gtt_sa_allocate(struct kfd_dev *kfd, unsigned int size,
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if (size > kfd->gtt_sa_num_of_chunks * kfd->gtt_sa_chunk_size)
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return -ENOMEM;
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*mem_obj = kmalloc(sizeof(struct kfd_mem_obj), GFP_NOIO);
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*mem_obj = kzalloc(sizeof(struct kfd_mem_obj), GFP_NOIO);
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if ((*mem_obj) == NULL)
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return -ENOMEM;
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@ -38,6 +38,9 @@ struct mqd_manager *mqd_manager_init(enum KFD_MQD_TYPE type,
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case CHIP_POLARIS10:
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case CHIP_POLARIS11:
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return mqd_manager_init_vi_tonga(type, dev);
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case CHIP_VEGA10:
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case CHIP_RAVEN:
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return mqd_manager_init_v9(type, dev);
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default:
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WARN(1, "Unexpected ASIC family %u",
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dev->device_info->asic_family);
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@ -0,0 +1,443 @@
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/*
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* Copyright 2016-2018 Advanced Micro Devices, Inc.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
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* THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
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* OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
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* ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
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* OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#include <linux/printk.h>
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#include <linux/slab.h>
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#include <linux/uaccess.h>
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#include "kfd_priv.h"
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#include "kfd_mqd_manager.h"
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#include "v9_structs.h"
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#include "gc/gc_9_0_offset.h"
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#include "gc/gc_9_0_sh_mask.h"
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#include "sdma0/sdma0_4_0_sh_mask.h"
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static inline struct v9_mqd *get_mqd(void *mqd)
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{
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return (struct v9_mqd *)mqd;
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}
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static inline struct v9_sdma_mqd *get_sdma_mqd(void *mqd)
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{
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return (struct v9_sdma_mqd *)mqd;
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}
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static int init_mqd(struct mqd_manager *mm, void **mqd,
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struct kfd_mem_obj **mqd_mem_obj, uint64_t *gart_addr,
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struct queue_properties *q)
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{
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int retval;
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uint64_t addr;
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struct v9_mqd *m;
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struct kfd_dev *kfd = mm->dev;
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/* From V9, for CWSR, the control stack is located on the next page
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* boundary after the mqd, we will use the gtt allocation function
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* instead of sub-allocation function.
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*/
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if (kfd->cwsr_enabled && (q->type == KFD_QUEUE_TYPE_COMPUTE)) {
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*mqd_mem_obj = kzalloc(sizeof(struct kfd_mem_obj), GFP_NOIO);
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if (!*mqd_mem_obj)
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return -ENOMEM;
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retval = kfd->kfd2kgd->init_gtt_mem_allocation(kfd->kgd,
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ALIGN(q->ctl_stack_size, PAGE_SIZE) +
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ALIGN(sizeof(struct v9_mqd), PAGE_SIZE),
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&((*mqd_mem_obj)->gtt_mem),
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&((*mqd_mem_obj)->gpu_addr),
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(void *)&((*mqd_mem_obj)->cpu_ptr));
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} else
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retval = kfd_gtt_sa_allocate(mm->dev, sizeof(struct v9_mqd),
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mqd_mem_obj);
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if (retval != 0)
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return -ENOMEM;
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m = (struct v9_mqd *) (*mqd_mem_obj)->cpu_ptr;
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addr = (*mqd_mem_obj)->gpu_addr;
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memset(m, 0, sizeof(struct v9_mqd));
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m->header = 0xC0310800;
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m->compute_pipelinestat_enable = 1;
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m->compute_static_thread_mgmt_se0 = 0xFFFFFFFF;
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m->compute_static_thread_mgmt_se1 = 0xFFFFFFFF;
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m->compute_static_thread_mgmt_se2 = 0xFFFFFFFF;
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m->compute_static_thread_mgmt_se3 = 0xFFFFFFFF;
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m->cp_hqd_persistent_state = CP_HQD_PERSISTENT_STATE__PRELOAD_REQ_MASK |
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0x53 << CP_HQD_PERSISTENT_STATE__PRELOAD_SIZE__SHIFT;
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m->cp_mqd_control = 1 << CP_MQD_CONTROL__PRIV_STATE__SHIFT;
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m->cp_mqd_base_addr_lo = lower_32_bits(addr);
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m->cp_mqd_base_addr_hi = upper_32_bits(addr);
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m->cp_hqd_quantum = 1 << CP_HQD_QUANTUM__QUANTUM_EN__SHIFT |
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1 << CP_HQD_QUANTUM__QUANTUM_SCALE__SHIFT |
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10 << CP_HQD_QUANTUM__QUANTUM_DURATION__SHIFT;
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m->cp_hqd_pipe_priority = 1;
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m->cp_hqd_queue_priority = 15;
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if (q->format == KFD_QUEUE_FORMAT_AQL) {
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m->cp_hqd_aql_control =
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1 << CP_HQD_AQL_CONTROL__CONTROL0__SHIFT;
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}
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if (q->tba_addr) {
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m->compute_pgm_rsrc2 |=
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(1 << COMPUTE_PGM_RSRC2__TRAP_PRESENT__SHIFT);
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}
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if (mm->dev->cwsr_enabled && q->ctx_save_restore_area_address) {
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m->cp_hqd_persistent_state |=
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(1 << CP_HQD_PERSISTENT_STATE__QSWITCH_MODE__SHIFT);
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m->cp_hqd_ctx_save_base_addr_lo =
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lower_32_bits(q->ctx_save_restore_area_address);
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m->cp_hqd_ctx_save_base_addr_hi =
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upper_32_bits(q->ctx_save_restore_area_address);
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m->cp_hqd_ctx_save_size = q->ctx_save_restore_area_size;
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m->cp_hqd_cntl_stack_size = q->ctl_stack_size;
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m->cp_hqd_cntl_stack_offset = q->ctl_stack_size;
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m->cp_hqd_wg_state_offset = q->ctl_stack_size;
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}
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*mqd = m;
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if (gart_addr)
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*gart_addr = addr;
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retval = mm->update_mqd(mm, m, q);
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return retval;
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}
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static int load_mqd(struct mqd_manager *mm, void *mqd,
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uint32_t pipe_id, uint32_t queue_id,
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struct queue_properties *p, struct mm_struct *mms)
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{
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/* AQL write pointer counts in 64B packets, PM4/CP counts in dwords. */
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uint32_t wptr_shift = (p->format == KFD_QUEUE_FORMAT_AQL ? 4 : 0);
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return mm->dev->kfd2kgd->hqd_load(mm->dev->kgd, mqd, pipe_id, queue_id,
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(uint32_t __user *)p->write_ptr,
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wptr_shift, 0, mms);
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}
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static int update_mqd(struct mqd_manager *mm, void *mqd,
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struct queue_properties *q)
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{
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struct v9_mqd *m;
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m = get_mqd(mqd);
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m->cp_hqd_pq_control = 5 << CP_HQD_PQ_CONTROL__RPTR_BLOCK_SIZE__SHIFT;
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m->cp_hqd_pq_control |= order_base_2(q->queue_size / 4) - 1;
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pr_debug("cp_hqd_pq_control 0x%x\n", m->cp_hqd_pq_control);
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m->cp_hqd_pq_base_lo = lower_32_bits((uint64_t)q->queue_address >> 8);
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m->cp_hqd_pq_base_hi = upper_32_bits((uint64_t)q->queue_address >> 8);
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m->cp_hqd_pq_rptr_report_addr_lo = lower_32_bits((uint64_t)q->read_ptr);
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m->cp_hqd_pq_rptr_report_addr_hi = upper_32_bits((uint64_t)q->read_ptr);
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m->cp_hqd_pq_wptr_poll_addr_lo = lower_32_bits((uint64_t)q->write_ptr);
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m->cp_hqd_pq_wptr_poll_addr_hi = upper_32_bits((uint64_t)q->write_ptr);
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m->cp_hqd_pq_doorbell_control =
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q->doorbell_off <<
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CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_OFFSET__SHIFT;
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pr_debug("cp_hqd_pq_doorbell_control 0x%x\n",
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m->cp_hqd_pq_doorbell_control);
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m->cp_hqd_ib_control =
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3 << CP_HQD_IB_CONTROL__MIN_IB_AVAIL_SIZE__SHIFT |
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1 << CP_HQD_IB_CONTROL__IB_EXE_DISABLE__SHIFT;
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/*
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* HW does not clamp this field correctly. Maximum EOP queue size
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* is constrained by per-SE EOP done signal count, which is 8-bit.
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* Limit is 0xFF EOP entries (= 0x7F8 dwords). CP will not submit
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* more than (EOP entry count - 1) so a queue size of 0x800 dwords
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* is safe, giving a maximum field value of 0xA.
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*/
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m->cp_hqd_eop_control = min(0xA,
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order_base_2(q->eop_ring_buffer_size / 4) - 1);
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m->cp_hqd_eop_base_addr_lo =
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lower_32_bits(q->eop_ring_buffer_address >> 8);
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m->cp_hqd_eop_base_addr_hi =
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upper_32_bits(q->eop_ring_buffer_address >> 8);
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m->cp_hqd_iq_timer = 0;
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m->cp_hqd_vmid = q->vmid;
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if (q->format == KFD_QUEUE_FORMAT_AQL) {
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m->cp_hqd_pq_control |= CP_HQD_PQ_CONTROL__NO_UPDATE_RPTR_MASK |
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2 << CP_HQD_PQ_CONTROL__SLOT_BASED_WPTR__SHIFT |
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1 << CP_HQD_PQ_CONTROL__QUEUE_FULL_EN__SHIFT |
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1 << CP_HQD_PQ_CONTROL__WPP_CLAMP_EN__SHIFT;
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m->cp_hqd_pq_doorbell_control |= 1 <<
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CP_HQD_PQ_DOORBELL_CONTROL__DOORBELL_BIF_DROP__SHIFT;
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}
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if (mm->dev->cwsr_enabled && q->ctx_save_restore_area_address)
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m->cp_hqd_ctx_save_control = 0;
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q->is_active = (q->queue_size > 0 &&
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q->queue_address != 0 &&
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q->queue_percent > 0 &&
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!q->is_evicted);
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return 0;
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}
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static int destroy_mqd(struct mqd_manager *mm, void *mqd,
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enum kfd_preempt_type type,
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unsigned int timeout, uint32_t pipe_id,
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uint32_t queue_id)
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{
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return mm->dev->kfd2kgd->hqd_destroy
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(mm->dev->kgd, mqd, type, timeout,
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pipe_id, queue_id);
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}
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static void uninit_mqd(struct mqd_manager *mm, void *mqd,
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struct kfd_mem_obj *mqd_mem_obj)
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{
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struct kfd_dev *kfd = mm->dev;
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if (mqd_mem_obj->gtt_mem) {
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kfd->kfd2kgd->free_gtt_mem(kfd->kgd, mqd_mem_obj->gtt_mem);
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kfree(mqd_mem_obj);
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} else {
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kfd_gtt_sa_free(mm->dev, mqd_mem_obj);
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}
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}
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static bool is_occupied(struct mqd_manager *mm, void *mqd,
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uint64_t queue_address, uint32_t pipe_id,
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uint32_t queue_id)
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{
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return mm->dev->kfd2kgd->hqd_is_occupied(
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mm->dev->kgd, queue_address,
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pipe_id, queue_id);
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}
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static int init_mqd_hiq(struct mqd_manager *mm, void **mqd,
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struct kfd_mem_obj **mqd_mem_obj, uint64_t *gart_addr,
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struct queue_properties *q)
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{
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struct v9_mqd *m;
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int retval = init_mqd(mm, mqd, mqd_mem_obj, gart_addr, q);
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if (retval != 0)
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return retval;
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m = get_mqd(*mqd);
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m->cp_hqd_pq_control |= 1 << CP_HQD_PQ_CONTROL__PRIV_STATE__SHIFT |
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1 << CP_HQD_PQ_CONTROL__KMD_QUEUE__SHIFT;
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return retval;
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}
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static int update_mqd_hiq(struct mqd_manager *mm, void *mqd,
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struct queue_properties *q)
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{
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struct v9_mqd *m;
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int retval = update_mqd(mm, mqd, q);
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if (retval != 0)
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return retval;
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/* TODO: what's the point? update_mqd already does this. */
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m = get_mqd(mqd);
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m->cp_hqd_vmid = q->vmid;
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return retval;
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}
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static int init_mqd_sdma(struct mqd_manager *mm, void **mqd,
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struct kfd_mem_obj **mqd_mem_obj, uint64_t *gart_addr,
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struct queue_properties *q)
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{
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int retval;
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struct v9_sdma_mqd *m;
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retval = kfd_gtt_sa_allocate(mm->dev,
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sizeof(struct v9_sdma_mqd),
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mqd_mem_obj);
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if (retval != 0)
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return -ENOMEM;
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m = (struct v9_sdma_mqd *) (*mqd_mem_obj)->cpu_ptr;
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memset(m, 0, sizeof(struct v9_sdma_mqd));
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*mqd = m;
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if (gart_addr)
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*gart_addr = (*mqd_mem_obj)->gpu_addr;
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retval = mm->update_mqd(mm, m, q);
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return retval;
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}
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static void uninit_mqd_sdma(struct mqd_manager *mm, void *mqd,
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struct kfd_mem_obj *mqd_mem_obj)
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{
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kfd_gtt_sa_free(mm->dev, mqd_mem_obj);
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}
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static int load_mqd_sdma(struct mqd_manager *mm, void *mqd,
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uint32_t pipe_id, uint32_t queue_id,
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struct queue_properties *p, struct mm_struct *mms)
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{
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return mm->dev->kfd2kgd->hqd_sdma_load(mm->dev->kgd, mqd,
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(uint32_t __user *)p->write_ptr,
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mms);
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}
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#define SDMA_RLC_DUMMY_DEFAULT 0xf
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static int update_mqd_sdma(struct mqd_manager *mm, void *mqd,
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struct queue_properties *q)
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{
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struct v9_sdma_mqd *m;
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m = get_sdma_mqd(mqd);
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m->sdmax_rlcx_rb_cntl = order_base_2(q->queue_size / 4)
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<< SDMA0_RLC0_RB_CNTL__RB_SIZE__SHIFT |
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q->vmid << SDMA0_RLC0_RB_CNTL__RB_VMID__SHIFT |
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1 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_ENABLE__SHIFT |
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6 << SDMA0_RLC0_RB_CNTL__RPTR_WRITEBACK_TIMER__SHIFT;
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m->sdmax_rlcx_rb_base = lower_32_bits(q->queue_address >> 8);
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m->sdmax_rlcx_rb_base_hi = upper_32_bits(q->queue_address >> 8);
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m->sdmax_rlcx_rb_rptr_addr_lo = lower_32_bits((uint64_t)q->read_ptr);
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m->sdmax_rlcx_rb_rptr_addr_hi = upper_32_bits((uint64_t)q->read_ptr);
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m->sdmax_rlcx_doorbell_offset =
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q->doorbell_off << SDMA0_RLC0_DOORBELL_OFFSET__OFFSET__SHIFT;
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m->sdma_engine_id = q->sdma_engine_id;
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m->sdma_queue_id = q->sdma_queue_id;
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m->sdmax_rlcx_dummy_reg = SDMA_RLC_DUMMY_DEFAULT;
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q->is_active = (q->queue_size > 0 &&
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q->queue_address != 0 &&
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q->queue_percent > 0 &&
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!q->is_evicted);
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return 0;
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}
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/*
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* * preempt type here is ignored because there is only one way
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* * to preempt sdma queue
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*/
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static int destroy_mqd_sdma(struct mqd_manager *mm, void *mqd,
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enum kfd_preempt_type type,
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unsigned int timeout, uint32_t pipe_id,
|
||||
uint32_t queue_id)
|
||||
{
|
||||
return mm->dev->kfd2kgd->hqd_sdma_destroy(mm->dev->kgd, mqd, timeout);
|
||||
}
|
||||
|
||||
static bool is_occupied_sdma(struct mqd_manager *mm, void *mqd,
|
||||
uint64_t queue_address, uint32_t pipe_id,
|
||||
uint32_t queue_id)
|
||||
{
|
||||
return mm->dev->kfd2kgd->hqd_sdma_is_occupied(mm->dev->kgd, mqd);
|
||||
}
|
||||
|
||||
#if defined(CONFIG_DEBUG_FS)
|
||||
|
||||
static int debugfs_show_mqd(struct seq_file *m, void *data)
|
||||
{
|
||||
seq_hex_dump(m, " ", DUMP_PREFIX_OFFSET, 32, 4,
|
||||
data, sizeof(struct v9_mqd), false);
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int debugfs_show_mqd_sdma(struct seq_file *m, void *data)
|
||||
{
|
||||
seq_hex_dump(m, " ", DUMP_PREFIX_OFFSET, 32, 4,
|
||||
data, sizeof(struct v9_sdma_mqd), false);
|
||||
return 0;
|
||||
}
|
||||
|
||||
#endif
|
||||
|
||||
struct mqd_manager *mqd_manager_init_v9(enum KFD_MQD_TYPE type,
|
||||
struct kfd_dev *dev)
|
||||
{
|
||||
struct mqd_manager *mqd;
|
||||
|
||||
if (WARN_ON(type >= KFD_MQD_TYPE_MAX))
|
||||
return NULL;
|
||||
|
||||
mqd = kzalloc(sizeof(*mqd), GFP_NOIO);
|
||||
if (!mqd)
|
||||
return NULL;
|
||||
|
||||
mqd->dev = dev;
|
||||
|
||||
switch (type) {
|
||||
case KFD_MQD_TYPE_CP:
|
||||
case KFD_MQD_TYPE_COMPUTE:
|
||||
mqd->init_mqd = init_mqd;
|
||||
mqd->uninit_mqd = uninit_mqd;
|
||||
mqd->load_mqd = load_mqd;
|
||||
mqd->update_mqd = update_mqd;
|
||||
mqd->destroy_mqd = destroy_mqd;
|
||||
mqd->is_occupied = is_occupied;
|
||||
#if defined(CONFIG_DEBUG_FS)
|
||||
mqd->debugfs_show_mqd = debugfs_show_mqd;
|
||||
#endif
|
||||
break;
|
||||
case KFD_MQD_TYPE_HIQ:
|
||||
mqd->init_mqd = init_mqd_hiq;
|
||||
mqd->uninit_mqd = uninit_mqd;
|
||||
mqd->load_mqd = load_mqd;
|
||||
mqd->update_mqd = update_mqd_hiq;
|
||||
mqd->destroy_mqd = destroy_mqd;
|
||||
mqd->is_occupied = is_occupied;
|
||||
#if defined(CONFIG_DEBUG_FS)
|
||||
mqd->debugfs_show_mqd = debugfs_show_mqd;
|
||||
#endif
|
||||
break;
|
||||
case KFD_MQD_TYPE_SDMA:
|
||||
mqd->init_mqd = init_mqd_sdma;
|
||||
mqd->uninit_mqd = uninit_mqd_sdma;
|
||||
mqd->load_mqd = load_mqd_sdma;
|
||||
mqd->update_mqd = update_mqd_sdma;
|
||||
mqd->destroy_mqd = destroy_mqd_sdma;
|
||||
mqd->is_occupied = is_occupied_sdma;
|
||||
#if defined(CONFIG_DEBUG_FS)
|
||||
mqd->debugfs_show_mqd = debugfs_show_mqd_sdma;
|
||||
#endif
|
||||
break;
|
||||
default:
|
||||
kfree(mqd);
|
||||
return NULL;
|
||||
}
|
||||
|
||||
return mqd;
|
||||
}
|
||||
|
|
@ -197,6 +197,7 @@ struct kfd_mem_obj {
|
|||
uint32_t range_end;
|
||||
uint64_t gpu_addr;
|
||||
uint32_t *cpu_ptr;
|
||||
void *gtt_mem;
|
||||
};
|
||||
|
||||
struct kfd_vmid_info {
|
||||
|
|
@ -822,6 +823,8 @@ struct mqd_manager *mqd_manager_init_vi(enum KFD_MQD_TYPE type,
|
|||
struct kfd_dev *dev);
|
||||
struct mqd_manager *mqd_manager_init_vi_tonga(enum KFD_MQD_TYPE type,
|
||||
struct kfd_dev *dev);
|
||||
struct mqd_manager *mqd_manager_init_v9(enum KFD_MQD_TYPE type,
|
||||
struct kfd_dev *dev);
|
||||
struct device_queue_manager *device_queue_manager_init(struct kfd_dev *dev);
|
||||
void device_queue_manager_uninit(struct device_queue_manager *dqm);
|
||||
struct kernel_queue *kernel_queue_init(struct kfd_dev *dev,
|
||||
|
|
|
|||
Loading…
Reference in New Issue