mirror of https://gitee.com/openkylin/linux.git
ARM: l2c: move and add ARM L2C-2x0/L2C-310 save/resume code to non-OF
Add the save/resume code hooks to the non-OF implementations as well. There's no reason for the non-OF implementations to be any different from the OF implementations. Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
This commit is contained in:
Russell King
parent
cdef8689ef
commit
b98556f26d
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@ -383,6 +383,21 @@ static void l2x0_enable(void __iomem *base, u32 aux, unsigned num_lock)
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writel_relaxed(L2X0_CTRL_EN, base + L2X0_CTRL);
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}
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static void l2x0_resume(void)
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{
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if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
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/* restore aux ctrl and enable l2 */
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l2x0_unlock(readl_relaxed(l2x0_base + L2X0_CACHE_ID));
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writel_relaxed(l2x0_saved_regs.aux_ctrl, l2x0_base +
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L2X0_AUX_CTRL);
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l2x0_inv_all();
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writel_relaxed(L2X0_CTRL_EN, l2x0_base + L2X0_CTRL);
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}
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}
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static const struct l2c_init_data l2x0_init_fns __initconst = {
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.enable = l2x0_enable,
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.outer_cache = {
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@ -392,6 +407,7 @@ static const struct l2c_init_data l2x0_init_fns __initconst = {
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.flush_all = l2x0_flush_all,
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.disable = l2x0_disable,
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.sync = l2x0_cache_sync,
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.resume = l2x0_resume,
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},
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};
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@ -422,6 +438,65 @@ static const struct l2c_init_data l2x0_init_fns __initconst = {
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* Affects: store buffer
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* store buffer is not automatically drained.
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*/
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static void __init pl310_save(void __iomem *base)
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{
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u32 l2x0_revision = readl_relaxed(base + L2X0_CACHE_ID) &
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L2X0_CACHE_ID_RTL_MASK;
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l2x0_saved_regs.tag_latency = readl_relaxed(base +
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L2X0_TAG_LATENCY_CTRL);
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l2x0_saved_regs.data_latency = readl_relaxed(base +
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L2X0_DATA_LATENCY_CTRL);
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l2x0_saved_regs.filter_end = readl_relaxed(base +
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L2X0_ADDR_FILTER_END);
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l2x0_saved_regs.filter_start = readl_relaxed(base +
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L2X0_ADDR_FILTER_START);
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if (l2x0_revision >= L310_CACHE_ID_RTL_R2P0) {
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/*
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* From r2p0, there is Prefetch offset/control register
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*/
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l2x0_saved_regs.prefetch_ctrl = readl_relaxed(base +
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L2X0_PREFETCH_CTRL);
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/*
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* From r3p0, there is Power control register
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*/
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if (l2x0_revision >= L310_CACHE_ID_RTL_R3P0)
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l2x0_saved_regs.pwr_ctrl = readl_relaxed(base +
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L2X0_POWER_CTRL);
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}
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}
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static void pl310_resume(void)
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{
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u32 l2x0_revision;
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if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
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/* restore pl310 setup */
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writel_relaxed(l2x0_saved_regs.tag_latency,
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l2x0_base + L2X0_TAG_LATENCY_CTRL);
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writel_relaxed(l2x0_saved_regs.data_latency,
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l2x0_base + L2X0_DATA_LATENCY_CTRL);
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writel_relaxed(l2x0_saved_regs.filter_end,
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l2x0_base + L2X0_ADDR_FILTER_END);
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writel_relaxed(l2x0_saved_regs.filter_start,
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l2x0_base + L2X0_ADDR_FILTER_START);
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l2x0_revision = readl_relaxed(l2x0_base + L2X0_CACHE_ID) &
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L2X0_CACHE_ID_RTL_MASK;
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if (l2x0_revision >= L310_CACHE_ID_RTL_R2P0) {
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writel_relaxed(l2x0_saved_regs.prefetch_ctrl,
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l2x0_base + L2X0_PREFETCH_CTRL);
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if (l2x0_revision >= L310_CACHE_ID_RTL_R3P0)
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writel_relaxed(l2x0_saved_regs.pwr_ctrl,
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l2x0_base + L2X0_POWER_CTRL);
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}
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}
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l2x0_resume();
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}
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static void __init l2c310_fixup(void __iomem *base, u32 cache_id,
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struct outer_cache_fns *fns)
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{
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@ -455,6 +530,7 @@ static const struct l2c_init_data l2c310_init_fns __initconst = {
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.num_lock = 8,
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.enable = l2c_enable,
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.fixup = l2c310_fixup,
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.save = pl310_save,
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.outer_cache = {
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.inv_range = l2x0_inv_range,
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.clean_range = l2x0_clean_range,
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@ -462,6 +538,7 @@ static const struct l2c_init_data l2c310_init_fns __initconst = {
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.flush_all = l2x0_flush_all,
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.disable = l2x0_disable,
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.sync = l2x0_cache_sync,
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.resume = pl310_resume,
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},
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};
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@ -614,21 +691,6 @@ static void __init l2x0_of_parse(const struct device_node *np,
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*aux_mask &= ~mask;
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}
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static void l2x0_resume(void)
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{
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if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
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/* restore aux ctrl and enable l2 */
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l2x0_unlock(readl_relaxed(l2x0_base + L2X0_CACHE_ID));
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writel_relaxed(l2x0_saved_regs.aux_ctrl, l2x0_base +
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L2X0_AUX_CTRL);
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l2x0_inv_all();
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writel_relaxed(L2X0_CTRL_EN, l2x0_base + L2X0_CTRL);
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}
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}
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static const struct l2c_init_data of_l2x0_data __initconst = {
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.of_parse = l2x0_of_parse,
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.enable = l2x0_enable,
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@ -677,65 +739,6 @@ static void __init pl310_of_parse(const struct device_node *np,
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}
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}
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static void __init pl310_save(void __iomem *base)
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{
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u32 l2x0_revision = readl_relaxed(base + L2X0_CACHE_ID) &
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L2X0_CACHE_ID_RTL_MASK;
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l2x0_saved_regs.tag_latency = readl_relaxed(base +
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L2X0_TAG_LATENCY_CTRL);
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l2x0_saved_regs.data_latency = readl_relaxed(base +
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L2X0_DATA_LATENCY_CTRL);
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l2x0_saved_regs.filter_end = readl_relaxed(base +
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L2X0_ADDR_FILTER_END);
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l2x0_saved_regs.filter_start = readl_relaxed(base +
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L2X0_ADDR_FILTER_START);
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if (l2x0_revision >= L310_CACHE_ID_RTL_R2P0) {
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/*
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* From r2p0, there is Prefetch offset/control register
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*/
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l2x0_saved_regs.prefetch_ctrl = readl_relaxed(base +
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L2X0_PREFETCH_CTRL);
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/*
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* From r3p0, there is Power control register
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*/
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if (l2x0_revision >= L310_CACHE_ID_RTL_R3P0)
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l2x0_saved_regs.pwr_ctrl = readl_relaxed(base +
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L2X0_POWER_CTRL);
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}
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}
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static void pl310_resume(void)
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{
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u32 l2x0_revision;
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if (!(readl_relaxed(l2x0_base + L2X0_CTRL) & L2X0_CTRL_EN)) {
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/* restore pl310 setup */
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writel_relaxed(l2x0_saved_regs.tag_latency,
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l2x0_base + L2X0_TAG_LATENCY_CTRL);
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writel_relaxed(l2x0_saved_regs.data_latency,
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l2x0_base + L2X0_DATA_LATENCY_CTRL);
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writel_relaxed(l2x0_saved_regs.filter_end,
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l2x0_base + L2X0_ADDR_FILTER_END);
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writel_relaxed(l2x0_saved_regs.filter_start,
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l2x0_base + L2X0_ADDR_FILTER_START);
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l2x0_revision = readl_relaxed(l2x0_base + L2X0_CACHE_ID) &
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L2X0_CACHE_ID_RTL_MASK;
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if (l2x0_revision >= L310_CACHE_ID_RTL_R2P0) {
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writel_relaxed(l2x0_saved_regs.prefetch_ctrl,
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l2x0_base + L2X0_PREFETCH_CTRL);
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if (l2x0_revision >= L310_CACHE_ID_RTL_R3P0)
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writel_relaxed(l2x0_saved_regs.pwr_ctrl,
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l2x0_base + L2X0_POWER_CTRL);
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}
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}
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l2x0_resume();
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}
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static const struct l2c_init_data of_pl310_data __initconst = {
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.num_lock = 8,
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.of_parse = pl310_of_parse,
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