mirror of https://gitee.com/openkylin/linux.git
[SCSI] hpsa: initialize controller to perform io accelerator mode 2
Signed-off-by: Stephen M. Cameron <scameron@beardog.cce.hp.com> Signed-off-by: Scott Teel <scott.teel@hp.com> Signed-off-by: James Bottomley <JBottomley@Parallels.com>
This commit is contained in:
Stephen M. Cameron
James Bottomley
parent
317d4adfd3
commit
b9af4937e6
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@ -5137,6 +5137,7 @@ static int hpsa_enter_simple_mode(struct ctlr_info *h)
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/* Update the field, and then ring the doorbell */
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writel(CFGTBL_Trans_Simple, &(h->cfgtable->HostWrite.TransportRequest));
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writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
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writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
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hpsa_wait_for_mode_change_ack(h);
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print_cfg_table(&h->pdev->dev, h->cfgtable);
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@ -5902,9 +5903,9 @@ static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
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unsigned long register_value;
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unsigned long transMethod = CFGTBL_Trans_Performant |
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(trans_support & CFGTBL_Trans_use_short_tags) |
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CFGTBL_Trans_enable_directed_msix |
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(trans_support & CFGTBL_Trans_io_accel1);
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CFGTBL_Trans_enable_directed_msix |
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(trans_support & (CFGTBL_Trans_io_accel1 |
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CFGTBL_Trans_io_accel2));
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struct access_method access = SA5_performant_access;
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/* This is a bit complicated. There are 8 registers on
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@ -5925,6 +5926,16 @@ static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
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* sizes for small commands, and fewer sizes for larger commands.
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*/
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int bft[8] = {5, 6, 8, 10, 12, 20, 28, SG_ENTRIES_IN_CMD + 4};
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#define MIN_IOACCEL2_BFT_ENTRY 5
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#define HPSA_IOACCEL2_HEADER_SZ 4
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int bft2[16] = {MIN_IOACCEL2_BFT_ENTRY, 6, 7, 8, 9, 10, 11, 12,
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13, 14, 15, 16, 17, 18, 19,
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HPSA_IOACCEL2_HEADER_SZ + IOACCEL2_MAXSGENTRIES};
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BUILD_BUG_ON(ARRAY_SIZE(bft2) != 16);
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BUILD_BUG_ON(ARRAY_SIZE(bft) != 8);
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BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) >
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16 * MIN_IOACCEL2_BFT_ENTRY);
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BUILD_BUG_ON(sizeof(struct ioaccel2_sg_element) != 16);
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BUILD_BUG_ON(28 > SG_ENTRIES_IN_CMD + 4);
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/* 5 = 1 s/g entry or 4k
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* 6 = 2 s/g entry or 8k
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@ -5954,6 +5965,7 @@ static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
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&h->transtable->RepQAddr[i].lower);
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}
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writel(0, &h->cfgtable->HostWrite.command_pool_addr_hi);
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writel(transMethod, &(h->cfgtable->HostWrite.TransportRequest));
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/*
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* enable outbound interrupt coalescing in accelerator mode;
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@ -5975,43 +5987,72 @@ static void hpsa_enter_performant_mode(struct ctlr_info *h, u32 trans_support)
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h->access = access;
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h->transMethod = transMethod;
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if (!(trans_support & CFGTBL_Trans_io_accel1))
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if (!((trans_support & CFGTBL_Trans_io_accel1) ||
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(trans_support & CFGTBL_Trans_io_accel2)))
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return;
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/* Set up I/O accelerator mode */
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for (i = 0; i < h->nreply_queues; i++) {
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writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
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h->reply_queue[i].current_entry =
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readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
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}
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bft[7] = h->ioaccel_maxsg + 8;
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calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
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h->ioaccel1_blockFetchTable);
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/* initialize all reply queue entries to unused */
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memset(h->reply_pool, (u8) IOACCEL_MODE1_REPLY_UNUSED,
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h->reply_pool_size);
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/* set all the constant fields in the accelerator command
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* frames once at init time to save CPU cycles later.
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*/
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for (i = 0; i < h->nr_cmds; i++) {
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struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
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cp->function = IOACCEL1_FUNCTION_SCSIIO;
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cp->err_info = (u32) (h->errinfo_pool_dhandle +
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(i * sizeof(struct ErrorInfo)));
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cp->err_info_len = sizeof(struct ErrorInfo);
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cp->sgl_offset = IOACCEL1_SGLOFFSET;
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cp->host_context_flags = IOACCEL1_HCFLAGS_CISS_FORMAT;
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cp->timeout_sec = 0;
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cp->ReplyQueue = 0;
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cp->Tag.lower = (i << DIRECT_LOOKUP_SHIFT) | DIRECT_LOOKUP_BIT;
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cp->Tag.upper = 0;
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cp->host_addr.lower = (u32) (h->ioaccel_cmd_pool_dhandle +
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(i * sizeof(struct io_accel1_cmd)));
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cp->host_addr.upper = 0;
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if (trans_support & CFGTBL_Trans_io_accel1) {
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/* Set up I/O accelerator mode */
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for (i = 0; i < h->nreply_queues; i++) {
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writel(i, h->vaddr + IOACCEL_MODE1_REPLY_QUEUE_INDEX);
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h->reply_queue[i].current_entry =
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readl(h->vaddr + IOACCEL_MODE1_PRODUCER_INDEX);
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}
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bft[7] = h->ioaccel_maxsg + 8;
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calc_bucket_map(bft, ARRAY_SIZE(bft), h->ioaccel_maxsg, 8,
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h->ioaccel1_blockFetchTable);
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/* initialize all reply queue entries to unused */
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memset(h->reply_pool, (u8) IOACCEL_MODE1_REPLY_UNUSED,
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h->reply_pool_size);
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/* set all the constant fields in the accelerator command
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* frames once at init time to save CPU cycles later.
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*/
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for (i = 0; i < h->nr_cmds; i++) {
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struct io_accel1_cmd *cp = &h->ioaccel_cmd_pool[i];
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cp->function = IOACCEL1_FUNCTION_SCSIIO;
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cp->err_info = (u32) (h->errinfo_pool_dhandle +
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(i * sizeof(struct ErrorInfo)));
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cp->err_info_len = sizeof(struct ErrorInfo);
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cp->sgl_offset = IOACCEL1_SGLOFFSET;
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cp->host_context_flags = IOACCEL1_HCFLAGS_CISS_FORMAT;
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cp->timeout_sec = 0;
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cp->ReplyQueue = 0;
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cp->Tag.lower = (i << DIRECT_LOOKUP_SHIFT) |
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DIRECT_LOOKUP_BIT;
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cp->Tag.upper = 0;
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cp->host_addr.lower =
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(u32) (h->ioaccel_cmd_pool_dhandle +
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(i * sizeof(struct io_accel1_cmd)));
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cp->host_addr.upper = 0;
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}
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} else if (trans_support & CFGTBL_Trans_io_accel2) {
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u64 cfg_offset, cfg_base_addr_index;
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u32 bft2_offset, cfg_base_addr;
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int rc;
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rc = hpsa_find_cfg_addrs(h->pdev, h->vaddr, &cfg_base_addr,
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&cfg_base_addr_index, &cfg_offset);
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BUILD_BUG_ON(offsetof(struct io_accel2_cmd, sg) != 64);
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bft2[15] = h->ioaccel_maxsg + HPSA_IOACCEL2_HEADER_SZ;
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calc_bucket_map(bft2, ARRAY_SIZE(bft2), h->ioaccel_maxsg,
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4, h->ioaccel2_blockFetchTable);
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bft2_offset = readl(&h->cfgtable->io_accel_request_size_offset);
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BUILD_BUG_ON(offsetof(struct CfgTable,
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io_accel_request_size_offset) != 0xb8);
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h->ioaccel2_bft2_regs =
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remap_pci_mem(pci_resource_start(h->pdev,
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cfg_base_addr_index) +
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cfg_offset + bft2_offset,
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ARRAY_SIZE(bft2) *
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sizeof(*h->ioaccel2_bft2_regs));
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for (i = 0; i < ARRAY_SIZE(bft2); i++)
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writel(bft2[i], &h->ioaccel2_bft2_regs[i]);
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}
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writel(CFGTBL_ChangeReq, h->vaddr + SA5_DOORBELL);
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hpsa_wait_for_mode_change_ack(h);
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}
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static int hpsa_alloc_ioaccel_cmd_and_bft(struct ctlr_info *h)
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@ -142,6 +142,7 @@ struct ctlr_info {
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u32 *blockFetchTable;
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u32 *ioaccel1_blockFetchTable;
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u32 *ioaccel2_blockFetchTable;
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u32 *ioaccel2_bft2_regs;
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unsigned char *hba_inquiry_data;
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u32 driver_support;
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u32 fw_support;
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@ -547,7 +547,7 @@ struct hpsa_tmf_struct {
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/* Configuration Table Structure */
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struct HostWrite {
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u32 TransportRequest;
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u32 Reserved;
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u32 command_pool_addr_hi;
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u32 CoalIntDelay;
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u32 CoalIntCount;
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};
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