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Docs: dt: document ARM SMMUv3 generic binding usage
We're about to ratify our use of the generic binding, so document it. CC: Rob Herring <robh+dt@kernel.org> CC: Mark Rutland <mark.rutland@arm.com> Signed-off-by: Robin Murphy <robin.murphy@arm.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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@ -27,6 +27,12 @@ the PCIe specification.
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* "cmdq-sync" - CMD_SYNC complete
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* "gerror" - Global Error activated
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- #iommu-cells : See the generic IOMMU binding described in
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devicetree/bindings/pci/pci-iommu.txt
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for details. For SMMUv3, must be 1, with each cell
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describing a single stream ID. All possible stream
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IDs which a device may emit must be described.
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** SMMUv3 optional properties:
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- dma-coherent : Present if DMA operations made by the SMMU (page
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@ -54,6 +60,6 @@ the PCIe specification.
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<GIC_SPI 79 IRQ_TYPE_EDGE_RISING>;
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interrupt-names = "eventq", "priq", "cmdq-sync", "gerror";
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dma-coherent;
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#iommu-cells = <0>;
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#iommu-cells = <1>;
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msi-parent = <&its 0xff0000>;
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};
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