mirror of https://gitee.com/openkylin/linux.git
drm/nouveau: fix a race condition in nouveau_dma_wait()
Can be triggered easily on certain cards (NV46 and NV50 of mine) by running "dmesg", the DRM's channel will lockup. Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
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@ -126,47 +126,52 @@ OUT_RINGp(struct nouveau_channel *chan, const void *data, unsigned nr_dwords)
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chan->dma.cur += nr_dwords;
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}
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static inline bool
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READ_GET(struct nouveau_channel *chan, uint32_t *get)
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/* Fetch and adjust GPU GET pointer
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*
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* Returns:
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* value >= 0, the adjusted GET pointer
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* -EINVAL if GET pointer currently outside main push buffer
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* -EBUSY if timeout exceeded
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*/
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static inline int
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READ_GET(struct nouveau_channel *chan, uint32_t *prev_get, uint32_t *timeout)
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{
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uint32_t val;
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val = nvchan_rd32(chan, chan->user_get);
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if (val < chan->pushbuf_base ||
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val > chan->pushbuf_base + (chan->dma.max << 2)) {
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/* meaningless to dma_wait() except to know whether the
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* GPU has stalled or not
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/* reset counter as long as GET is still advancing, this is
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* to avoid misdetecting a GPU lockup if the GPU happens to
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* just be processing an operation that takes a long time
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*/
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*get = val;
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return false;
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if (val != *prev_get) {
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*prev_get = val;
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*timeout = 0;
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}
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*get = (val - chan->pushbuf_base) >> 2;
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return true;
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if ((++*timeout & 0xff) == 0) {
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DRM_UDELAY(1);
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if (*timeout > 100000)
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return -EBUSY;
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}
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if (val < chan->pushbuf_base ||
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val > chan->pushbuf_base + (chan->dma.max << 2))
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return -EINVAL;
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return (val - chan->pushbuf_base) >> 2;
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}
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int
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nouveau_dma_wait(struct nouveau_channel *chan, int size)
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{
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uint32_t get, prev_get = 0, cnt = 0;
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bool get_valid;
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uint32_t prev_get = 0, cnt = 0;
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int get;
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while (chan->dma.free < size) {
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/* reset counter as long as GET is still advancing, this is
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* to avoid misdetecting a GPU lockup if the GPU happens to
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* just be processing an operation that takes a long time
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*/
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get_valid = READ_GET(chan, &get);
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if (get != prev_get) {
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prev_get = get;
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cnt = 0;
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}
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if ((++cnt & 0xff) == 0) {
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DRM_UDELAY(1);
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if (cnt > 100000)
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get = READ_GET(chan, &prev_get, &cnt);
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if (unlikely(get == -EBUSY))
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return -EBUSY;
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}
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/* loop until we have a usable GET pointer. the value
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* we read from the GPU may be outside the main ring if
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@ -177,7 +182,7 @@ nouveau_dma_wait(struct nouveau_channel *chan, int size)
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* from the SKIPS area, so the code below doesn't have to deal
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* with some fun corner cases.
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*/
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if (!get_valid || get < NOUVEAU_DMA_SKIPS)
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if (unlikely(get == -EINVAL) || get < NOUVEAU_DMA_SKIPS)
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continue;
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if (get <= chan->dma.cur) {
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@ -203,6 +208,19 @@ nouveau_dma_wait(struct nouveau_channel *chan, int size)
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* after processing the currently pending commands.
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*/
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OUT_RING(chan, chan->pushbuf_base | 0x20000000);
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/* wait for GET to depart from the skips area.
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* prevents writing GET==PUT and causing a race
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* condition that causes us to think the GPU is
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* idle when it's not.
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*/
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do {
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get = READ_GET(chan, &prev_get, &cnt);
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if (unlikely(get == -EBUSY))
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return -EBUSY;
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if (unlikely(get == -EINVAL))
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continue;
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} while (get <= NOUVEAU_DMA_SKIPS);
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WRITE_PUT(NOUVEAU_DMA_SKIPS);
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/* we're now submitting commands at the start of
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