staging: mt7621-dts: add support for second network interface

The mt7621 has two network interfaces, one that connects to an
internal switch, and one that can connect to either that switch
or an external phy, or possibly an internal phy.

The Gnubee-PC2 has an external phy for use with the second interface.

This patch add some support for the second interface to mt7621.dtsi
and add a gbpc2.dts which makes use of this.  This allows the second
interface to be used.

I don't fully understand how to configure this interface - the
documentation is thin - so there could well be room for improvement
here.

Signed-off-by: NeilBrown <neil@brown.name>
Link: https://lore.kernel.org/r/156194178766.1430.12784163026696670896.stgit@noble.brown
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
NeilBrown 2019-07-01 10:43:07 +10:00 committed by Greg Kroah-Hartman
parent cf8e49ae20
commit baa3477f06
5 changed files with 37 additions and 6 deletions

View File

@ -1,6 +1,11 @@
# SPDX-License-Identifier: GPL-2.0
config DTB_GNUBEE1
bool "GnuBee1 NAS"
bool "GnuBee1 2.5inch NAS"
depends on SOC_MT7621 && DTB_RT_NONE
select BUILTIN_DTB
config DTB_GNUBEE2
bool "GnuBee2 3.5inch NAS"
depends on SOC_MT7621 && DTB_RT_NONE
select BUILTIN_DTB

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@ -1,4 +1,5 @@
# SPDX-License-Identifier: GPL-2.0
dtb-$(CONFIG_DTB_GNUBEE1) += gbpc1.dtb
dtb-$(CONFIG_DTB_GNUBEE2) += gbpc2.dtb
obj-y += $(patsubst %.dtb, %.dtb.o, $(dtb-y))

View File

@ -119,7 +119,7 @@ &pcie {
&pinctrl {
state_default: pinctrl0 {
gpio {
default_gpio: gpio {
groups = "wdt", "rgmii2", "uart3";
function = "gpio";
};

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@ -0,0 +1,21 @@
/dts-v1/;
#include "gbpc1.dts"
/ {
compatible = "gnubee,gb-pc2", "mediatek,mt7621-soc";
model = "GB-PC2";
};
&default_gpio {
groups = "wdt", "uart3";
function = "gpio";
};
&gmac1 {
status = "ok";
};
&phy_external {
status = "ok";
};

View File

@ -427,16 +427,20 @@ gmac1: mac@1 {
compatible = "mediatek,eth-mac";
reg = <1>;
status = "off";
phy-mode = "rgmii";
phy-handle = <&phy5>;
phy-mode = "rgmii-rxid";
phy-handle = <&phy_external>;
};
mdio-bus {
#address-cells = <1>;
#size-cells = <0>;
phy5: ethernet-phy@5 {
phy_external: ethernet-phy@5 {
status = "off";
reg = <5>;
phy-mode = "rgmii";
phy-mode = "rgmii-rxid";
pinctrl-names = "default";
pinctrl-0 = <&rgmii2_pins>;
};
switch0: switch0@0 {