mirror of https://gitee.com/openkylin/linux.git
ARM i.MX dt updates for 3.8
-----BEGIN PGP SIGNATURE----- Version: GnuPG v1.4.12 (GNU/Linux) iQIcBAABCAAGBQJQpmDiAAoJEPFlmONMx+ezSJMP/Az4J4R6ZEh8J8xt/Uf4bw78 k6jMg1cBRa/DRJWUWvymjyFH/NvjnbtntV4bOBbey05efB+RCGRl9TW6hGLtL5M6 EfA2Nr7flw/BCdEuf0uI64p0rWmtfzV+SZOsPk6HKAzHo2uV/hQWYUUmvzNrVqVz 8XVEfTQWgipA8SOPKfdvCezoO7PWHD6l9fy/mJkMyyf4Py1WDXXt+gCHUGZlFKAq 8ZXE3B+ftwDUOwlrLl7mcJJtRjabUHQpDS/hmkhjVzTrrMQb+V2/BIzODkT35B6m bHc5zRlYVXVgE/XqxcD79zzl+ixvyfdYThLQ8GzoxyhUmKNOEjub+8udzX2YEB+b VLS06QmhhJn8xj6EIVM5WZIK4bR2OZoT2hCpuO2nJUyhbVSksO1GF1T8v8H3IHQf THw3WSh7bFIFrgJhj//UbLXkTaQ4/bkqAP064EyuABMvKoaybPOmFe0boN/QoFDz yC2/b1xTTiG/6nLupz7gLJabdV6iOF9f2rqta65hz+//Qk+Iyeh7iuWfrBspDJCb 3vKBcB75IgRWaaPxJxRFWzP9CN2ouv5q763xSjqldFt9pOF4zvfBfpERkzYn3rwG /93X1tazBLo+mM7D5QVTrPgfXQs/B3GxIA6tsIIrPqxMpM5u/ONNNCYwINvFI/Xo aklrgV6n88q3C/Zewebz =CFfP -----END PGP SIGNATURE----- Merge tag 'imx-dt' of git://git.pengutronix.de/git/imx/linux-2.6 into next/dt From Sascha Hauer <s.hauer@pengutronix.de>: ARM i.MX dt updates for 3.8 * tag 'imx-dt' of git://git.pengutronix.de/git/imx/linux-2.6: Add device tree file for the armadeus apf27 ARM i.MX: Add Ka-Ro TX25 devicetree ARM i.MX25: Add devicetree ARM i.MX25: Add devicetree support ARM i.MX25: Add missing clock gates Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
bac2f66886
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@ -27,17 +27,17 @@ Start End Size Use
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-----------------------------------------------------------------------
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0000000000000000 0000007fffffffff 512GB user
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ffffff8000000000 ffffffbbfffcffff ~240GB vmalloc
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ffffff8000000000 ffffffbbfffeffff ~240GB vmalloc
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ffffffbbfffd0000 ffffffbcfffdffff 64KB [guard page]
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ffffffbbfffe0000 ffffffbcfffeffff 64KB PCI I/O space
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ffffffbbffff0000 ffffffbcffffffff 64KB [guard page]
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ffffffbbffff0000 ffffffbbffffffff 64KB [guard page]
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ffffffbc00000000 ffffffbdffffffff 8GB vmemmap
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ffffffbe00000000 ffffffbffbffffff ~8GB [guard, future vmmemap]
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ffffffbe00000000 ffffffbffbbfffff ~8GB [guard, future vmmemap]
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ffffffbffbe00000 ffffffbffbe0ffff 64KB PCI I/O space
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ffffffbbffff0000 ffffffbcffffffff ~2MB [guard]
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ffffffbffc000000 ffffffbfffffffff 64MB modules
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@ -0,0 +1,162 @@
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* Clock bindings for Freescale i.MX25
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Required properties:
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- compatible: Should be "fsl,imx25-ccm"
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- reg: Address and length of the register set
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- interrupts: Should contain CCM interrupt
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- #clock-cells: Should be <1>
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The clock consumer should specify the desired clock by having the clock
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ID in its "clocks" phandle cell. The following is a full list of i.MX25
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clocks and IDs.
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Clock ID
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---------------------------
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dummy 0
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osc 1
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mpll 2
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upll 3
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mpll_cpu_3_4 4
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cpu_sel 5
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cpu 6
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ahb 7
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usb_div 8
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ipg 9
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per0_sel 10
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per1_sel 11
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per2_sel 12
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per3_sel 13
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per4_sel 14
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per5_sel 15
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per6_sel 16
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per7_sel 17
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per8_sel 18
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per9_sel 19
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per10_sel 20
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per11_sel 21
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per12_sel 22
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per13_sel 23
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per14_sel 24
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per15_sel 25
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per0 26
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per1 27
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per2 28
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per3 29
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per4 30
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per5 31
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per6 32
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per7 33
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per8 34
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per9 35
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per10 36
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per11 37
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per12 38
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per13 39
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per14 40
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per15 41
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csi_ipg_per 42
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epit_ipg_per 43
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esai_ipg_per 44
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esdhc1_ipg_per 45
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esdhc2_ipg_per 46
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gpt_ipg_per 47
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i2c_ipg_per 48
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lcdc_ipg_per 49
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nfc_ipg_per 50
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owire_ipg_per 51
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pwm_ipg_per 52
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sim1_ipg_per 53
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sim2_ipg_per 54
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ssi1_ipg_per 55
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ssi2_ipg_per 56
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uart_ipg_per 57
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ata_ahb 58
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reserved 59
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csi_ahb 60
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emi_ahb 61
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esai_ahb 62
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esdhc1_ahb 63
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esdhc2_ahb 64
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fec_ahb 65
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lcdc_ahb 66
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rtic_ahb 67
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sdma_ahb 68
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slcdc_ahb 69
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usbotg_ahb 70
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reserved 71
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reserved 72
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reserved 73
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reserved 74
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can1_ipg 75
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can2_ipg 76
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csi_ipg 77
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cspi1_ipg 78
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cspi2_ipg 79
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cspi3_ipg 80
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dryice_ipg 81
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ect_ipg 82
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epit1_ipg 83
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epit2_ipg 84
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reserved 85
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esdhc1_ipg 86
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esdhc2_ipg 87
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fec_ipg 88
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reserved 89
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reserved 90
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reserved 91
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gpt1_ipg 92
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gpt2_ipg 93
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gpt3_ipg 94
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gpt4_ipg 95
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reserved 96
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reserved 97
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reserved 98
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iim_ipg 99
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reserved 100
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reserved 101
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kpp_ipg 102
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lcdc_ipg 103
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reserved 104
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pwm1_ipg 105
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pwm2_ipg 106
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pwm3_ipg 107
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pwm4_ipg 108
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rngb_ipg 109
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reserved 110
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scc_ipg 111
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sdma_ipg 112
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sim1_ipg 113
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sim2_ipg 114
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slcdc_ipg 115
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spba_ipg 116
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ssi1_ipg 117
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ssi2_ipg 118
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tsc_ipg 119
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uart1_ipg 120
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uart2_ipg 121
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uart3_ipg 122
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uart4_ipg 123
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uart5_ipg 124
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reserved 125
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wdt_ipg 126
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Examples:
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clks: ccm@53f80000 {
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compatible = "fsl,imx25-ccm";
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reg = <0x53f80000 0x4000>;
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interrupts = <31>;
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clock-output-names = ...
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"uart_ipg",
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"uart_serial",
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...;
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};
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uart1: serial@43f90000 {
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compatible = "fsl,imx25-uart", "fsl,imx21-uart";
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reg = <0x43f90000 0x4000>;
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interrupts = <45>;
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clocks = <&clks 79>, <&clks 50>;
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clock-names = "ipg", "per";
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status = "disabled";
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};
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@ -12,13 +12,13 @@ Optional properties:
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Examples:
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i2c@83fc4000 { /* I2C2 on i.MX51 */
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compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
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compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
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reg = <0x83fc4000 0x4000>;
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interrupts = <63>;
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};
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i2c@70038000 { /* HS-I2C on i.MX51 */
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compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
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compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
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reg = <0x70038000 0x4000>;
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interrupts = <64>;
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clock-frequency = <400000>;
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@ -797,7 +797,6 @@ L: linux-arm-kernel@lists.infradead.org (moderated for non-subscribers)
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S: Maintained
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T: git git://git.pengutronix.de/git/imx/linux-2.6.git
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F: arch/arm/mach-imx/
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F: arch/arm/plat-mxc/
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F: arch/arm/configs/imx*_defconfig
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ARM/FREESCALE IMX6
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2
Makefile
2
Makefile
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@ -1,7 +1,7 @@
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VERSION = 3
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PATCHLEVEL = 7
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SUBLEVEL = 0
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EXTRAVERSION = -rc4
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EXTRAVERSION = -rc5
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NAME = Terrified Chipmunk
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# *DOCUMENTATION*
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@ -433,19 +433,6 @@ config ARCH_FOOTBRIDGE
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Support for systems based on the DC21285 companion chip
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("FootBridge"), such as the Simtec CATS and the Rebel NetWinder.
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config ARCH_MXC
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bool "Freescale MXC/iMX-based"
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select ARCH_REQUIRE_GPIOLIB
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select CLKDEV_LOOKUP
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select CLKSRC_MMIO
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select GENERIC_CLOCKEVENTS
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select GENERIC_IRQ_CHIP
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select MULTI_IRQ_HANDLER
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select SPARSE_IRQ
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select USE_OF
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help
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Support for Freescale MXC/iMX-based family of processors
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config ARCH_MXS
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bool "Freescale MXS-based"
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select ARCH_REQUIRE_GPIOLIB
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@ -1057,7 +1044,7 @@ source "arch/arm/mach-msm/Kconfig"
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source "arch/arm/mach-mv78xx0/Kconfig"
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source "arch/arm/plat-mxc/Kconfig"
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source "arch/arm/mach-imx/Kconfig"
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source "arch/arm/mach-mxs/Kconfig"
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@ -412,6 +412,14 @@ endchoice
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config DEBUG_LL_INCLUDE
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string
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default "debug/icedcc.S" if DEBUG_ICEDCC
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default "debug/imx.S" if DEBUG_IMX1_UART || \
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DEBUG_IMX25_UART || \
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DEBUG_IMX21_IMX27_UART || \
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DEBUG_IMX31_IMX35_UART || \
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DEBUG_IMX51_UART || \
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DEBUG_IMX50_IMX53_UART ||\
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DEBUG_IMX6Q_UART2 || \
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DEBUG_IMX6Q_UART4
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default "debug/highbank.S" if DEBUG_HIGHBANK_UART
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default "debug/mvebu.S" if DEBUG_MVEBU_UART
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default "debug/picoxcell.S" if DEBUG_PICOXCELL_UART
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@ -196,7 +196,6 @@ machine-$(CONFIG_ARCH_ZYNQ) += zynq
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# Platform directory name. This list is sorted alphanumerically
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# by CONFIG_* macro name.
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plat-$(CONFIG_ARCH_MXC) += mxc
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plat-$(CONFIG_ARCH_OMAP) += omap
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plat-$(CONFIG_ARCH_S3C64XX) += samsung
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plat-$(CONFIG_ARCH_ZYNQ) += versatile
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@ -0,0 +1,44 @@
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/*
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* Copyright 2012 Sascha Hauer, Pengutronix
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/dts-v1/;
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/include/ "imx25.dtsi"
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/ {
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model = "Ka-Ro TX25";
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compatible = "karo,imx25-tx25", "fsl,imx25";
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memory {
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reg = <0x80000000 0x02000000 0x90000000 0x02000000>;
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};
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soc {
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aips@43f00000 {
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uart1: serial@43f90000 {
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status = "okay";
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};
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};
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spba@50000000 {
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fec: ethernet@50038000 {
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status = "okay";
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phy-mode = "rmii";
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};
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};
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emi@80000000 {
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nand@bb000000 {
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nand-on-flash-bbt;
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status = "okay";
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};
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};
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};
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};
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@ -0,0 +1,515 @@
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/*
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* Copyright 2012 Sascha Hauer, Pengutronix <s.hauer@pengutronix.de>
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*
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* The code contained herein is licensed under the GNU General Public
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* License. You may obtain a copy of the GNU General Public License
|
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* Version 2 or later at the following locations:
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*
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* http://www.opensource.org/licenses/gpl-license.html
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* http://www.gnu.org/copyleft/gpl.html
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*/
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/include/ "skeleton.dtsi"
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/ {
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aliases {
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serial0 = &uart1;
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serial1 = &uart2;
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serial2 = &uart3;
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serial3 = &uart4;
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serial4 = &uart5;
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gpio0 = &gpio1;
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gpio1 = &gpio2;
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gpio2 = &gpio3;
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gpio3 = &gpio4;
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usb0 = &usbotg;
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usb1 = &usbhost1;
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};
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asic: asic-interrupt-controller@68000000 {
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compatible = "fsl,imx25-asic", "fsl,avic";
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interrupt-controller;
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#interrupt-cells = <1>;
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reg = <0x68000000 0x8000000>;
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};
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clocks {
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#address-cells = <1>;
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#size-cells = <0>;
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osc {
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compatible = "fsl,imx-osc", "fixed-clock";
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clock-frequency = <24000000>;
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};
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};
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soc {
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#address-cells = <1>;
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#size-cells = <1>;
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compatible = "simple-bus";
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interrupt-parent = <&asic>;
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ranges;
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aips@43f00000 { /* AIPS1 */
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compatible = "fsl,aips-bus", "simple-bus";
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#address-cells = <1>;
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#size-cells = <1>;
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reg = <0x43f00000 0x100000>;
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ranges;
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i2c1: i2c@43f80000 {
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#address-cells = <1>;
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#size-cells = <0>;
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compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
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reg = <0x43f80000 0x4000>;
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clocks = <&clks 48>;
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clock-names = "";
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interrupts = <3>;
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status = "disabled";
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||||
};
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i2c3: i2c@43f84000 {
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#address-cells = <1>;
|
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#size-cells = <0>;
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compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x43f84000 0x4000>;
|
||||
clocks = <&clks 48>;
|
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clock-names = "";
|
||||
interrupts = <10>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
can1: can@43f88000 {
|
||||
compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
|
||||
reg = <0x43f88000 0x4000>;
|
||||
interrupts = <43>;
|
||||
clocks = <&clks 75>, <&clks 75>;
|
||||
clock-names = "ipg", "per";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
can2: can@43f8c000 {
|
||||
compatible = "fsl,imx25-flexcan", "fsl,p1010-flexcan";
|
||||
reg = <0x43f8c000 0x4000>;
|
||||
interrupts = <44>;
|
||||
clocks = <&clks 76>, <&clks 76>;
|
||||
clock-names = "ipg", "per";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart1: serial@43f90000 {
|
||||
compatible = "fsl,imx25-uart", "fsl,imx21-uart";
|
||||
reg = <0x43f90000 0x4000>;
|
||||
interrupts = <45>;
|
||||
clocks = <&clks 120>, <&clks 57>;
|
||||
clock-names = "ipg", "per";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart2: serial@43f94000 {
|
||||
compatible = "fsl,imx25-uart", "fsl,imx21-uart";
|
||||
reg = <0x43f94000 0x4000>;
|
||||
interrupts = <32>;
|
||||
clocks = <&clks 121>, <&clks 57>;
|
||||
clock-names = "ipg", "per";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
i2c2: i2c@43f98000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx25-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x43f98000 0x4000>;
|
||||
clocks = <&clks 48>;
|
||||
clock-names = "";
|
||||
interrupts = <4>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
owire@43f9c000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x43f9c000 0x4000>;
|
||||
clocks = <&clks 51>;
|
||||
clock-names = "";
|
||||
interrupts = <2>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi1: cspi@43fa4000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
|
||||
reg = <0x43fa4000 0x4000>;
|
||||
clocks = <&clks 62>;
|
||||
clock-names = "ipg";
|
||||
interrupts = <14>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
kpp@43fa8000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
reg = <0x43fa8000 0x4000>;
|
||||
clocks = <&clks 102>;
|
||||
clock-names = "";
|
||||
interrupts = <24>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
iomuxc@43fac000{
|
||||
compatible = "fsl,imx25-iomuxc";
|
||||
reg = <0x43fac000 0x4000>;
|
||||
};
|
||||
|
||||
audmux@43fb0000 {
|
||||
compatible = "fsl,imx25-audmux", "fsl,imx31-audmux";
|
||||
reg = <0x43fb0000 0x4000>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
spba@50000000 {
|
||||
compatible = "fsl,spba-bus", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x50000000 0x40000>;
|
||||
ranges;
|
||||
|
||||
spi3: cspi@50004000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
|
||||
reg = <0x50004000 0x4000>;
|
||||
interrupts = <0>;
|
||||
clocks = <&clks 80>;
|
||||
clock-names = "ipg";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart4: serial@50008000 {
|
||||
compatible = "fsl,imx25-uart", "fsl,imx21-uart";
|
||||
reg = <0x50008000 0x4000>;
|
||||
interrupts = <5>;
|
||||
clocks = <&clks 123>, <&clks 57>;
|
||||
clock-names = "ipg", "per";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
uart3: serial@5000c000 {
|
||||
compatible = "fsl,imx25-uart", "fsl,imx21-uart";
|
||||
reg = <0x5000c000 0x4000>;
|
||||
interrupts = <18>;
|
||||
clocks = <&clks 122>, <&clks 57>;
|
||||
clock-names = "ipg", "per";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
spi2: cspi@50010000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx25-cspi", "fsl,imx35-cspi";
|
||||
reg = <0x50010000 0x4000>;
|
||||
clocks = <&clks 79>;
|
||||
clock-names = "ipg";
|
||||
interrupts = <13>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ssi2: ssi@50014000 {
|
||||
compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
|
||||
reg = <0x50014000 0x4000>;
|
||||
interrupts = <11>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
esai@50018000 {
|
||||
reg = <0x50018000 0x4000>;
|
||||
interrupts = <7>;
|
||||
};
|
||||
|
||||
uart5: serial@5002c000 {
|
||||
compatible = "fsl,imx25-uart", "fsl,imx21-uart";
|
||||
reg = <0x5002c000 0x4000>;
|
||||
interrupts = <40>;
|
||||
clocks = <&clks 124>, <&clks 57>;
|
||||
clock-names = "ipg", "per";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
tsc: tsc@50030000 {
|
||||
compatible = "fsl,imx25-adc", "fsl,imx21-tsc";
|
||||
reg = <0x50030000 0x4000>;
|
||||
interrupts = <46>;
|
||||
clocks = <&clks 119>;
|
||||
clock-names = "ipg";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
ssi1: ssi@50034000 {
|
||||
compatible = "fsl,imx25-ssi", "fsl,imx21-ssi";
|
||||
reg = <0x50034000 0x4000>;
|
||||
interrupts = <12>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
fec: ethernet@50038000 {
|
||||
compatible = "fsl,imx25-fec";
|
||||
reg = <0x50038000 0x4000>;
|
||||
interrupts = <57>;
|
||||
clocks = <&clks 88>, <&clks 65>;
|
||||
clock-names = "ipg", "ahb";
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
|
||||
aips@53f00000 { /* AIPS2 */
|
||||
compatible = "fsl,aips-bus", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x53f00000 0x100000>;
|
||||
ranges;
|
||||
|
||||
clks: ccm@53f80000 {
|
||||
compatible = "fsl,imx25-ccm";
|
||||
reg = <0x53f80000 0x4000>;
|
||||
interrupts = <31>;
|
||||
#clock-cells = <1>;
|
||||
};
|
||||
|
||||
gpt4: timer@53f84000 {
|
||||
compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
|
||||
reg = <0x53f84000 0x4000>;
|
||||
clocks = <&clks 9>, <&clks 45>;
|
||||
clock-names = "ipg", "per";
|
||||
interrupts = <1>;
|
||||
};
|
||||
|
||||
gpt3: timer@53f88000 {
|
||||
compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
|
||||
reg = <0x53f88000 0x4000>;
|
||||
clocks = <&clks 9>, <&clks 47>;
|
||||
clock-names = "ipg", "per";
|
||||
interrupts = <29>;
|
||||
};
|
||||
|
||||
gpt2: timer@53f8c000 {
|
||||
compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
|
||||
reg = <0x53f8c000 0x4000>;
|
||||
clocks = <&clks 9>, <&clks 47>;
|
||||
clock-names = "ipg", "per";
|
||||
interrupts = <53>;
|
||||
};
|
||||
|
||||
gpt1: timer@53f90000 {
|
||||
compatible = "fsl,imx25-gpt", "fsl,imx31-gpt";
|
||||
reg = <0x53f90000 0x4000>;
|
||||
clocks = <&clks 9>, <&clks 47>;
|
||||
clock-names = "ipg", "per";
|
||||
interrupts = <54>;
|
||||
};
|
||||
|
||||
epit1: timer@53f94000 {
|
||||
compatible = "fsl,imx25-epit";
|
||||
reg = <0x53f94000 0x4000>;
|
||||
interrupts = <28>;
|
||||
};
|
||||
|
||||
epit2: timer@53f98000 {
|
||||
compatible = "fsl,imx25-epit";
|
||||
reg = <0x53f98000 0x4000>;
|
||||
interrupts = <27>;
|
||||
};
|
||||
|
||||
gpio4: gpio@53f9c000 {
|
||||
compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
|
||||
reg = <0x53f9c000 0x4000>;
|
||||
interrupts = <23>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pwm2: pwm@53fa0000 {
|
||||
compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
|
||||
#pwm-cells = <2>;
|
||||
reg = <0x53fa0000 0x4000>;
|
||||
clocks = <&clks 106>, <&clks 36>;
|
||||
clock-names = "ipg", "per";
|
||||
interrupts = <36>;
|
||||
};
|
||||
|
||||
gpio3: gpio@53fa4000 {
|
||||
compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
|
||||
reg = <0x53fa4000 0x4000>;
|
||||
interrupts = <16>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
pwm3: pwm@53fa8000 {
|
||||
compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
|
||||
#pwm-cells = <2>;
|
||||
reg = <0x53fa8000 0x4000>;
|
||||
clocks = <&clks 107>, <&clks 36>;
|
||||
clock-names = "ipg", "per";
|
||||
interrupts = <41>;
|
||||
};
|
||||
|
||||
esdhc1: esdhc@53fb4000 {
|
||||
compatible = "fsl,imx25-esdhc";
|
||||
reg = <0x53fb4000 0x4000>;
|
||||
interrupts = <9>;
|
||||
clocks = <&clks 86>, <&clks 63>, <&clks 45>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
esdhc2: esdhc@53fb8000 {
|
||||
compatible = "fsl,imx25-esdhc";
|
||||
reg = <0x53fb8000 0x4000>;
|
||||
interrupts = <8>;
|
||||
clocks = <&clks 87>, <&clks 64>, <&clks 46>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
lcdc@53fbc000 {
|
||||
reg = <0x53fbc000 0x4000>;
|
||||
interrupts = <39>;
|
||||
clocks = <&clks 103>, <&clks 66>, <&clks 49>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
slcdc@53fc0000 {
|
||||
reg = <0x53fc0000 0x4000>;
|
||||
interrupts = <38>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
pwm4: pwm@53fc8000 {
|
||||
compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
|
||||
reg = <0x53fc8000 0x4000>;
|
||||
clocks = <&clks 108>, <&clks 36>;
|
||||
clock-names = "ipg", "per";
|
||||
interrupts = <42>;
|
||||
};
|
||||
|
||||
gpio1: gpio@53fcc000 {
|
||||
compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
|
||||
reg = <0x53fcc000 0x4000>;
|
||||
interrupts = <52>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
gpio2: gpio@53fd0000 {
|
||||
compatible = "fsl,imx25-gpio", "fsl,imx35-gpio";
|
||||
reg = <0x53fd0000 0x4000>;
|
||||
interrupts = <51>;
|
||||
gpio-controller;
|
||||
#gpio-cells = <2>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <2>;
|
||||
};
|
||||
|
||||
sdma@53fd4000 {
|
||||
compatible = "fsl,imx25-sdma", "fsl,imx35-sdma";
|
||||
reg = <0x53fd4000 0x4000>;
|
||||
clocks = <&clks 112>, <&clks 68>;
|
||||
clock-names = "ipg", "ahb";
|
||||
interrupts = <34>;
|
||||
};
|
||||
|
||||
wdog@53fdc000 {
|
||||
compatible = "fsl,imx25-wdt", "fsl,imx21-wdt";
|
||||
reg = <0x53fdc000 0x4000>;
|
||||
clocks = <&clks 126>;
|
||||
clock-names = "";
|
||||
interrupts = <55>;
|
||||
};
|
||||
|
||||
pwm1: pwm@53fe0000 {
|
||||
compatible = "fsl,imx25-pwm", "fsl,imx27-pwm";
|
||||
#pwm-cells = <2>;
|
||||
reg = <0x53fe0000 0x4000>;
|
||||
clocks = <&clks 105>, <&clks 36>;
|
||||
clock-names = "ipg", "per";
|
||||
interrupts = <26>;
|
||||
};
|
||||
|
||||
usbphy1: usbphy@1 {
|
||||
compatible = "nop-usbphy";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbphy2: usbphy@2 {
|
||||
compatible = "nop-usbphy";
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbotg: usb@53ff4000 {
|
||||
compatible = "fsl,imx25-usb", "fsl,imx27-usb";
|
||||
reg = <0x53ff4000 0x0200>;
|
||||
interrupts = <37>;
|
||||
clocks = <&clks 9>, <&clks 70>, <&clks 8>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
fsl,usbmisc = <&usbmisc 0>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbhost1: usb@53ff4400 {
|
||||
compatible = "fsl,imx25-usb", "fsl,imx27-usb";
|
||||
reg = <0x53ff4400 0x0200>;
|
||||
interrupts = <35>;
|
||||
clocks = <&clks 9>, <&clks 70>, <&clks 8>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
fsl,usbmisc = <&usbmisc 1>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
usbmisc: usbmisc@53ff4600 {
|
||||
#index-cells = <1>;
|
||||
compatible = "fsl,imx25-usbmisc";
|
||||
clocks = <&clks 9>, <&clks 70>, <&clks 8>;
|
||||
clock-names = "ipg", "ahb", "per";
|
||||
reg = <0x53ff4600 0x00f>;
|
||||
status = "disabled";
|
||||
};
|
||||
|
||||
dryice@53ffc000 {
|
||||
compatible = "fsl,imx25-dryice", "fsl,imx25-rtc";
|
||||
reg = <0x53ffc000 0x4000>;
|
||||
clocks = <&clks 81>;
|
||||
clock-names = "ipg";
|
||||
interrupts = <25>;
|
||||
};
|
||||
};
|
||||
|
||||
emi@80000000 {
|
||||
compatible = "fsl,emi-bus", "simple-bus";
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
reg = <0x80000000 0x3b002000>;
|
||||
ranges;
|
||||
|
||||
nand@bb000000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
|
||||
compatible = "fsl,imx25-nand";
|
||||
reg = <0xbb000000 0x2000>;
|
||||
clocks = <&clks 50>;
|
||||
clock-names = "";
|
||||
interrupts = <33>;
|
||||
status = "disabled";
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -0,0 +1,89 @@
|
|||
/*
|
||||
* Copyright 2012 Philippe Reynes <tremyfr@yahoo.fr>
|
||||
* Copyright 2012 Armadeus Systems <support@armadeus.com>
|
||||
*
|
||||
* Based on code which is: Copyright 2012 Sascha Hauer, Pengutronix
|
||||
*
|
||||
* The code contained herein is licensed under the GNU General Public
|
||||
* License. You may obtain a copy of the GNU General Public License
|
||||
* Version 2 or later at the following locations:
|
||||
*
|
||||
* http://www.opensource.org/licenses/gpl-license.html
|
||||
* http://www.gnu.org/copyleft/gpl.html
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/include/ "imx27.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Armadeus Systems APF27 module";
|
||||
compatible = "armadeus,imx27-apf27", "fsl,imx27";
|
||||
|
||||
memory {
|
||||
reg = <0xa0000000 0x04000000>;
|
||||
};
|
||||
|
||||
clocks {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
osc26m {
|
||||
compatible = "fsl,imx-osc26m", "fixed-clock";
|
||||
clock-frequency = <0>;
|
||||
};
|
||||
};
|
||||
|
||||
soc {
|
||||
aipi@10000000 {
|
||||
serial@1000a000 {
|
||||
status = "okay";
|
||||
};
|
||||
|
||||
ethernet@1002b000 {
|
||||
status = "okay";
|
||||
};
|
||||
};
|
||||
|
||||
nand@d8000000 {
|
||||
status = "okay";
|
||||
nand-bus-width = <16>;
|
||||
nand-ecc-mode = "hw";
|
||||
nand-on-flash-bbt;
|
||||
|
||||
partition@0 {
|
||||
label = "u-boot";
|
||||
reg = <0x0 0x100000>;
|
||||
};
|
||||
|
||||
partition@100000 {
|
||||
label = "env";
|
||||
reg = <0x100000 0x80000>;
|
||||
};
|
||||
|
||||
partition@180000 {
|
||||
label = "env2";
|
||||
reg = <0x180000 0x80000>;
|
||||
};
|
||||
|
||||
partition@200000 {
|
||||
label = "firmware";
|
||||
reg = <0x200000 0x80000>;
|
||||
};
|
||||
|
||||
partition@280000 {
|
||||
label = "dtb";
|
||||
reg = <0x280000 0x80000>;
|
||||
};
|
||||
|
||||
partition@300000 {
|
||||
label = "kernel";
|
||||
reg = <0x300000 0x500000>;
|
||||
};
|
||||
|
||||
partition@800000 {
|
||||
label = "rootfs";
|
||||
reg = <0x800000 0xf800000>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
|
@ -113,7 +113,7 @@ cspi2: cspi@1000f000 {
|
|||
i2c1: i2c@10012000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
|
||||
compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x10012000 0x1000>;
|
||||
interrupts = <12>;
|
||||
status = "disabled";
|
||||
|
|
@ -205,7 +205,7 @@ uart6: serial@1001c000 {
|
|||
i2c2: i2c@1001d000 {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx27-i2c", "fsl,imx1-i2c";
|
||||
compatible = "fsl,imx27-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x1001d000 0x1000>;
|
||||
interrupts = <1>;
|
||||
status = "disabled";
|
||||
|
|
|
|||
|
|
@ -377,7 +377,7 @@ cspi@83fc0000 {
|
|||
i2c@83fc4000 { /* I2C2 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
|
||||
compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x83fc4000 0x4000>;
|
||||
interrupts = <63>;
|
||||
status = "disabled";
|
||||
|
|
@ -386,7 +386,7 @@ i2c@83fc4000 { /* I2C2 */
|
|||
i2c@83fc8000 { /* I2C1 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx51-i2c", "fsl,imx1-i2c";
|
||||
compatible = "fsl,imx51-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x83fc8000 0x4000>;
|
||||
interrupts = <62>;
|
||||
status = "disabled";
|
||||
|
|
|
|||
|
|
@ -432,7 +432,7 @@ gpio7: gpio@53fe4000 {
|
|||
i2c@53fec000 { /* I2C3 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
|
||||
compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x53fec000 0x4000>;
|
||||
interrupts = <64>;
|
||||
status = "disabled";
|
||||
|
|
@ -488,7 +488,7 @@ cspi@63fc0000 {
|
|||
i2c@63fc4000 { /* I2C2 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
|
||||
compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x63fc4000 0x4000>;
|
||||
interrupts = <63>;
|
||||
status = "disabled";
|
||||
|
|
@ -497,7 +497,7 @@ i2c@63fc4000 { /* I2C2 */
|
|||
i2c@63fc8000 { /* I2C1 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx53-i2c", "fsl,imx1-i2c";
|
||||
compatible = "fsl,imx53-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x63fc8000 0x4000>;
|
||||
interrupts = <62>;
|
||||
status = "disabled";
|
||||
|
|
|
|||
|
|
@ -882,7 +882,7 @@ usdhc@0219c000 { /* uSDHC4 */
|
|||
i2c@021a0000 { /* I2C1 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
|
||||
compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x021a0000 0x4000>;
|
||||
interrupts = <0 36 0x04>;
|
||||
clocks = <&clks 125>;
|
||||
|
|
@ -892,7 +892,7 @@ i2c@021a0000 { /* I2C1 */
|
|||
i2c@021a4000 { /* I2C2 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
|
||||
compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x021a4000 0x4000>;
|
||||
interrupts = <0 37 0x04>;
|
||||
clocks = <&clks 126>;
|
||||
|
|
@ -902,7 +902,7 @@ i2c@021a4000 { /* I2C2 */
|
|||
i2c@021a8000 { /* I2C3 */
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
compatible = "fsl,imx6q-i2c", "fsl,imx1-i2c";
|
||||
compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
|
||||
reg = <0x021a8000 0x4000>;
|
||||
interrupts = <0 38 0x04>;
|
||||
clocks = <&clks 127>;
|
||||
|
|
|
|||
|
|
@ -18,7 +18,9 @@ CONFIG_MODULE_UNLOAD=y
|
|||
# CONFIG_IOSCHED_DEADLINE is not set
|
||||
# CONFIG_IOSCHED_CFQ is not set
|
||||
CONFIG_ARCH_MXC=y
|
||||
CONFIG_ARCH_IMX_V4_V5=y
|
||||
CONFIG_ARCH_MULTI_V4T=y
|
||||
CONFIG_ARCH_MULTI_V5=y
|
||||
# CONFIG_ARCH_MULTI_V7 is not set
|
||||
CONFIG_ARCH_MX1ADS=y
|
||||
CONFIG_MACH_SCB9328=y
|
||||
CONFIG_MACH_APF9328=y
|
||||
|
|
|
|||
|
|
@ -17,6 +17,8 @@ CONFIG_MODVERSIONS=y
|
|||
CONFIG_MODULE_SRCVERSION_ALL=y
|
||||
# CONFIG_BLK_DEV_BSG is not set
|
||||
CONFIG_ARCH_MXC=y
|
||||
CONFIG_ARCH_MULTI_V6=y
|
||||
CONFIG_ARCH_MULTI_V7=y
|
||||
CONFIG_MACH_MX31LILLY=y
|
||||
CONFIG_MACH_MX31LITE=y
|
||||
CONFIG_MACH_PCM037=y
|
||||
|
|
|
|||
|
|
@ -64,7 +64,7 @@ extern void __raw_readsl(const void __iomem *addr, void *data, int longlen);
|
|||
static inline void __raw_writew(u16 val, volatile void __iomem *addr)
|
||||
{
|
||||
asm volatile("strh %1, %0"
|
||||
: "+Qo" (*(volatile u16 __force *)addr)
|
||||
: "+Q" (*(volatile u16 __force *)addr)
|
||||
: "r" (val));
|
||||
}
|
||||
|
||||
|
|
@ -72,7 +72,7 @@ static inline u16 __raw_readw(const volatile void __iomem *addr)
|
|||
{
|
||||
u16 val;
|
||||
asm volatile("ldrh %1, %0"
|
||||
: "+Qo" (*(volatile u16 __force *)addr),
|
||||
: "+Q" (*(volatile u16 __force *)addr),
|
||||
"=r" (val));
|
||||
return val;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -10,7 +10,5 @@
|
|||
|
||||
extern void sched_clock_postinit(void);
|
||||
extern void setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate);
|
||||
extern void setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
|
||||
unsigned long rate);
|
||||
|
||||
#endif
|
||||
|
|
|
|||
|
|
@ -27,9 +27,9 @@
|
|||
#if __LINUX_ARM_ARCH__ <= 6
|
||||
ldr \tmp, =elf_hwcap @ may not have MVFR regs
|
||||
ldr \tmp, [\tmp, #0]
|
||||
tst \tmp, #HWCAP_VFPv3D16
|
||||
ldceql p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
|
||||
addne \base, \base, #32*4 @ step over unused register space
|
||||
tst \tmp, #HWCAP_VFPD32
|
||||
ldcnel p11, cr0, [\base],#32*4 @ FLDMIAD \base!, {d16-d31}
|
||||
addeq \base, \base, #32*4 @ step over unused register space
|
||||
#else
|
||||
VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
|
||||
and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
|
||||
|
|
@ -51,9 +51,9 @@
|
|||
#if __LINUX_ARM_ARCH__ <= 6
|
||||
ldr \tmp, =elf_hwcap @ may not have MVFR regs
|
||||
ldr \tmp, [\tmp, #0]
|
||||
tst \tmp, #HWCAP_VFPv3D16
|
||||
stceql p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
|
||||
addne \base, \base, #32*4 @ step over unused register space
|
||||
tst \tmp, #HWCAP_VFPD32
|
||||
stcnel p11, cr0, [\base],#32*4 @ FSTMIAD \base!, {d16-d31}
|
||||
addeq \base, \base, #32*4 @ step over unused register space
|
||||
#else
|
||||
VFPFMRX \tmp, MVFR0 @ Media and VFP Feature Register 0
|
||||
and \tmp, \tmp, #MVFR0_A_SIMD_MASK @ A_SIMD field
|
||||
|
|
|
|||
|
|
@ -10,27 +10,38 @@
|
|||
* published by the Free Software Foundation.
|
||||
*
|
||||
*/
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#ifdef CONFIG_DEBUG_IMX1_UART
|
||||
#define UART_PADDR MX1_UART1_BASE_ADDR
|
||||
#define UART_PADDR 0x00206000
|
||||
#elif defined (CONFIG_DEBUG_IMX25_UART)
|
||||
#define UART_PADDR MX25_UART1_BASE_ADDR
|
||||
#define UART_PADDR 0x43f90000
|
||||
#elif defined (CONFIG_DEBUG_IMX21_IMX27_UART)
|
||||
#define UART_PADDR MX2x_UART1_BASE_ADDR
|
||||
#define UART_PADDR 0x1000a000
|
||||
#elif defined (CONFIG_DEBUG_IMX31_IMX35_UART)
|
||||
#define UART_PADDR MX3x_UART1_BASE_ADDR
|
||||
#define UART_PADDR 0x43f90000
|
||||
#elif defined (CONFIG_DEBUG_IMX51_UART)
|
||||
#define UART_PADDR MX51_UART1_BASE_ADDR
|
||||
#define UART_PADDR 0x73fbc000
|
||||
#elif defined (CONFIG_DEBUG_IMX50_IMX53_UART)
|
||||
#define UART_PADDR MX53_UART1_BASE_ADDR
|
||||
#define UART_PADDR 0x53fbc000
|
||||
#elif defined (CONFIG_DEBUG_IMX6Q_UART2)
|
||||
#define UART_PADDR MX6Q_UART2_BASE_ADDR
|
||||
#define UART_PADDR 0x021e8000
|
||||
#elif defined (CONFIG_DEBUG_IMX6Q_UART4)
|
||||
#define UART_PADDR MX6Q_UART4_BASE_ADDR
|
||||
#define UART_PADDR 0x021f0000
|
||||
#endif
|
||||
|
||||
#define UART_VADDR IMX_IO_ADDRESS(UART_PADDR)
|
||||
/*
|
||||
* FIXME: This is a copy of IMX_IO_P2V in hardware.h, and needs to
|
||||
* stay sync with that. It's hard to maintain, and should be fixed
|
||||
* globally for multi-platform build to use a fixed virtual address
|
||||
* for low-level debug uart port across platforms.
|
||||
*/
|
||||
#define IMX_IO_P2V(x) ( \
|
||||
(((x) & 0x80000000) >> 7) | \
|
||||
(0xf4000000 + \
|
||||
(((x) & 0x50000000) >> 6) + \
|
||||
(((x) & 0x0b000000) >> 4) + \
|
||||
(((x) & 0x000fffff))))
|
||||
|
||||
#define UART_VADDR IMX_IO_P2V(UART_PADDR)
|
||||
|
||||
.macro addruart, rp, rv, tmp
|
||||
ldr \rp, =UART_PADDR @ physical
|
||||
|
|
@ -18,11 +18,12 @@
|
|||
#define HWCAP_THUMBEE (1 << 11)
|
||||
#define HWCAP_NEON (1 << 12)
|
||||
#define HWCAP_VFPv3 (1 << 13)
|
||||
#define HWCAP_VFPv3D16 (1 << 14)
|
||||
#define HWCAP_VFPv3D16 (1 << 14) /* also set for VFPv4-D16 */
|
||||
#define HWCAP_TLS (1 << 15)
|
||||
#define HWCAP_VFPv4 (1 << 16)
|
||||
#define HWCAP_IDIVA (1 << 17)
|
||||
#define HWCAP_IDIVT (1 << 18)
|
||||
#define HWCAP_VFPD32 (1 << 19) /* set if VFP has 32 regs (not 16) */
|
||||
#define HWCAP_IDIV (HWCAP_IDIVA | HWCAP_IDIVT)
|
||||
|
||||
|
||||
|
|
|
|||
|
|
@ -107,13 +107,6 @@ static void sched_clock_poll(unsigned long wrap_ticks)
|
|||
update_sched_clock();
|
||||
}
|
||||
|
||||
void __init setup_sched_clock_needs_suspend(u32 (*read)(void), int bits,
|
||||
unsigned long rate)
|
||||
{
|
||||
setup_sched_clock(read, bits, rate);
|
||||
cd.needs_suspend = true;
|
||||
}
|
||||
|
||||
void __init setup_sched_clock(u32 (*read)(void), int bits, unsigned long rate)
|
||||
{
|
||||
unsigned long r, w;
|
||||
|
|
@ -189,18 +182,15 @@ void __init sched_clock_postinit(void)
|
|||
static int sched_clock_suspend(void)
|
||||
{
|
||||
sched_clock_poll(sched_clock_timer.data);
|
||||
if (cd.needs_suspend)
|
||||
cd.suspended = true;
|
||||
cd.suspended = true;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static void sched_clock_resume(void)
|
||||
{
|
||||
if (cd.needs_suspend) {
|
||||
cd.epoch_cyc = read_sched_clock();
|
||||
cd.epoch_cyc_copy = cd.epoch_cyc;
|
||||
cd.suspended = false;
|
||||
}
|
||||
cd.epoch_cyc = read_sched_clock();
|
||||
cd.epoch_cyc_copy = cd.epoch_cyc;
|
||||
cd.suspended = false;
|
||||
}
|
||||
|
||||
static struct syscore_ops sched_clock_ops = {
|
||||
|
|
|
|||
|
|
@ -21,7 +21,7 @@
|
|||
#include <linux/regulator/machine.h>
|
||||
#include <linux/regulator/fixed.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include "hardware.h"
|
||||
|
||||
/* LAN9217 ethernet base address */
|
||||
#define LAN9217_BASE_ADDR(n) (n + 0x0)
|
||||
|
|
@ -1,3 +1,70 @@
|
|||
config ARCH_MXC
|
||||
bool "Freescale i.MX family" if ARCH_MULTI_V4_V5 || ARCH_MULTI_V6_V7
|
||||
select ARCH_REQUIRE_GPIOLIB
|
||||
select ARM_PATCH_PHYS_VIRT
|
||||
select AUTO_ZRELADDR if !ZBOOT_ROM
|
||||
select CLKDEV_LOOKUP
|
||||
select CLKSRC_MMIO
|
||||
select GENERIC_CLOCKEVENTS
|
||||
select GENERIC_IRQ_CHIP
|
||||
select MULTI_IRQ_HANDLER
|
||||
select SPARSE_IRQ
|
||||
select USE_OF
|
||||
help
|
||||
Support for Freescale MXC/iMX-based family of processors
|
||||
|
||||
menu "Freescale i.MX support"
|
||||
depends on ARCH_MXC
|
||||
|
||||
config MXC_IRQ_PRIOR
|
||||
bool "Use IRQ priority"
|
||||
help
|
||||
Select this if you want to use prioritized IRQ handling.
|
||||
This feature prevents higher priority ISR to be interrupted
|
||||
by lower priority IRQ even IRQF_DISABLED flag is not set.
|
||||
This may be useful in embedded applications, where are strong
|
||||
requirements for timing.
|
||||
Say N here, unless you have a specialized requirement.
|
||||
|
||||
config MXC_TZIC
|
||||
bool
|
||||
|
||||
config MXC_AVIC
|
||||
bool
|
||||
|
||||
config MXC_DEBUG_BOARD
|
||||
bool "Enable MXC debug board(for 3-stack)"
|
||||
help
|
||||
The debug board is an integral part of the MXC 3-stack(PDK)
|
||||
platforms, it can be attached or removed from the peripheral
|
||||
board. On debug board, several debug devices(ethernet, UART,
|
||||
buttons, LEDs and JTAG) are implemented. Between the MCU and
|
||||
these devices, a CPLD is added as a bridge which performs
|
||||
data/address de-multiplexing and decode, signal level shift,
|
||||
interrupt control and various board functions.
|
||||
|
||||
config HAVE_EPIT
|
||||
bool
|
||||
|
||||
config MXC_USE_EPIT
|
||||
bool "Use EPIT instead of GPT"
|
||||
depends on HAVE_EPIT
|
||||
help
|
||||
Use EPIT as the system timer on systems that have it. Normally you
|
||||
don't have a reason to do so as the EPIT has the same features and
|
||||
uses the same clocks as the GPT. Anyway, on some systems the GPT
|
||||
may be in use for other purposes.
|
||||
|
||||
config MXC_ULPI
|
||||
bool
|
||||
|
||||
config ARCH_HAS_RNGA
|
||||
bool
|
||||
|
||||
config IRAM_ALLOC
|
||||
bool
|
||||
select GENERIC_ALLOCATOR
|
||||
|
||||
config HAVE_IMX_GPC
|
||||
bool
|
||||
|
||||
|
|
@ -5,6 +72,12 @@ config HAVE_IMX_MMDC
|
|||
bool
|
||||
|
||||
config HAVE_IMX_SRC
|
||||
def_bool y if SMP
|
||||
|
||||
config IMX_HAVE_IOMUX_V1
|
||||
bool
|
||||
|
||||
config ARCH_MXC_IOMUX_V3
|
||||
bool
|
||||
|
||||
config ARCH_MX1
|
||||
|
|
@ -104,7 +177,7 @@ config SOC_IMX51
|
|||
select PINCTRL_IMX51
|
||||
select SOC_IMX5
|
||||
|
||||
if ARCH_IMX_V4_V5
|
||||
if ARCH_MULTI_V4T
|
||||
|
||||
comment "MX1 platforms:"
|
||||
config MACH_MXLADS
|
||||
|
|
@ -133,6 +206,10 @@ config MACH_APF9328
|
|||
help
|
||||
Say Yes here if you are using the Armadeus APF9328 development board
|
||||
|
||||
endif
|
||||
|
||||
if ARCH_MULTI_V5
|
||||
|
||||
comment "MX21 platforms:"
|
||||
|
||||
config MACH_MX21ADS
|
||||
|
|
@ -195,6 +272,13 @@ config MACH_EUKREA_MBIMXSD25_BASEBOARD
|
|||
|
||||
endchoice
|
||||
|
||||
config MACH_IMX25_DT
|
||||
bool "Support i.MX25 platforms from device tree"
|
||||
select SOC_IMX25
|
||||
help
|
||||
Include support for Freescale i.MX25 based platforms
|
||||
using the device tree for discovery
|
||||
|
||||
comment "MX27 platforms:"
|
||||
|
||||
config MACH_MX27ADS
|
||||
|
|
@ -384,7 +468,7 @@ config MACH_IMX27_DT
|
|||
|
||||
endif
|
||||
|
||||
if ARCH_IMX_V6_V7
|
||||
if ARCH_MULTI_V6
|
||||
|
||||
comment "MX31 platforms:"
|
||||
|
||||
|
|
@ -649,6 +733,10 @@ config MACH_VPR200
|
|||
Include support for VPR200 platform. This includes specific
|
||||
configurations for the board and its peripherals.
|
||||
|
||||
endif
|
||||
|
||||
if ARCH_MULTI_V7
|
||||
|
||||
comment "i.MX5 platforms:"
|
||||
|
||||
config MACH_MX50_RDP
|
||||
|
|
@ -756,7 +844,6 @@ config SOC_IMX6Q
|
|||
select HAVE_CAN_FLEXCAN if CAN
|
||||
select HAVE_IMX_GPC
|
||||
select HAVE_IMX_MMDC
|
||||
select HAVE_IMX_SRC
|
||||
select HAVE_SMP
|
||||
select MFD_SYSCON
|
||||
select PINCTRL
|
||||
|
|
@ -766,3 +853,7 @@ config SOC_IMX6Q
|
|||
This enables support for Freescale i.MX6 Quad processor.
|
||||
|
||||
endif
|
||||
|
||||
source "arch/arm/mach-imx/devices/Kconfig"
|
||||
|
||||
endmenu
|
||||
|
|
|
|||
|
|
@ -1,3 +1,5 @@
|
|||
obj-y := time.o cpu.o system.o irq-common.o
|
||||
|
||||
obj-$(CONFIG_SOC_IMX1) += clk-imx1.o mm-imx1.o
|
||||
obj-$(CONFIG_SOC_IMX21) += clk-imx21.o mm-imx21.o
|
||||
|
||||
|
|
@ -15,6 +17,24 @@ obj-$(CONFIG_SOC_IMX5) += cpu-imx5.o mm-imx5.o clk-imx51-imx53.o ehci-imx5.o $(i
|
|||
obj-$(CONFIG_COMMON_CLK) += clk-pllv1.o clk-pllv2.o clk-pllv3.o clk-gate2.o \
|
||||
clk-pfd.o clk-busy.o clk.o
|
||||
|
||||
obj-$(CONFIG_IMX_HAVE_IOMUX_V1) += iomux-v1.o
|
||||
obj-$(CONFIG_ARCH_MXC_IOMUX_V3) += iomux-v3.o
|
||||
|
||||
obj-$(CONFIG_MXC_TZIC) += tzic.o
|
||||
obj-$(CONFIG_MXC_AVIC) += avic.o
|
||||
|
||||
obj-$(CONFIG_IRAM_ALLOC) += iram_alloc.o
|
||||
obj-$(CONFIG_MXC_ULPI) += ulpi.o
|
||||
obj-$(CONFIG_MXC_USE_EPIT) += epit.o
|
||||
obj-$(CONFIG_MXC_DEBUG_BOARD) += 3ds_debugboard.o
|
||||
obj-$(CONFIG_CPU_FREQ_IMX) += cpufreq.o
|
||||
obj-$(CONFIG_CPU_IDLE) += cpuidle.o
|
||||
|
||||
ifdef CONFIG_SND_IMX_SOC
|
||||
obj-y += ssi-fiq.o
|
||||
obj-y += ssi-fiq-ksym.o
|
||||
endif
|
||||
|
||||
# Support for CMOS sensor interface
|
||||
obj-$(CONFIG_MX1_VIDEO) += mx1-camera-fiq.o mx1-camera-fiq-ksym.o
|
||||
|
||||
|
|
@ -30,6 +50,7 @@ obj-$(CONFIG_MACH_MX21ADS) += mach-mx21ads.o
|
|||
obj-$(CONFIG_MACH_MX25_3DS) += mach-mx25_3ds.o
|
||||
obj-$(CONFIG_MACH_EUKREA_CPUIMX25SD) += mach-eukrea_cpuimx25.o
|
||||
obj-$(CONFIG_MACH_EUKREA_MBIMXSD25_BASEBOARD) += eukrea_mbimxsd25-baseboard.o
|
||||
obj-$(CONFIG_MACH_IMX25_DT) += imx25-dt.o
|
||||
|
||||
# i.MX27 based machines
|
||||
obj-$(CONFIG_MACH_MX27ADS) += mach-mx27ads.o
|
||||
|
|
@ -89,3 +110,5 @@ obj-$(CONFIG_MACH_MX50_RDP) += mach-mx50_rdp.o
|
|||
|
||||
obj-$(CONFIG_MACH_IMX51_DT) += imx51-dt.o
|
||||
obj-$(CONFIG_SOC_IMX53) += mach-imx53.o
|
||||
|
||||
obj-y += devices/
|
||||
|
|
|
|||
|
|
@ -22,12 +22,11 @@
|
|||
#include <linux/irqdomain.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/of.h>
|
||||
#include <mach/common.h>
|
||||
#include <asm/mach/irq.h>
|
||||
#include <asm/exception.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/irqs.h>
|
||||
|
||||
#include "common.h"
|
||||
#include "hardware.h"
|
||||
#include "irq-common.h"
|
||||
|
||||
#define AVIC_INTCNTL 0x00 /* int control reg */
|
||||
|
|
@ -22,9 +22,9 @@
|
|||
#include <linux/clkdev.h>
|
||||
#include <linux/err.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/common.h>
|
||||
#include "clk.h"
|
||||
#include "common.h"
|
||||
#include "hardware.h"
|
||||
|
||||
/* CCM register addresses */
|
||||
#define IO_ADDR_CCM(off) (MX1_IO_ADDRESS(MX1_CCM_BASE_ADDR + (off)))
|
||||
|
|
@ -82,7 +82,8 @@ int __init mx1_clocks_init(unsigned long fref)
|
|||
pr_err("imx1 clk %d: register failed with %ld\n",
|
||||
i, PTR_ERR(clk[i]));
|
||||
|
||||
clk_register_clkdev(clk[dma_gate], "ahb", "imx-dma");
|
||||
clk_register_clkdev(clk[dma_gate], "ahb", "imx1-dma");
|
||||
clk_register_clkdev(clk[hclk], "ipg", "imx1-dma");
|
||||
clk_register_clkdev(clk[csi_gate], NULL, "mx1-camera.0");
|
||||
clk_register_clkdev(clk[mma_gate], "mma", NULL);
|
||||
clk_register_clkdev(clk[usbd_gate], NULL, "imx_udc.0");
|
||||
|
|
@ -94,18 +95,18 @@ int __init mx1_clocks_init(unsigned long fref)
|
|||
clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.1");
|
||||
clk_register_clkdev(clk[per1], "per", "imx1-uart.2");
|
||||
clk_register_clkdev(clk[hclk], "ipg", "imx1-uart.2");
|
||||
clk_register_clkdev(clk[hclk], NULL, "imx-i2c.0");
|
||||
clk_register_clkdev(clk[hclk], NULL, "imx1-i2c.0");
|
||||
clk_register_clkdev(clk[per2], "per", "imx1-cspi.0");
|
||||
clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.0");
|
||||
clk_register_clkdev(clk[per2], "per", "imx1-cspi.1");
|
||||
clk_register_clkdev(clk[dummy], "ipg", "imx1-cspi.1");
|
||||
clk_register_clkdev(clk[per2], NULL, "imx-mmc.0");
|
||||
clk_register_clkdev(clk[per2], "per", "imx-fb.0");
|
||||
clk_register_clkdev(clk[dummy], "ipg", "imx-fb.0");
|
||||
clk_register_clkdev(clk[dummy], "ahb", "imx-fb.0");
|
||||
clk_register_clkdev(clk[per2], "per", "imx1-fb.0");
|
||||
clk_register_clkdev(clk[dummy], "ipg", "imx1-fb.0");
|
||||
clk_register_clkdev(clk[dummy], "ahb", "imx1-fb.0");
|
||||
clk_register_clkdev(clk[hclk], "mshc", NULL);
|
||||
clk_register_clkdev(clk[per3], "ssi", NULL);
|
||||
clk_register_clkdev(clk[clk32], NULL, "mxc_rtc.0");
|
||||
clk_register_clkdev(clk[clk32], NULL, "imx1-rtc.0");
|
||||
clk_register_clkdev(clk[clko], "clko", NULL);
|
||||
|
||||
mxc_timer_init(MX1_IO_ADDRESS(MX1_TIM1_BASE_ADDR), MX1_TIM1_INT);
|
||||
|
|
|
|||
|
|
@ -25,9 +25,9 @@
|
|||
#include <linux/module.h>
|
||||
#include <linux/err.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/common.h>
|
||||
#include "clk.h"
|
||||
#include "common.h"
|
||||
#include "hardware.h"
|
||||
|
||||
#define IO_ADDR_CCM(off) (MX21_IO_ADDRESS(MX21_CCM_BASE_ADDR + (off)))
|
||||
|
||||
|
|
@ -156,16 +156,16 @@ int __init mx21_clocks_init(unsigned long lref, unsigned long href)
|
|||
clk_register_clkdev(clk[cspi2_ipg_gate], "ipg", "imx21-cspi.1");
|
||||
clk_register_clkdev(clk[per2], "per", "imx21-cspi.2");
|
||||
clk_register_clkdev(clk[cspi3_ipg_gate], "ipg", "imx21-cspi.2");
|
||||
clk_register_clkdev(clk[per3], "per", "imx-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_hclk_gate], "ahb", "imx-fb.0");
|
||||
clk_register_clkdev(clk[per3], "per", "imx21-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_hclk_gate], "ahb", "imx21-fb.0");
|
||||
clk_register_clkdev(clk[usb_gate], "per", "imx21-hcd.0");
|
||||
clk_register_clkdev(clk[usb_hclk_gate], "ahb", "imx21-hcd.0");
|
||||
clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand.0");
|
||||
clk_register_clkdev(clk[dma_hclk_gate], "ahb", "imx-dma");
|
||||
clk_register_clkdev(clk[dma_gate], "ipg", "imx-dma");
|
||||
clk_register_clkdev(clk[nfc_gate], NULL, "imx21-nand.0");
|
||||
clk_register_clkdev(clk[dma_hclk_gate], "ahb", "imx21-dma");
|
||||
clk_register_clkdev(clk[dma_gate], "ipg", "imx21-dma");
|
||||
clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
|
||||
clk_register_clkdev(clk[i2c_gate], NULL, "imx-i2c.0");
|
||||
clk_register_clkdev(clk[i2c_gate], NULL, "imx21-i2c.0");
|
||||
clk_register_clkdev(clk[kpp_gate], NULL, "mxc-keypad");
|
||||
clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0");
|
||||
clk_register_clkdev(clk[brom_gate], "brom", NULL);
|
||||
|
|
|
|||
|
|
@ -23,11 +23,14 @@
|
|||
#include <linux/io.h>
|
||||
#include <linux/clkdev.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_irq.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/common.h>
|
||||
#include <mach/mx25.h>
|
||||
#include "clk.h"
|
||||
#include "common.h"
|
||||
#include "hardware.h"
|
||||
#include "mx25.h"
|
||||
|
||||
#define CRM_BASE MX25_IO_ADDRESS(MX25_CRM_BASE_ADDR)
|
||||
|
||||
|
|
@ -55,6 +58,8 @@
|
|||
|
||||
#define ccm(x) (CRM_BASE + (x))
|
||||
|
||||
static struct clk_onecell_data clk_data;
|
||||
|
||||
static const char *cpu_sel_clks[] = { "mpll", "mpll_cpu_3_4", };
|
||||
static const char *per_sel_clks[] = { "ahb", "upll", };
|
||||
|
||||
|
|
@ -64,24 +69,30 @@ enum mx25_clks {
|
|||
per7_sel, per8_sel, per9_sel, per10_sel, per11_sel, per12_sel,
|
||||
per13_sel, per14_sel, per15_sel, per0, per1, per2, per3, per4, per5,
|
||||
per6, per7, per8, per9, per10, per11, per12, per13, per14, per15,
|
||||
csi_ipg_per, esdhc1_ipg_per, esdhc2_ipg_per, gpt_ipg_per, i2c_ipg_per,
|
||||
lcdc_ipg_per, nfc_ipg_per, ssi1_ipg_per, ssi2_ipg_per, uart_ipg_per,
|
||||
csi_ahb, esdhc1_ahb, esdhc2_ahb, fec_ahb, lcdc_ahb, sdma_ahb,
|
||||
usbotg_ahb, can1_ipg, can2_ipg, csi_ipg, cspi1_ipg, cspi2_ipg,
|
||||
cspi3_ipg, dryice_ipg, esdhc1_ipg, esdhc2_ipg, fec_ipg, iim_ipg,
|
||||
kpp_ipg, lcdc_ipg, pwm1_ipg, pwm2_ipg, pwm3_ipg, pwm4_ipg, sdma_ipg,
|
||||
ssi1_ipg, ssi2_ipg, tsc_ipg, uart1_ipg, uart2_ipg, uart3_ipg,
|
||||
uart4_ipg, uart5_ipg, wdt_ipg, clk_max
|
||||
csi_ipg_per, epit_ipg_per, esai_ipg_per, esdhc1_ipg_per, esdhc2_ipg_per,
|
||||
gpt_ipg_per, i2c_ipg_per, lcdc_ipg_per, nfc_ipg_per, owire_ipg_per,
|
||||
pwm_ipg_per, sim1_ipg_per, sim2_ipg_per, ssi1_ipg_per, ssi2_ipg_per,
|
||||
uart_ipg_per, ata_ahb, reserved1, csi_ahb, emi_ahb, esai_ahb, esdhc1_ahb,
|
||||
esdhc2_ahb, fec_ahb, lcdc_ahb, rtic_ahb, sdma_ahb, slcdc_ahb, usbotg_ahb,
|
||||
reserved2, reserved3, reserved4, reserved5, can1_ipg, can2_ipg, csi_ipg,
|
||||
cspi1_ipg, cspi2_ipg, cspi3_ipg, dryice_ipg, ect_ipg, epit1_ipg, epit2_ipg,
|
||||
reserved6, esdhc1_ipg, esdhc2_ipg, fec_ipg, reserved7, reserved8, reserved9,
|
||||
gpt1_ipg, gpt2_ipg, gpt3_ipg, gpt4_ipg, reserved10, reserved11, reserved12,
|
||||
iim_ipg, reserved13, reserved14, kpp_ipg, lcdc_ipg, reserved15, pwm1_ipg,
|
||||
pwm2_ipg, pwm3_ipg, pwm4_ipg, rngb_ipg, reserved16, scc_ipg, sdma_ipg,
|
||||
sim1_ipg, sim2_ipg, slcdc_ipg, spba_ipg, ssi1_ipg, ssi2_ipg, tsc_ipg,
|
||||
uart1_ipg, uart2_ipg, uart3_ipg, uart4_ipg, uart5_ipg, reserved17,
|
||||
wdt_ipg, clk_max
|
||||
};
|
||||
|
||||
static struct clk *clk[clk_max];
|
||||
|
||||
int __init mx25_clocks_init(void)
|
||||
static int __init __mx25_clocks_init(unsigned long osc_rate)
|
||||
{
|
||||
int i;
|
||||
|
||||
clk[dummy] = imx_clk_fixed("dummy", 0);
|
||||
clk[osc] = imx_clk_fixed("osc", 24000000);
|
||||
clk[osc] = imx_clk_fixed("osc", osc_rate);
|
||||
clk[mpll] = imx_clk_pllv1("mpll", "osc", ccm(CCM_MPCTL));
|
||||
clk[upll] = imx_clk_pllv1("upll", "osc", ccm(CCM_UPCTL));
|
||||
clk[mpll_cpu_3_4] = imx_clk_fixed_factor("mpll_cpu_3_4", "mpll", 3, 4);
|
||||
|
|
@ -123,22 +134,36 @@ int __init mx25_clocks_init(void)
|
|||
clk[per14] = imx_clk_divider("per14", "per14_sel", ccm(CCM_PCDR3), 16, 6);
|
||||
clk[per15] = imx_clk_divider("per15", "per15_sel", ccm(CCM_PCDR3), 24, 6);
|
||||
clk[csi_ipg_per] = imx_clk_gate("csi_ipg_per", "per0", ccm(CCM_CGCR0), 0);
|
||||
clk[epit_ipg_per] = imx_clk_gate("epit_ipg_per", "per1", ccm(CCM_CGCR0), 1);
|
||||
clk[esai_ipg_per] = imx_clk_gate("esai_ipg_per", "per2", ccm(CCM_CGCR0), 2);
|
||||
clk[esdhc1_ipg_per] = imx_clk_gate("esdhc1_ipg_per", "per3", ccm(CCM_CGCR0), 3);
|
||||
clk[esdhc2_ipg_per] = imx_clk_gate("esdhc2_ipg_per", "per4", ccm(CCM_CGCR0), 4);
|
||||
clk[gpt_ipg_per] = imx_clk_gate("gpt_ipg_per", "per5", ccm(CCM_CGCR0), 5);
|
||||
clk[i2c_ipg_per] = imx_clk_gate("i2c_ipg_per", "per6", ccm(CCM_CGCR0), 6);
|
||||
clk[lcdc_ipg_per] = imx_clk_gate("lcdc_ipg_per", "per7", ccm(CCM_CGCR0), 7);
|
||||
clk[nfc_ipg_per] = imx_clk_gate("nfc_ipg_per", "per8", ccm(CCM_CGCR0), 8);
|
||||
clk[owire_ipg_per] = imx_clk_gate("owire_ipg_per", "per9", ccm(CCM_CGCR0), 9);
|
||||
clk[pwm_ipg_per] = imx_clk_gate("pwm_ipg_per", "per10", ccm(CCM_CGCR0), 10);
|
||||
clk[sim1_ipg_per] = imx_clk_gate("sim1_ipg_per", "per11", ccm(CCM_CGCR0), 11);
|
||||
clk[sim2_ipg_per] = imx_clk_gate("sim2_ipg_per", "per12", ccm(CCM_CGCR0), 12);
|
||||
clk[ssi1_ipg_per] = imx_clk_gate("ssi1_ipg_per", "per13", ccm(CCM_CGCR0), 13);
|
||||
clk[ssi2_ipg_per] = imx_clk_gate("ssi2_ipg_per", "per14", ccm(CCM_CGCR0), 14);
|
||||
clk[uart_ipg_per] = imx_clk_gate("uart_ipg_per", "per15", ccm(CCM_CGCR0), 15);
|
||||
clk[ata_ahb] = imx_clk_gate("ata_ahb", "ahb", ccm(CCM_CGCR0), 16);
|
||||
/* CCM_CGCR0(17): reserved */
|
||||
clk[csi_ahb] = imx_clk_gate("csi_ahb", "ahb", ccm(CCM_CGCR0), 18);
|
||||
clk[emi_ahb] = imx_clk_gate("emi_ahb", "ahb", ccm(CCM_CGCR0), 19);
|
||||
clk[esai_ahb] = imx_clk_gate("esai_ahb", "ahb", ccm(CCM_CGCR0), 20);
|
||||
clk[esdhc1_ahb] = imx_clk_gate("esdhc1_ahb", "ahb", ccm(CCM_CGCR0), 21);
|
||||
clk[esdhc2_ahb] = imx_clk_gate("esdhc2_ahb", "ahb", ccm(CCM_CGCR0), 22);
|
||||
clk[fec_ahb] = imx_clk_gate("fec_ahb", "ahb", ccm(CCM_CGCR0), 23);
|
||||
clk[lcdc_ahb] = imx_clk_gate("lcdc_ahb", "ahb", ccm(CCM_CGCR0), 24);
|
||||
clk[rtic_ahb] = imx_clk_gate("rtic_ahb", "ahb", ccm(CCM_CGCR0), 25);
|
||||
clk[sdma_ahb] = imx_clk_gate("sdma_ahb", "ahb", ccm(CCM_CGCR0), 26);
|
||||
clk[slcdc_ahb] = imx_clk_gate("slcdc_ahb", "ahb", ccm(CCM_CGCR0), 27);
|
||||
clk[usbotg_ahb] = imx_clk_gate("usbotg_ahb", "ahb", ccm(CCM_CGCR0), 28);
|
||||
/* CCM_CGCR0(29-31): reserved */
|
||||
/* CCM_CGCR1(0): reserved in datasheet, used as audmux in FSL kernel */
|
||||
clk[can1_ipg] = imx_clk_gate("can1_ipg", "ipg", ccm(CCM_CGCR1), 2);
|
||||
clk[can2_ipg] = imx_clk_gate("can2_ipg", "ipg", ccm(CCM_CGCR1), 3);
|
||||
clk[csi_ipg] = imx_clk_gate("csi_ipg", "ipg", ccm(CCM_CGCR1), 4);
|
||||
|
|
@ -146,17 +171,41 @@ int __init mx25_clocks_init(void)
|
|||
clk[cspi2_ipg] = imx_clk_gate("cspi2_ipg", "ipg", ccm(CCM_CGCR1), 6);
|
||||
clk[cspi3_ipg] = imx_clk_gate("cspi3_ipg", "ipg", ccm(CCM_CGCR1), 7);
|
||||
clk[dryice_ipg] = imx_clk_gate("dryice_ipg", "ipg", ccm(CCM_CGCR1), 8);
|
||||
clk[ect_ipg] = imx_clk_gate("ect_ipg", "ipg", ccm(CCM_CGCR1), 9);
|
||||
clk[epit1_ipg] = imx_clk_gate("epit1_ipg", "ipg", ccm(CCM_CGCR1), 10);
|
||||
clk[epit2_ipg] = imx_clk_gate("epit2_ipg", "ipg", ccm(CCM_CGCR1), 11);
|
||||
/* CCM_CGCR1(12): reserved in datasheet, used as esai in FSL kernel */
|
||||
clk[esdhc1_ipg] = imx_clk_gate("esdhc1_ipg", "ipg", ccm(CCM_CGCR1), 13);
|
||||
clk[esdhc2_ipg] = imx_clk_gate("esdhc2_ipg", "ipg", ccm(CCM_CGCR1), 14);
|
||||
clk[fec_ipg] = imx_clk_gate("fec_ipg", "ipg", ccm(CCM_CGCR1), 15);
|
||||
/* CCM_CGCR1(16): reserved in datasheet, used as gpio1 in FSL kernel */
|
||||
/* CCM_CGCR1(17): reserved in datasheet, used as gpio2 in FSL kernel */
|
||||
/* CCM_CGCR1(18): reserved in datasheet, used as gpio3 in FSL kernel */
|
||||
clk[gpt1_ipg] = imx_clk_gate("gpt1_ipg", "ipg", ccm(CCM_CGCR1), 19);
|
||||
clk[gpt2_ipg] = imx_clk_gate("gpt2_ipg", "ipg", ccm(CCM_CGCR1), 20);
|
||||
clk[gpt3_ipg] = imx_clk_gate("gpt3_ipg", "ipg", ccm(CCM_CGCR1), 21);
|
||||
clk[gpt4_ipg] = imx_clk_gate("gpt4_ipg", "ipg", ccm(CCM_CGCR1), 22);
|
||||
/* CCM_CGCR1(23): reserved in datasheet, used as i2c1 in FSL kernel */
|
||||
/* CCM_CGCR1(24): reserved in datasheet, used as i2c2 in FSL kernel */
|
||||
/* CCM_CGCR1(25): reserved in datasheet, used as i2c3 in FSL kernel */
|
||||
clk[iim_ipg] = imx_clk_gate("iim_ipg", "ipg", ccm(CCM_CGCR1), 26);
|
||||
/* CCM_CGCR1(27): reserved in datasheet, used as iomuxc in FSL kernel */
|
||||
/* CCM_CGCR1(28): reserved in datasheet, used as kpp in FSL kernel */
|
||||
clk[kpp_ipg] = imx_clk_gate("kpp_ipg", "ipg", ccm(CCM_CGCR1), 28);
|
||||
clk[lcdc_ipg] = imx_clk_gate("lcdc_ipg", "ipg", ccm(CCM_CGCR1), 29);
|
||||
/* CCM_CGCR1(30): reserved in datasheet, used as owire in FSL kernel */
|
||||
clk[pwm1_ipg] = imx_clk_gate("pwm1_ipg", "ipg", ccm(CCM_CGCR1), 31);
|
||||
clk[pwm2_ipg] = imx_clk_gate("pwm2_ipg", "ipg", ccm(CCM_CGCR2), 0);
|
||||
clk[pwm3_ipg] = imx_clk_gate("pwm3_ipg", "ipg", ccm(CCM_CGCR2), 1);
|
||||
clk[pwm4_ipg] = imx_clk_gate("pwm4_ipg", "ipg", ccm(CCM_CGCR2), 2);
|
||||
clk[rngb_ipg] = imx_clk_gate("rngb_ipg", "ipg", ccm(CCM_CGCR2), 3);
|
||||
/* CCM_CGCR2(4): reserved in datasheet, used as rtic in FSL kernel */
|
||||
clk[scc_ipg] = imx_clk_gate("scc_ipg", "ipg", ccm(CCM_CGCR2), 5);
|
||||
clk[sdma_ipg] = imx_clk_gate("sdma_ipg", "ipg", ccm(CCM_CGCR2), 6);
|
||||
clk[sim1_ipg] = imx_clk_gate("sim1_ipg", "ipg", ccm(CCM_CGCR2), 7);
|
||||
clk[sim2_ipg] = imx_clk_gate("sim2_ipg", "ipg", ccm(CCM_CGCR2), 8);
|
||||
clk[slcdc_ipg] = imx_clk_gate("slcdc_ipg", "ipg", ccm(CCM_CGCR2), 9);
|
||||
clk[spba_ipg] = imx_clk_gate("spba_ipg", "ipg", ccm(CCM_CGCR2), 10);
|
||||
clk[ssi1_ipg] = imx_clk_gate("ssi1_ipg", "ipg", ccm(CCM_CGCR2), 11);
|
||||
clk[ssi2_ipg] = imx_clk_gate("ssi2_ipg", "ipg", ccm(CCM_CGCR2), 12);
|
||||
clk[tsc_ipg] = imx_clk_gate("tsc_ipg", "ipg", ccm(CCM_CGCR2), 13);
|
||||
|
|
@ -165,6 +214,7 @@ int __init mx25_clocks_init(void)
|
|||
clk[uart3_ipg] = imx_clk_gate("uart3_ipg", "ipg", ccm(CCM_CGCR2), 16);
|
||||
clk[uart4_ipg] = imx_clk_gate("uart4_ipg", "ipg", ccm(CCM_CGCR2), 17);
|
||||
clk[uart5_ipg] = imx_clk_gate("uart5_ipg", "ipg", ccm(CCM_CGCR2), 18);
|
||||
/* CCM_CGCR2(19): reserved in datasheet, but used as wdt in FSL kernel */
|
||||
clk[wdt_ipg] = imx_clk_gate("wdt_ipg", "ipg", ccm(CCM_CGCR2), 19);
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(clk); i++)
|
||||
|
|
@ -172,6 +222,18 @@ int __init mx25_clocks_init(void)
|
|||
pr_err("i.MX25 clk %d: register failed with %ld\n",
|
||||
i, PTR_ERR(clk[i]));
|
||||
|
||||
clk_prepare_enable(clk[emi_ahb]);
|
||||
|
||||
clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");
|
||||
clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int __init mx25_clocks_init(void)
|
||||
{
|
||||
__mx25_clocks_init(24000000);
|
||||
|
||||
/* i.mx25 has the i.mx21 type uart */
|
||||
clk_register_clkdev(clk[uart1_ipg], "ipg", "imx21-uart.0");
|
||||
clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.0");
|
||||
|
|
@ -183,8 +245,6 @@ int __init mx25_clocks_init(void)
|
|||
clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.3");
|
||||
clk_register_clkdev(clk[uart5_ipg], "ipg", "imx21-uart.4");
|
||||
clk_register_clkdev(clk[uart_ipg_per], "per", "imx21-uart.4");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");
|
||||
clk_register_clkdev(clk[gpt_ipg_per], "per", "imx-gpt.0");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "mxc-ehci.0");
|
||||
clk_register_clkdev(clk[usbotg_ahb], "ahb", "mxc-ehci.0");
|
||||
clk_register_clkdev(clk[usb_div], "per", "mxc-ehci.0");
|
||||
|
|
@ -197,7 +257,7 @@ int __init mx25_clocks_init(void)
|
|||
clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usbotg_ahb], "ahb", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[nfc_ipg_per], NULL, "mxc_nand.0");
|
||||
clk_register_clkdev(clk[nfc_ipg_per], NULL, "imx25-nand.0");
|
||||
/* i.mx25 has the i.mx35 type cspi */
|
||||
clk_register_clkdev(clk[cspi1_ipg], NULL, "imx35-cspi.0");
|
||||
clk_register_clkdev(clk[cspi2_ipg], NULL, "imx35-cspi.1");
|
||||
|
|
@ -212,15 +272,15 @@ int __init mx25_clocks_init(void)
|
|||
clk_register_clkdev(clk[per10], "per", "mxc_pwm.3");
|
||||
clk_register_clkdev(clk[kpp_ipg], NULL, "imx-keypad");
|
||||
clk_register_clkdev(clk[tsc_ipg], NULL, "mx25-adc");
|
||||
clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.0");
|
||||
clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.1");
|
||||
clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx-i2c.2");
|
||||
clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.0");
|
||||
clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.1");
|
||||
clk_register_clkdev(clk[i2c_ipg_per], NULL, "imx21-i2c.2");
|
||||
clk_register_clkdev(clk[fec_ipg], "ipg", "imx25-fec.0");
|
||||
clk_register_clkdev(clk[fec_ahb], "ahb", "imx25-fec.0");
|
||||
clk_register_clkdev(clk[dryice_ipg], NULL, "imxdi_rtc.0");
|
||||
clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ipg_per], "per", "imx21-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ipg], "ipg", "imx21-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ahb], "ahb", "imx21-fb.0");
|
||||
clk_register_clkdev(clk[wdt_ipg], NULL, "imx2-wdt.0");
|
||||
clk_register_clkdev(clk[ssi1_ipg], NULL, "imx-ssi.0");
|
||||
clk_register_clkdev(clk[ssi2_ipg], NULL, "imx-ssi.1");
|
||||
|
|
@ -230,9 +290,9 @@ int __init mx25_clocks_init(void)
|
|||
clk_register_clkdev(clk[esdhc2_ipg_per], "per", "sdhci-esdhc-imx25.1");
|
||||
clk_register_clkdev(clk[esdhc2_ipg], "ipg", "sdhci-esdhc-imx25.1");
|
||||
clk_register_clkdev(clk[esdhc2_ahb], "ahb", "sdhci-esdhc-imx25.1");
|
||||
clk_register_clkdev(clk[csi_ipg_per], "per", "mx2-camera.0");
|
||||
clk_register_clkdev(clk[csi_ipg], "ipg", "mx2-camera.0");
|
||||
clk_register_clkdev(clk[csi_ahb], "ahb", "mx2-camera.0");
|
||||
clk_register_clkdev(clk[csi_ipg_per], "per", "imx25-camera.0");
|
||||
clk_register_clkdev(clk[csi_ipg], "ipg", "imx25-camera.0");
|
||||
clk_register_clkdev(clk[csi_ahb], "ahb", "imx25-camera.0");
|
||||
clk_register_clkdev(clk[dummy], "audmux", NULL);
|
||||
clk_register_clkdev(clk[can1_ipg], NULL, "flexcan.0");
|
||||
clk_register_clkdev(clk[can2_ipg], NULL, "flexcan.1");
|
||||
|
|
@ -242,5 +302,40 @@ int __init mx25_clocks_init(void)
|
|||
clk_register_clkdev(clk[iim_ipg], "iim", NULL);
|
||||
|
||||
mxc_timer_init(MX25_IO_ADDRESS(MX25_GPT1_BASE_ADDR), MX25_INT_GPT1);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
int __init mx25_clocks_init_dt(void)
|
||||
{
|
||||
struct device_node *np;
|
||||
void __iomem *base;
|
||||
int irq;
|
||||
unsigned long osc_rate = 24000000;
|
||||
|
||||
/* retrieve the freqency of fixed clocks from device tree */
|
||||
for_each_compatible_node(np, NULL, "fixed-clock") {
|
||||
u32 rate;
|
||||
if (of_property_read_u32(np, "clock-frequency", &rate))
|
||||
continue;
|
||||
|
||||
if (of_device_is_compatible(np, "fsl,imx-osc"))
|
||||
osc_rate = rate;
|
||||
}
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,imx25-ccm");
|
||||
clk_data.clks = clk;
|
||||
clk_data.clk_num = ARRAY_SIZE(clk);
|
||||
of_clk_add_provider(np, of_clk_src_onecell_get, &clk_data);
|
||||
|
||||
__mx25_clocks_init(osc_rate);
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "fsl,imx25-gpt");
|
||||
base = of_iomap(np, 0);
|
||||
WARN_ON(!base);
|
||||
irq = irq_of_parse_and_map(np, 0);
|
||||
|
||||
mxc_timer_init(base, irq);
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -6,9 +6,9 @@
|
|||
#include <linux/clk-provider.h>
|
||||
#include <linux/of.h>
|
||||
|
||||
#include <mach/common.h>
|
||||
#include <mach/hardware.h>
|
||||
#include "clk.h"
|
||||
#include "common.h"
|
||||
#include "hardware.h"
|
||||
|
||||
#define IO_ADDR_CCM(off) (MX27_IO_ADDRESS(MX27_CCM_BASE_ADDR + (off)))
|
||||
|
||||
|
|
@ -211,19 +211,19 @@ int __init mx27_clocks_init(unsigned long fref)
|
|||
clk_register_clkdev(clk[gpt6_ipg_gate], "ipg", "imx-gpt.5");
|
||||
clk_register_clkdev(clk[per1_gate], "per", "imx-gpt.5");
|
||||
clk_register_clkdev(clk[pwm_ipg_gate], NULL, "mxc_pwm.0");
|
||||
clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.0");
|
||||
clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "mxc-mmc.0");
|
||||
clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.1");
|
||||
clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.1");
|
||||
clk_register_clkdev(clk[per2_gate], "per", "mxc-mmc.2");
|
||||
clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "mxc-mmc.2");
|
||||
clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.0");
|
||||
clk_register_clkdev(clk[sdhc1_ipg_gate], "ipg", "imx21-mmc.0");
|
||||
clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.1");
|
||||
clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.1");
|
||||
clk_register_clkdev(clk[per2_gate], "per", "imx21-mmc.2");
|
||||
clk_register_clkdev(clk[sdhc2_ipg_gate], "ipg", "imx21-mmc.2");
|
||||
clk_register_clkdev(clk[cspi1_ipg_gate], NULL, "imx27-cspi.0");
|
||||
clk_register_clkdev(clk[cspi2_ipg_gate], NULL, "imx27-cspi.1");
|
||||
clk_register_clkdev(clk[cspi3_ipg_gate], NULL, "imx27-cspi.2");
|
||||
clk_register_clkdev(clk[per3_gate], "per", "imx-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx-fb.0");
|
||||
clk_register_clkdev(clk[csi_ahb_gate], "ahb", "mx2-camera.0");
|
||||
clk_register_clkdev(clk[per3_gate], "per", "imx21-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ipg_gate], "ipg", "imx21-fb.0");
|
||||
clk_register_clkdev(clk[lcdc_ahb_gate], "ahb", "imx21-fb.0");
|
||||
clk_register_clkdev(clk[csi_ahb_gate], "ahb", "imx27-camera.0");
|
||||
clk_register_clkdev(clk[usb_div], "per", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_ipg_gate], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usb_ahb_gate], "ahb", "fsl-usb2-udc");
|
||||
|
|
@ -238,27 +238,27 @@ int __init mx27_clocks_init(unsigned long fref)
|
|||
clk_register_clkdev(clk[usb_ahb_gate], "ahb", "mxc-ehci.2");
|
||||
clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
|
||||
clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
|
||||
clk_register_clkdev(clk[nfc_baud_gate], NULL, "mxc_nand.0");
|
||||
clk_register_clkdev(clk[nfc_baud_gate], NULL, "imx27-nand.0");
|
||||
clk_register_clkdev(clk[vpu_baud_gate], "per", "coda-imx27.0");
|
||||
clk_register_clkdev(clk[vpu_ahb_gate], "ahb", "coda-imx27.0");
|
||||
clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx-dma");
|
||||
clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx-dma");
|
||||
clk_register_clkdev(clk[dma_ahb_gate], "ahb", "imx27-dma");
|
||||
clk_register_clkdev(clk[dma_ipg_gate], "ipg", "imx27-dma");
|
||||
clk_register_clkdev(clk[fec_ipg_gate], "ipg", "imx27-fec.0");
|
||||
clk_register_clkdev(clk[fec_ahb_gate], "ahb", "imx27-fec.0");
|
||||
clk_register_clkdev(clk[wdog_ipg_gate], NULL, "imx2-wdt.0");
|
||||
clk_register_clkdev(clk[i2c1_ipg_gate], NULL, "imx-i2c.0");
|
||||
clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx-i2c.1");
|
||||
clk_register_clkdev(clk[i2c1_ipg_gate], NULL, "imx21-i2c.0");
|
||||
clk_register_clkdev(clk[i2c2_ipg_gate], NULL, "imx21-i2c.1");
|
||||
clk_register_clkdev(clk[owire_ipg_gate], NULL, "mxc_w1.0");
|
||||
clk_register_clkdev(clk[kpp_ipg_gate], NULL, "imx-keypad");
|
||||
clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "mx2-camera.0");
|
||||
clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "mx2-camera.0");
|
||||
clk_register_clkdev(clk[emma_ahb_gate], "emma-ahb", "imx27-camera.0");
|
||||
clk_register_clkdev(clk[emma_ipg_gate], "emma-ipg", "imx27-camera.0");
|
||||
clk_register_clkdev(clk[emma_ahb_gate], "ahb", "m2m-emmaprp.0");
|
||||
clk_register_clkdev(clk[emma_ipg_gate], "ipg", "m2m-emmaprp.0");
|
||||
clk_register_clkdev(clk[iim_ipg_gate], "iim", NULL);
|
||||
clk_register_clkdev(clk[gpio_ipg_gate], "gpio", NULL);
|
||||
clk_register_clkdev(clk[brom_ahb_gate], "brom", NULL);
|
||||
clk_register_clkdev(clk[ata_ahb_gate], "ata", NULL);
|
||||
clk_register_clkdev(clk[rtc_ipg_gate], NULL, "mxc_rtc");
|
||||
clk_register_clkdev(clk[rtc_ipg_gate], NULL, "imx21-rtc");
|
||||
clk_register_clkdev(clk[scc_ipg_gate], "scc", NULL);
|
||||
clk_register_clkdev(clk[cpu_div], "cpu", NULL);
|
||||
clk_register_clkdev(clk[emi_ahb_gate], "emi_ahb" , NULL);
|
||||
|
|
|
|||
|
|
@ -22,12 +22,11 @@
|
|||
#include <linux/err.h>
|
||||
#include <linux/of.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/mx31.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
#include "clk.h"
|
||||
#include "common.h"
|
||||
#include "crmregs-imx3.h"
|
||||
#include "hardware.h"
|
||||
#include "mx31.h"
|
||||
|
||||
static const char *mcu_main_sel[] = { "spll", "mpll", };
|
||||
static const char *per_sel[] = { "per_div", "ipg", };
|
||||
|
|
@ -124,10 +123,10 @@ int __init mx31_clocks_init(unsigned long fref)
|
|||
clk_register_clkdev(clk[cspi3_gate], NULL, "imx31-cspi.2");
|
||||
clk_register_clkdev(clk[pwm_gate], "pwm", NULL);
|
||||
clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
|
||||
clk_register_clkdev(clk[rtc_gate], NULL, "mxc_rtc");
|
||||
clk_register_clkdev(clk[rtc_gate], NULL, "imx21-rtc");
|
||||
clk_register_clkdev(clk[epit1_gate], "epit", NULL);
|
||||
clk_register_clkdev(clk[epit2_gate], "epit", NULL);
|
||||
clk_register_clkdev(clk[nfc], NULL, "mxc_nand.0");
|
||||
clk_register_clkdev(clk[nfc], NULL, "imx27-nand.0");
|
||||
clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core");
|
||||
clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");
|
||||
clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad");
|
||||
|
|
@ -155,12 +154,12 @@ int __init mx31_clocks_init(unsigned long fref)
|
|||
clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.3");
|
||||
clk_register_clkdev(clk[uart5_gate], "per", "imx21-uart.4");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "imx21-uart.4");
|
||||
clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");
|
||||
clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1");
|
||||
clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");
|
||||
clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0");
|
||||
clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1");
|
||||
clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
|
||||
clk_register_clkdev(clk[owire_gate], NULL, "mxc_w1.0");
|
||||
clk_register_clkdev(clk[sdhc1_gate], NULL, "mxc-mmc.0");
|
||||
clk_register_clkdev(clk[sdhc2_gate], NULL, "mxc-mmc.1");
|
||||
clk_register_clkdev(clk[sdhc1_gate], NULL, "imx31-mmc.0");
|
||||
clk_register_clkdev(clk[sdhc2_gate], NULL, "imx31-mmc.1");
|
||||
clk_register_clkdev(clk[ssi1_gate], NULL, "imx-ssi.0");
|
||||
clk_register_clkdev(clk[ssi2_gate], NULL, "imx-ssi.1");
|
||||
clk_register_clkdev(clk[firi_gate], "firi", NULL);
|
||||
|
|
|
|||
|
|
@ -14,11 +14,10 @@
|
|||
#include <linux/of.h>
|
||||
#include <linux/err.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
#include "crmregs-imx3.h"
|
||||
#include "clk.h"
|
||||
#include "common.h"
|
||||
#include "hardware.h"
|
||||
|
||||
struct arm_ahb_div {
|
||||
unsigned char arm, ahb, sel;
|
||||
|
|
@ -226,9 +225,9 @@ int __init mx35_clocks_init()
|
|||
clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0");
|
||||
clk_register_clkdev(clk[gpt_gate], "per", "imx-gpt.0");
|
||||
clk_register_clkdev(clk[ipg], "ipg", "imx-gpt.0");
|
||||
clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");
|
||||
clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1");
|
||||
clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");
|
||||
clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0");
|
||||
clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1");
|
||||
clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
|
||||
clk_register_clkdev(clk[ipu_gate], NULL, "ipu-core");
|
||||
clk_register_clkdev(clk[ipu_gate], NULL, "mx3_sdc_fb");
|
||||
clk_register_clkdev(clk[kpp_gate], NULL, "imx-keypad");
|
||||
|
|
@ -256,7 +255,7 @@ int __init mx35_clocks_init()
|
|||
clk_register_clkdev(clk[ipg], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usbotg_gate], "ahb", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[wdog_gate], NULL, "imx2-wdt.0");
|
||||
clk_register_clkdev(clk[nfc_div], NULL, "mxc_nand.0");
|
||||
clk_register_clkdev(clk[nfc_div], NULL, "imx25-nand.0");
|
||||
clk_register_clkdev(clk[csi_gate], NULL, "mx3-camera.0");
|
||||
|
||||
clk_prepare_enable(clk[spba_gate]);
|
||||
|
|
|
|||
|
|
@ -14,11 +14,10 @@
|
|||
#include <linux/of.h>
|
||||
#include <linux/err.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
#include "crm-regs-imx5.h"
|
||||
#include "clk.h"
|
||||
#include "common.h"
|
||||
#include "hardware.h"
|
||||
|
||||
/* Low-power Audio Playback Mode clock */
|
||||
static const char *lp_apm_sel[] = { "osc", };
|
||||
|
|
@ -258,8 +257,8 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
|
|||
clk_register_clkdev(clk[cspi_ipg_gate], NULL, "imx35-cspi.2");
|
||||
clk_register_clkdev(clk[pwm1_ipg_gate], "pwm", "mxc_pwm.0");
|
||||
clk_register_clkdev(clk[pwm2_ipg_gate], "pwm", "mxc_pwm.1");
|
||||
clk_register_clkdev(clk[i2c1_gate], NULL, "imx-i2c.0");
|
||||
clk_register_clkdev(clk[i2c2_gate], NULL, "imx-i2c.1");
|
||||
clk_register_clkdev(clk[i2c1_gate], NULL, "imx21-i2c.0");
|
||||
clk_register_clkdev(clk[i2c2_gate], NULL, "imx21-i2c.1");
|
||||
clk_register_clkdev(clk[usboh3_per_gate], "per", "mxc-ehci.0");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ipg", "mxc-ehci.0");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ahb", "mxc-ehci.0");
|
||||
|
|
@ -272,7 +271,7 @@ static void __init mx5_clocks_common_init(unsigned long rate_ckil,
|
|||
clk_register_clkdev(clk[usboh3_per_gate], "per", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ipg", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[usboh3_gate], "ahb", "fsl-usb2-udc");
|
||||
clk_register_clkdev(clk[nfc_gate], NULL, "mxc_nand");
|
||||
clk_register_clkdev(clk[nfc_gate], NULL, "imx51-nand");
|
||||
clk_register_clkdev(clk[ssi1_ipg_gate], NULL, "imx-ssi.0");
|
||||
clk_register_clkdev(clk[ssi2_ipg_gate], NULL, "imx-ssi.1");
|
||||
clk_register_clkdev(clk[ssi3_ipg_gate], NULL, "imx-ssi.2");
|
||||
|
|
@ -345,7 +344,7 @@ int __init mx51_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
|
|||
|
||||
mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2);
|
||||
|
||||
clk_register_clkdev(clk[hsi2c_gate], NULL, "imx-i2c.2");
|
||||
clk_register_clkdev(clk[hsi2c_gate], NULL, "imx21-i2c.2");
|
||||
clk_register_clkdev(clk[mx51_mipi], "mipi_hsp", NULL);
|
||||
clk_register_clkdev(clk[vpu_gate], NULL, "imx51-vpu.0");
|
||||
clk_register_clkdev(clk[fec_gate], NULL, "imx27-fec.0");
|
||||
|
|
@ -440,7 +439,7 @@ int __init mx53_clocks_init(unsigned long rate_ckil, unsigned long rate_osc,
|
|||
mx5_clocks_common_init(rate_ckil, rate_osc, rate_ckih1, rate_ckih2);
|
||||
|
||||
clk_register_clkdev(clk[vpu_gate], NULL, "imx53-vpu.0");
|
||||
clk_register_clkdev(clk[i2c3_gate], NULL, "imx-i2c.2");
|
||||
clk_register_clkdev(clk[i2c3_gate], NULL, "imx21-i2c.2");
|
||||
clk_register_clkdev(clk[fec_gate], NULL, "imx25-fec.0");
|
||||
clk_register_clkdev(clk[ipu_gate], "bus", "imx53-ipu");
|
||||
clk_register_clkdev(clk[ipu_di0_gate], "di0", "imx53-ipu");
|
||||
|
|
|
|||
|
|
@ -19,8 +19,9 @@
|
|||
#include <linux/of.h>
|
||||
#include <linux/of_address.h>
|
||||
#include <linux/of_irq.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
#include "clk.h"
|
||||
#include "common.h"
|
||||
|
||||
#define CCGR0 0x68
|
||||
#define CCGR1 0x6c
|
||||
|
|
|
|||
|
|
@ -4,10 +4,10 @@
|
|||
#include <linux/slab.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/err.h>
|
||||
#include <mach/common.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "clk.h"
|
||||
#include "common.h"
|
||||
#include "hardware.h"
|
||||
|
||||
/**
|
||||
* pll v1
|
||||
|
|
|
|||
|
|
@ -66,6 +66,7 @@ extern int mx51_clocks_init(unsigned long ckil, unsigned long osc,
|
|||
unsigned long ckih1, unsigned long ckih2);
|
||||
extern int mx53_clocks_init(unsigned long ckil, unsigned long osc,
|
||||
unsigned long ckih1, unsigned long ckih2);
|
||||
extern int mx25_clocks_init_dt(void);
|
||||
extern int mx27_clocks_init_dt(void);
|
||||
extern int mx31_clocks_init_dt(void);
|
||||
extern int mx51_clocks_init_dt(void);
|
||||
|
|
@ -79,6 +80,7 @@ extern void mxc_arch_reset_init(void __iomem *);
|
|||
extern int mx53_revision(void);
|
||||
extern int mx53_display_revision(void);
|
||||
extern void imx_set_aips(void __iomem *);
|
||||
extern int mxc_device_init(void);
|
||||
|
||||
enum mxc_cpu_pwr_mode {
|
||||
WAIT_CLOCKED, /* wfi only */
|
||||
|
|
@ -11,8 +11,9 @@
|
|||
*/
|
||||
#include <linux/module.h>
|
||||
#include <linux/io.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/iim.h>
|
||||
|
||||
#include "iim.h"
|
||||
#include "hardware.h"
|
||||
|
||||
static int mx25_cpu_rev = -1;
|
||||
|
||||
|
|
|
|||
|
|
@ -24,7 +24,7 @@
|
|||
#include <linux/io.h>
|
||||
#include <linux/module.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include "hardware.h"
|
||||
|
||||
static int mx27_cpu_rev = -1;
|
||||
static int mx27_cpu_partnumber;
|
||||
|
|
|
|||
|
|
@ -11,9 +11,10 @@
|
|||
|
||||
#include <linux/module.h>
|
||||
#include <linux/io.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/iim.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
#include "common.h"
|
||||
#include "hardware.h"
|
||||
#include "iim.h"
|
||||
|
||||
static int mx31_cpu_rev = -1;
|
||||
|
||||
|
|
|
|||
|
|
@ -10,8 +10,9 @@
|
|||
*/
|
||||
#include <linux/module.h>
|
||||
#include <linux/io.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/iim.h>
|
||||
|
||||
#include "hardware.h"
|
||||
#include "iim.h"
|
||||
|
||||
static int mx35_cpu_rev = -1;
|
||||
|
||||
|
|
|
|||
|
|
@ -15,9 +15,10 @@
|
|||
#include <linux/kernel.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/module.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include "hardware.h"
|
||||
|
||||
static int mx5_cpu_rev = -1;
|
||||
|
||||
#define IIM_SREV 0x24
|
||||
|
|
|
|||
|
|
@ -1,7 +1,8 @@
|
|||
|
||||
#include <linux/module.h>
|
||||
#include <linux/io.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "hardware.h"
|
||||
|
||||
unsigned int __mxc_cpu_type;
|
||||
EXPORT_SYMBOL(__mxc_cpu_type);
|
||||
|
|
@ -13,9 +13,10 @@
|
|||
|
||||
#include <linux/bug.h>
|
||||
#include <linux/types.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <linux/kernel.h>
|
||||
|
||||
#include "hardware.h"
|
||||
|
||||
static struct cpu_op mx51_cpu_op[] = {
|
||||
{
|
||||
.cpu_rate = 160000000,},
|
||||
|
|
|
|||
|
|
@ -22,7 +22,8 @@
|
|||
#include <linux/clk.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/slab.h>
|
||||
#include <mach/hardware.h>
|
||||
|
||||
#include "hardware.h"
|
||||
|
||||
#define CLK32_FREQ 32768
|
||||
#define NANOSECOND (1000 * 1000 * 1000)
|
||||
|
|
@ -6,8 +6,7 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/mx1.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "devices/devices-common.h"
|
||||
|
||||
extern const struct imx_imx_fb_data imx1_imx_fb_data;
|
||||
#define imx1_add_imx_fb(pdata) \
|
||||
|
|
|
|||
|
|
@ -6,8 +6,7 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/mx21.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "devices/devices-common.h"
|
||||
|
||||
extern const struct imx_imx21_hcd_data imx21_imx21_hcd_data;
|
||||
#define imx21_add_imx21_hcd(pdata) \
|
||||
|
|
|
|||
|
|
@ -6,8 +6,7 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/mx25.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "devices/devices-common.h"
|
||||
|
||||
extern const struct imx_fec_data imx25_fec_data;
|
||||
#define imx25_add_fec(pdata) \
|
||||
|
|
|
|||
|
|
@ -6,8 +6,7 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/mx27.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "devices/devices-common.h"
|
||||
|
||||
extern const struct imx_fec_data imx27_fec_data;
|
||||
#define imx27_add_fec(pdata) \
|
||||
|
|
|
|||
|
|
@ -6,8 +6,7 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/mx31.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "devices/devices-common.h"
|
||||
|
||||
extern const struct imx_fsl_usb2_udc_data imx31_fsl_usb2_udc_data;
|
||||
#define imx31_add_fsl_usb2_udc(pdata) \
|
||||
|
|
|
|||
|
|
@ -6,8 +6,7 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/mx35.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "devices/devices-common.h"
|
||||
|
||||
extern const struct imx_fec_data imx35_fec_data;
|
||||
#define imx35_add_fec(pdata) \
|
||||
|
|
|
|||
|
|
@ -18,8 +18,7 @@
|
|||
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
|
||||
*/
|
||||
|
||||
#include <mach/mx50.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "devices/devices-common.h"
|
||||
|
||||
extern const struct imx_imx_uart_1irq_data imx50_imx_uart_data[];
|
||||
#define imx50_add_imx_uart(id, pdata) \
|
||||
|
|
|
|||
|
|
@ -6,8 +6,7 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/mx51.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "devices/devices-common.h"
|
||||
|
||||
extern const struct imx_fec_data imx51_fec_data;
|
||||
#define imx51_add_fec(pdata) \
|
||||
|
|
|
|||
|
|
@ -1,3 +1,5 @@
|
|||
obj-y := devices.o
|
||||
|
||||
obj-$(CONFIG_IMX_HAVE_PLATFORM_FEC) += platform-fec.o
|
||||
obj-$(CONFIG_IMX_HAVE_PLATFORM_FLEXCAN) += platform-flexcan.o
|
||||
obj-$(CONFIG_IMX_HAVE_PLATFORM_FSL_USB2_UDC) += platform-fsl-usb2-udc.o
|
||||
|
|
@ -108,6 +108,7 @@ struct platform_device *__init imx_add_imxdi_rtc(
|
|||
|
||||
#include <linux/platform_data/video-imxfb.h>
|
||||
struct imx_imx_fb_data {
|
||||
const char *devid;
|
||||
resource_size_t iobase;
|
||||
resource_size_t iosize;
|
||||
resource_size_t irq;
|
||||
|
|
@ -118,6 +119,7 @@ struct platform_device *__init imx_add_imx_fb(
|
|||
|
||||
#include <linux/platform_data/i2c-imx.h>
|
||||
struct imx_imx_i2c_data {
|
||||
const char *devid;
|
||||
int id;
|
||||
resource_size_t iobase;
|
||||
resource_size_t iosize;
|
||||
|
|
@ -219,6 +221,7 @@ struct platform_device *__init imx_add_mx1_camera(
|
|||
|
||||
#include <linux/platform_data/camera-mx2.h>
|
||||
struct imx_mx2_camera_data {
|
||||
const char *devid;
|
||||
resource_size_t iobasecsi;
|
||||
resource_size_t iosizecsi;
|
||||
resource_size_t irqcsi;
|
||||
|
|
@ -244,6 +247,7 @@ struct platform_device *__init imx_add_mxc_ehci(
|
|||
|
||||
#include <linux/platform_data/mmc-mxcmmc.h>
|
||||
struct imx_mxc_mmc_data {
|
||||
const char *devid;
|
||||
int id;
|
||||
resource_size_t iobase;
|
||||
resource_size_t iosize;
|
||||
|
|
@ -256,6 +260,7 @@ struct platform_device *__init imx_add_mxc_mmc(
|
|||
|
||||
#include <linux/platform_data/mtd-mxc_nand.h>
|
||||
struct imx_mxc_nand_data {
|
||||
const char *devid;
|
||||
/*
|
||||
* id is traditionally 0, but -1 is more appropriate. We use -1 for new
|
||||
* machines but don't change existing devices as the nand device usually
|
||||
|
|
@ -290,6 +295,7 @@ struct platform_device *__init imx_add_mxc_pwm(
|
|||
|
||||
/* mxc_rtc */
|
||||
struct imx_mxc_rtc_data {
|
||||
const char *devid;
|
||||
resource_size_t iobase;
|
||||
resource_size_t irq;
|
||||
};
|
||||
|
|
@ -326,7 +332,8 @@ struct platform_device *__init imx_add_spi_imx(
|
|||
const struct imx_spi_imx_data *data,
|
||||
const struct spi_imx_master *pdata);
|
||||
|
||||
struct platform_device *imx_add_imx_dma(void);
|
||||
struct platform_device *imx_add_imx_dma(char *name, resource_size_t iobase,
|
||||
int irq, int irq_err);
|
||||
struct platform_device *imx_add_imx_sdma(char *name,
|
||||
resource_size_t iobase, int irq, struct sdma_platform_data *pdata);
|
||||
|
||||
|
|
@ -21,7 +21,6 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/err.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
struct device mxc_aips_bus = {
|
||||
.init_name = "mxc_aips",
|
||||
|
|
@ -33,7 +32,7 @@ struct device mxc_ahb_bus = {
|
|||
.parent = &platform_bus,
|
||||
};
|
||||
|
||||
static int __init mxc_device_init(void)
|
||||
int __init mxc_device_init(void)
|
||||
{
|
||||
int ret;
|
||||
|
||||
|
|
@ -46,4 +45,3 @@ static int __init mxc_device_init(void)
|
|||
done:
|
||||
return ret;
|
||||
}
|
||||
core_initcall(mxc_device_init);
|
||||
|
|
@ -24,8 +24,9 @@
|
|||
#include <linux/device.h>
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <asm/sizes.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_ahci_imx_data_entry_single(soc, _devid) \
|
||||
{ \
|
||||
|
|
@ -8,8 +8,9 @@
|
|||
*/
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <asm/sizes.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_fec_data_entry_single(soc, _devid) \
|
||||
{ \
|
||||
|
|
@ -5,8 +5,8 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_flexcan_data_entry_single(soc, _id, _hwid, _size) \
|
||||
{ \
|
||||
|
|
@ -7,8 +7,9 @@
|
|||
* Free Software Foundation.
|
||||
*/
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_fsl_usb2_udc_data_entry_single(soc) \
|
||||
{ \
|
||||
|
|
@ -6,7 +6,7 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/devices-common.h>
|
||||
#include "devices-common.h"
|
||||
|
||||
struct platform_device *__init mxc_register_gpio(char *name, int id,
|
||||
resource_size_t iobase, resource_size_t iosize, int irq, int irq_high)
|
||||
|
|
@ -16,8 +16,9 @@
|
|||
* Boston, MA 02110-1301, USA.
|
||||
*/
|
||||
#include <asm/sizes.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
struct platform_device *__init imx_add_gpio_keys(
|
||||
const struct gpio_keys_platform_data *pdata)
|
||||
|
|
@ -6,12 +6,29 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/devices-common.h>
|
||||
#include "devices-common.h"
|
||||
|
||||
struct platform_device __init __maybe_unused *imx_add_imx_dma(void)
|
||||
struct platform_device __init __maybe_unused *imx_add_imx_dma(char *name,
|
||||
resource_size_t iobase, int irq, int irq_err)
|
||||
{
|
||||
struct resource res[] = {
|
||||
{
|
||||
.start = iobase,
|
||||
.end = iobase + SZ_4K - 1,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}, {
|
||||
.start = irq,
|
||||
.end = irq,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
}, {
|
||||
.start = irq_err,
|
||||
.end = irq_err,
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
return platform_device_register_resndata(&mxc_ahb_bus,
|
||||
"imx-dma", -1, NULL, 0, NULL, 0);
|
||||
name, -1, res, ARRAY_SIZE(res), NULL, 0);
|
||||
}
|
||||
|
||||
struct platform_device __init __maybe_unused *imx_add_imx_sdma(char *name,
|
||||
|
|
@ -7,11 +7,13 @@
|
|||
* Free Software Foundation.
|
||||
*/
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
|
||||
#define imx_imx_fb_data_entry_single(soc, _size) \
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_imx_fb_data_entry_single(soc, _devid, _size) \
|
||||
{ \
|
||||
.devid = _devid, \
|
||||
.iobase = soc ## _LCDC_BASE_ADDR, \
|
||||
.iosize = _size, \
|
||||
.irq = soc ## _INT_LCDC, \
|
||||
|
|
@ -19,22 +21,22 @@
|
|||
|
||||
#ifdef CONFIG_SOC_IMX1
|
||||
const struct imx_imx_fb_data imx1_imx_fb_data __initconst =
|
||||
imx_imx_fb_data_entry_single(MX1, SZ_4K);
|
||||
imx_imx_fb_data_entry_single(MX1, "imx1-fb", SZ_4K);
|
||||
#endif /* ifdef CONFIG_SOC_IMX1 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX21
|
||||
const struct imx_imx_fb_data imx21_imx_fb_data __initconst =
|
||||
imx_imx_fb_data_entry_single(MX21, SZ_4K);
|
||||
imx_imx_fb_data_entry_single(MX21, "imx21-fb", SZ_4K);
|
||||
#endif /* ifdef CONFIG_SOC_IMX21 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX25
|
||||
const struct imx_imx_fb_data imx25_imx_fb_data __initconst =
|
||||
imx_imx_fb_data_entry_single(MX25, SZ_16K);
|
||||
imx_imx_fb_data_entry_single(MX25, "imx21-fb", SZ_16K);
|
||||
#endif /* ifdef CONFIG_SOC_IMX25 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX27
|
||||
const struct imx_imx_fb_data imx27_imx_fb_data __initconst =
|
||||
imx_imx_fb_data_entry_single(MX27, SZ_4K);
|
||||
imx_imx_fb_data_entry_single(MX27, "imx21-fb", SZ_4K);
|
||||
#endif /* ifdef CONFIG_SOC_IMX27 */
|
||||
|
||||
struct platform_device *__init imx_add_imx_fb(
|
||||
|
|
@ -6,34 +6,35 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_imx_i2c_data_entry_single(soc, _id, _hwid, _size) \
|
||||
#define imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size) \
|
||||
{ \
|
||||
.devid = _devid, \
|
||||
.id = _id, \
|
||||
.iobase = soc ## _I2C ## _hwid ## _BASE_ADDR, \
|
||||
.iosize = _size, \
|
||||
.irq = soc ## _INT_I2C ## _hwid, \
|
||||
}
|
||||
|
||||
#define imx_imx_i2c_data_entry(soc, _id, _hwid, _size) \
|
||||
[_id] = imx_imx_i2c_data_entry_single(soc, _id, _hwid, _size)
|
||||
#define imx_imx_i2c_data_entry(soc, _devid, _id, _hwid, _size) \
|
||||
[_id] = imx_imx_i2c_data_entry_single(soc, _devid, _id, _hwid, _size)
|
||||
|
||||
#ifdef CONFIG_SOC_IMX1
|
||||
const struct imx_imx_i2c_data imx1_imx_i2c_data __initconst =
|
||||
imx_imx_i2c_data_entry_single(MX1, 0, , SZ_4K);
|
||||
imx_imx_i2c_data_entry_single(MX1, "imx1-i2c", 0, , SZ_4K);
|
||||
#endif /* ifdef CONFIG_SOC_IMX1 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX21
|
||||
const struct imx_imx_i2c_data imx21_imx_i2c_data __initconst =
|
||||
imx_imx_i2c_data_entry_single(MX21, 0, , SZ_4K);
|
||||
imx_imx_i2c_data_entry_single(MX21, "imx21-i2c", 0, , SZ_4K);
|
||||
#endif /* ifdef CONFIG_SOC_IMX21 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX25
|
||||
const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = {
|
||||
#define imx25_imx_i2c_data_entry(_id, _hwid) \
|
||||
imx_imx_i2c_data_entry(MX25, _id, _hwid, SZ_16K)
|
||||
imx_imx_i2c_data_entry(MX25, "imx21-i2c", _id, _hwid, SZ_16K)
|
||||
imx25_imx_i2c_data_entry(0, 1),
|
||||
imx25_imx_i2c_data_entry(1, 2),
|
||||
imx25_imx_i2c_data_entry(2, 3),
|
||||
|
|
@ -43,7 +44,7 @@ const struct imx_imx_i2c_data imx25_imx_i2c_data[] __initconst = {
|
|||
#ifdef CONFIG_SOC_IMX27
|
||||
const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = {
|
||||
#define imx27_imx_i2c_data_entry(_id, _hwid) \
|
||||
imx_imx_i2c_data_entry(MX27, _id, _hwid, SZ_4K)
|
||||
imx_imx_i2c_data_entry(MX27, "imx21-i2c", _id, _hwid, SZ_4K)
|
||||
imx27_imx_i2c_data_entry(0, 1),
|
||||
imx27_imx_i2c_data_entry(1, 2),
|
||||
};
|
||||
|
|
@ -52,7 +53,7 @@ const struct imx_imx_i2c_data imx27_imx_i2c_data[] __initconst = {
|
|||
#ifdef CONFIG_SOC_IMX31
|
||||
const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = {
|
||||
#define imx31_imx_i2c_data_entry(_id, _hwid) \
|
||||
imx_imx_i2c_data_entry(MX31, _id, _hwid, SZ_4K)
|
||||
imx_imx_i2c_data_entry(MX31, "imx21-i2c", _id, _hwid, SZ_4K)
|
||||
imx31_imx_i2c_data_entry(0, 1),
|
||||
imx31_imx_i2c_data_entry(1, 2),
|
||||
imx31_imx_i2c_data_entry(2, 3),
|
||||
|
|
@ -62,7 +63,7 @@ const struct imx_imx_i2c_data imx31_imx_i2c_data[] __initconst = {
|
|||
#ifdef CONFIG_SOC_IMX35
|
||||
const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = {
|
||||
#define imx35_imx_i2c_data_entry(_id, _hwid) \
|
||||
imx_imx_i2c_data_entry(MX35, _id, _hwid, SZ_4K)
|
||||
imx_imx_i2c_data_entry(MX35, "imx21-i2c", _id, _hwid, SZ_4K)
|
||||
imx35_imx_i2c_data_entry(0, 1),
|
||||
imx35_imx_i2c_data_entry(1, 2),
|
||||
imx35_imx_i2c_data_entry(2, 3),
|
||||
|
|
@ -72,7 +73,7 @@ const struct imx_imx_i2c_data imx35_imx_i2c_data[] __initconst = {
|
|||
#ifdef CONFIG_SOC_IMX50
|
||||
const struct imx_imx_i2c_data imx50_imx_i2c_data[] __initconst = {
|
||||
#define imx50_imx_i2c_data_entry(_id, _hwid) \
|
||||
imx_imx_i2c_data_entry(MX50, _id, _hwid, SZ_4K)
|
||||
imx_imx_i2c_data_entry(MX50, "imx21-i2c", _id, _hwid, SZ_4K)
|
||||
imx50_imx_i2c_data_entry(0, 1),
|
||||
imx50_imx_i2c_data_entry(1, 2),
|
||||
imx50_imx_i2c_data_entry(2, 3),
|
||||
|
|
@ -82,10 +83,11 @@ const struct imx_imx_i2c_data imx50_imx_i2c_data[] __initconst = {
|
|||
#ifdef CONFIG_SOC_IMX51
|
||||
const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = {
|
||||
#define imx51_imx_i2c_data_entry(_id, _hwid) \
|
||||
imx_imx_i2c_data_entry(MX51, _id, _hwid, SZ_4K)
|
||||
imx_imx_i2c_data_entry(MX51, "imx21-i2c", _id, _hwid, SZ_4K)
|
||||
imx51_imx_i2c_data_entry(0, 1),
|
||||
imx51_imx_i2c_data_entry(1, 2),
|
||||
{
|
||||
.devid = "imx21-i2c",
|
||||
.id = 2,
|
||||
.iobase = MX51_HSI2C_DMA_BASE_ADDR,
|
||||
.iosize = SZ_16K,
|
||||
|
|
@ -97,7 +99,7 @@ const struct imx_imx_i2c_data imx51_imx_i2c_data[] __initconst = {
|
|||
#ifdef CONFIG_SOC_IMX53
|
||||
const struct imx_imx_i2c_data imx53_imx_i2c_data[] __initconst = {
|
||||
#define imx53_imx_i2c_data_entry(_id, _hwid) \
|
||||
imx_imx_i2c_data_entry(MX53, _id, _hwid, SZ_4K)
|
||||
imx_imx_i2c_data_entry(MX53, "imx21-i2c", _id, _hwid, SZ_4K)
|
||||
imx53_imx_i2c_data_entry(0, 1),
|
||||
imx53_imx_i2c_data_entry(1, 2),
|
||||
imx53_imx_i2c_data_entry(2, 3),
|
||||
|
|
@ -120,7 +122,7 @@ struct platform_device *__init imx_add_imx_i2c(
|
|||
},
|
||||
};
|
||||
|
||||
return imx_add_platform_device("imx-i2c", data->id,
|
||||
return imx_add_platform_device(data->devid, data->id,
|
||||
res, ARRAY_SIZE(res),
|
||||
pdata, sizeof(*pdata));
|
||||
}
|
||||
|
|
@ -6,8 +6,8 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_imx_keypad_data_entry_single(soc, _size) \
|
||||
{ \
|
||||
|
|
@ -6,8 +6,8 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_imx_ssi_data_entry(soc, _id, _hwid, _size) \
|
||||
[_id] = { \
|
||||
|
|
@ -6,8 +6,8 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_imx_uart_3irq_data_entry(soc, _id, _hwid, _size) \
|
||||
[_id] = { \
|
||||
|
|
@ -7,8 +7,9 @@
|
|||
* Free Software Foundation.
|
||||
*/
|
||||
#include <asm/sizes.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_imx2_wdt_data_entry_single(soc, _id, _hwid, _size) \
|
||||
{ \
|
||||
|
|
@ -6,8 +6,8 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_imx21_hcd_data_entry_single(soc) \
|
||||
{ \
|
||||
|
|
@ -7,8 +7,8 @@
|
|||
* Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#ifdef CONFIG_SOC_IMX27
|
||||
const struct imx_imx27_coda_data imx27_coda_data __initconst = {
|
||||
|
|
@ -6,8 +6,8 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_imx_udc_data_entry_single(soc, _size) \
|
||||
{ \
|
||||
|
|
@ -7,8 +7,9 @@
|
|||
* Free Software Foundation.
|
||||
*/
|
||||
#include <asm/sizes.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_imxdi_rtc_data_entry_single(soc) \
|
||||
{ \
|
||||
|
|
@ -7,8 +7,9 @@
|
|||
* Free Software Foundation.
|
||||
*/
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_ipu_core_entry_single(soc) \
|
||||
{ \
|
||||
|
|
@ -6,8 +6,8 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_mx1_camera_data_entry_single(soc, _size) \
|
||||
{ \
|
||||
|
|
@ -6,17 +6,19 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_mx2_camera_data_entry_single(soc) \
|
||||
#define imx_mx2_camera_data_entry_single(soc, _devid) \
|
||||
{ \
|
||||
.devid = _devid, \
|
||||
.iobasecsi = soc ## _CSI_BASE_ADDR, \
|
||||
.iosizecsi = SZ_4K, \
|
||||
.irqcsi = soc ## _INT_CSI, \
|
||||
}
|
||||
#define imx_mx2_camera_data_entry_single_emma(soc) \
|
||||
#define imx_mx2_camera_data_entry_single_emma(soc, _devid) \
|
||||
{ \
|
||||
.devid = _devid, \
|
||||
.iobasecsi = soc ## _CSI_BASE_ADDR, \
|
||||
.iosizecsi = SZ_32, \
|
||||
.irqcsi = soc ## _INT_CSI, \
|
||||
|
|
@ -27,12 +29,12 @@
|
|||
|
||||
#ifdef CONFIG_SOC_IMX25
|
||||
const struct imx_mx2_camera_data imx25_mx2_camera_data __initconst =
|
||||
imx_mx2_camera_data_entry_single(MX25);
|
||||
imx_mx2_camera_data_entry_single(MX25, "imx25-camera");
|
||||
#endif /* ifdef CONFIG_SOC_IMX25 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX27
|
||||
const struct imx_mx2_camera_data imx27_mx2_camera_data __initconst =
|
||||
imx_mx2_camera_data_entry_single_emma(MX27);
|
||||
imx_mx2_camera_data_entry_single_emma(MX27, "imx27-camera");
|
||||
#endif /* ifdef CONFIG_SOC_IMX27 */
|
||||
|
||||
struct platform_device *__init imx_add_mx2_camera(
|
||||
|
|
@ -58,7 +60,7 @@ struct platform_device *__init imx_add_mx2_camera(
|
|||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
return imx_add_platform_device_dmamask("mx2-camera", 0,
|
||||
return imx_add_platform_device_dmamask(data->devid, 0,
|
||||
res, data->iobaseemmaprp ? 4 : 2,
|
||||
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
|
||||
}
|
||||
|
|
@ -7,8 +7,9 @@
|
|||
* Free Software Foundation.
|
||||
*/
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_mxc_ehci_data_entry_single(soc, _id, hs) \
|
||||
{ \
|
||||
|
|
@ -7,24 +7,26 @@
|
|||
* Free Software Foundation.
|
||||
*/
|
||||
#include <linux/dma-mapping.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
|
||||
#define imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size) \
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size) \
|
||||
{ \
|
||||
.devid = _devid, \
|
||||
.id = _id, \
|
||||
.iobase = soc ## _SDHC ## _hwid ## _BASE_ADDR, \
|
||||
.iosize = _size, \
|
||||
.irq = soc ## _INT_SDHC ## _hwid, \
|
||||
.dmareq = soc ## _DMA_REQ_SDHC ## _hwid, \
|
||||
}
|
||||
#define imx_mxc_mmc_data_entry(soc, _id, _hwid, _size) \
|
||||
[_id] = imx_mxc_mmc_data_entry_single(soc, _id, _hwid, _size)
|
||||
#define imx_mxc_mmc_data_entry(soc, _devid, _id, _hwid, _size) \
|
||||
[_id] = imx_mxc_mmc_data_entry_single(soc, _devid, _id, _hwid, _size)
|
||||
|
||||
#ifdef CONFIG_SOC_IMX21
|
||||
const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = {
|
||||
#define imx21_mxc_mmc_data_entry(_id, _hwid) \
|
||||
imx_mxc_mmc_data_entry(MX21, _id, _hwid, SZ_4K)
|
||||
imx_mxc_mmc_data_entry(MX21, "imx21-mmc", _id, _hwid, SZ_4K)
|
||||
imx21_mxc_mmc_data_entry(0, 1),
|
||||
imx21_mxc_mmc_data_entry(1, 2),
|
||||
};
|
||||
|
|
@ -33,7 +35,7 @@ const struct imx_mxc_mmc_data imx21_mxc_mmc_data[] __initconst = {
|
|||
#ifdef CONFIG_SOC_IMX27
|
||||
const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = {
|
||||
#define imx27_mxc_mmc_data_entry(_id, _hwid) \
|
||||
imx_mxc_mmc_data_entry(MX27, _id, _hwid, SZ_4K)
|
||||
imx_mxc_mmc_data_entry(MX27, "imx21-mmc", _id, _hwid, SZ_4K)
|
||||
imx27_mxc_mmc_data_entry(0, 1),
|
||||
imx27_mxc_mmc_data_entry(1, 2),
|
||||
};
|
||||
|
|
@ -42,7 +44,7 @@ const struct imx_mxc_mmc_data imx27_mxc_mmc_data[] __initconst = {
|
|||
#ifdef CONFIG_SOC_IMX31
|
||||
const struct imx_mxc_mmc_data imx31_mxc_mmc_data[] __initconst = {
|
||||
#define imx31_mxc_mmc_data_entry(_id, _hwid) \
|
||||
imx_mxc_mmc_data_entry(MX31, _id, _hwid, SZ_16K)
|
||||
imx_mxc_mmc_data_entry(MX31, "imx31-mmc", _id, _hwid, SZ_16K)
|
||||
imx31_mxc_mmc_data_entry(0, 1),
|
||||
imx31_mxc_mmc_data_entry(1, 2),
|
||||
};
|
||||
|
|
@ -67,7 +69,7 @@ struct platform_device *__init imx_add_mxc_mmc(
|
|||
.flags = IORESOURCE_DMA,
|
||||
},
|
||||
};
|
||||
return imx_add_platform_device_dmamask("mxc-mmc", data->id,
|
||||
return imx_add_platform_device_dmamask(data->devid, data->id,
|
||||
res, ARRAY_SIZE(res),
|
||||
pdata, sizeof(*pdata), DMA_BIT_MASK(32));
|
||||
}
|
||||
|
|
@ -7,18 +7,21 @@
|
|||
* Free Software Foundation.
|
||||
*/
|
||||
#include <asm/sizes.h>
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
|
||||
#define imx_mxc_nand_data_entry_single(soc, _size) \
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_mxc_nand_data_entry_single(soc, _devid, _size) \
|
||||
{ \
|
||||
.devid = _devid, \
|
||||
.iobase = soc ## _NFC_BASE_ADDR, \
|
||||
.iosize = _size, \
|
||||
.irq = soc ## _INT_NFC \
|
||||
}
|
||||
|
||||
#define imx_mxc_nandv3_data_entry_single(soc, _size) \
|
||||
#define imx_mxc_nandv3_data_entry_single(soc, _devid, _size) \
|
||||
{ \
|
||||
.devid = _devid, \
|
||||
.id = -1, \
|
||||
.iobase = soc ## _NFC_BASE_ADDR, \
|
||||
.iosize = _size, \
|
||||
|
|
@ -28,32 +31,32 @@
|
|||
|
||||
#ifdef CONFIG_SOC_IMX21
|
||||
const struct imx_mxc_nand_data imx21_mxc_nand_data __initconst =
|
||||
imx_mxc_nand_data_entry_single(MX21, SZ_4K);
|
||||
imx_mxc_nand_data_entry_single(MX21, "imx21-nand", SZ_4K);
|
||||
#endif /* ifdef CONFIG_SOC_IMX21 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX25
|
||||
const struct imx_mxc_nand_data imx25_mxc_nand_data __initconst =
|
||||
imx_mxc_nand_data_entry_single(MX25, SZ_8K);
|
||||
imx_mxc_nand_data_entry_single(MX25, "imx25-nand", SZ_8K);
|
||||
#endif /* ifdef CONFIG_SOC_IMX25 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX27
|
||||
const struct imx_mxc_nand_data imx27_mxc_nand_data __initconst =
|
||||
imx_mxc_nand_data_entry_single(MX27, SZ_4K);
|
||||
imx_mxc_nand_data_entry_single(MX27, "imx27-nand", SZ_4K);
|
||||
#endif /* ifdef CONFIG_SOC_IMX27 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX31
|
||||
const struct imx_mxc_nand_data imx31_mxc_nand_data __initconst =
|
||||
imx_mxc_nand_data_entry_single(MX31, SZ_4K);
|
||||
imx_mxc_nand_data_entry_single(MX31, "imx27-nand", SZ_4K);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SOC_IMX35
|
||||
const struct imx_mxc_nand_data imx35_mxc_nand_data __initconst =
|
||||
imx_mxc_nand_data_entry_single(MX35, SZ_8K);
|
||||
imx_mxc_nand_data_entry_single(MX35, "imx25-nand", SZ_8K);
|
||||
#endif
|
||||
|
||||
#ifdef CONFIG_SOC_IMX51
|
||||
const struct imx_mxc_nand_data imx51_mxc_nand_data __initconst =
|
||||
imx_mxc_nandv3_data_entry_single(MX51, SZ_16K);
|
||||
imx_mxc_nandv3_data_entry_single(MX51, "imx51-nand", SZ_16K);
|
||||
#endif
|
||||
|
||||
struct platform_device *__init imx_add_mxc_nand(
|
||||
|
|
@ -76,7 +79,7 @@ struct platform_device *__init imx_add_mxc_nand(
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
};
|
||||
return imx_add_platform_device("mxc_nand", data->id,
|
||||
return imx_add_platform_device(data->devid, data->id,
|
||||
res, ARRAY_SIZE(res) - !data->axibase,
|
||||
pdata, sizeof(*pdata));
|
||||
}
|
||||
|
|
@ -6,8 +6,8 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_mxc_pwm_data_entry_single(soc, _id, _hwid, _size) \
|
||||
{ \
|
||||
|
|
@ -6,8 +6,8 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
struct imx_mxc_rnga_data {
|
||||
resource_size_t iobase;
|
||||
|
|
@ -6,23 +6,24 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_mxc_rtc_data_entry_single(soc) \
|
||||
#define imx_mxc_rtc_data_entry_single(soc, _devid) \
|
||||
{ \
|
||||
.devid = _devid, \
|
||||
.iobase = soc ## _RTC_BASE_ADDR, \
|
||||
.irq = soc ## _INT_RTC, \
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SOC_IMX31
|
||||
const struct imx_mxc_rtc_data imx31_mxc_rtc_data __initconst =
|
||||
imx_mxc_rtc_data_entry_single(MX31);
|
||||
imx_mxc_rtc_data_entry_single(MX31, "imx21-rtc");
|
||||
#endif /* ifdef CONFIG_SOC_IMX31 */
|
||||
|
||||
#ifdef CONFIG_SOC_IMX35
|
||||
const struct imx_mxc_rtc_data imx35_mxc_rtc_data __initconst =
|
||||
imx_mxc_rtc_data_entry_single(MX35);
|
||||
imx_mxc_rtc_data_entry_single(MX35, "imx21-rtc");
|
||||
#endif /* ifdef CONFIG_SOC_IMX35 */
|
||||
|
||||
struct platform_device *__init imx_add_mxc_rtc(
|
||||
|
|
@ -40,6 +41,6 @@ struct platform_device *__init imx_add_mxc_rtc(
|
|||
},
|
||||
};
|
||||
|
||||
return imx_add_platform_device("mxc_rtc", -1,
|
||||
return imx_add_platform_device(data->devid, -1,
|
||||
res, ARRAY_SIZE(res), NULL, 0);
|
||||
}
|
||||
|
|
@ -6,8 +6,8 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_mxc_w1_data_entry_single(soc) \
|
||||
{ \
|
||||
|
|
@ -3,8 +3,8 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_pata_imx_data_entry_single(soc, _size) \
|
||||
{ \
|
||||
|
|
@ -6,10 +6,11 @@
|
|||
* Free Software Foundation.
|
||||
*/
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include <linux/platform_data/mmc-esdhc-imx.h>
|
||||
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_sdhci_esdhc_imx_data_entry_single(soc, _devid, _id, hwid) \
|
||||
{ \
|
||||
.devid = _devid, \
|
||||
|
|
@ -6,8 +6,8 @@
|
|||
* the terms of the GNU General Public License version 2 as published by the
|
||||
* Free Software Foundation.
|
||||
*/
|
||||
#include <mach/hardware.h>
|
||||
#include <mach/devices-common.h>
|
||||
#include "../hardware.h"
|
||||
#include "devices-common.h"
|
||||
|
||||
#define imx_spi_imx_data_entry_single(soc, type, _devid, _id, hwid, _size) \
|
||||
{ \
|
||||
|
|
@ -15,10 +15,10 @@
|
|||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <linux/platform_data/usb-ehci-mxc.h>
|
||||
|
||||
#include "hardware.h"
|
||||
|
||||
#define USBCTRL_OTGBASE_OFFSET 0x600
|
||||
|
||||
#define MX25_OTG_SIC_SHIFT 29
|
||||
|
|
|
|||
|
|
@ -15,10 +15,10 @@
|
|||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <linux/platform_data/usb-ehci-mxc.h>
|
||||
|
||||
#include "hardware.h"
|
||||
|
||||
#define USBCTRL_OTGBASE_OFFSET 0x600
|
||||
|
||||
#define MX27_OTG_SIC_SHIFT 29
|
||||
|
|
|
|||
|
|
@ -15,10 +15,10 @@
|
|||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <linux/platform_data/usb-ehci-mxc.h>
|
||||
|
||||
#include "hardware.h"
|
||||
|
||||
#define USBCTRL_OTGBASE_OFFSET 0x600
|
||||
|
||||
#define MX31_OTG_SIC_SHIFT 29
|
||||
|
|
|
|||
|
|
@ -15,10 +15,10 @@
|
|||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <linux/platform_data/usb-ehci-mxc.h>
|
||||
|
||||
#include "hardware.h"
|
||||
|
||||
#define USBCTRL_OTGBASE_OFFSET 0x600
|
||||
|
||||
#define MX35_OTG_SIC_SHIFT 29
|
||||
|
|
|
|||
|
|
@ -15,10 +15,10 @@
|
|||
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <linux/platform_data/usb-ehci-mxc.h>
|
||||
|
||||
#include "hardware.h"
|
||||
|
||||
#define MXC_OTG_OFFSET 0
|
||||
#define MXC_H1_OFFSET 0x200
|
||||
#define MXC_H2_OFFSET 0x400
|
||||
|
|
|
|||
|
|
@ -51,10 +51,10 @@
|
|||
#include <linux/clockchips.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/err.h>
|
||||
|
||||
#include <mach/hardware.h>
|
||||
#include <asm/mach/time.h>
|
||||
#include <mach/common.h>
|
||||
|
||||
#include "common.h"
|
||||
#include "hardware.h"
|
||||
|
||||
static struct clock_event_device clockevent_epit;
|
||||
static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED;
|
||||
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Reference in New Issue