mirror of https://gitee.com/openkylin/linux.git
drm/msm/dpu: Refactor resource manager
Track hardware resource objects in arrays rather than a list and remove the resource manager's iterator idiom. Separate the mapping of hardware resources to an encoder ID into a different array. Use an implicit mapping between the hardware blocks' ids, which are 1-based, and array indices in these arrays to replace iteration with index lookups in several places. Signed-off-by: Drew Davenport <ddavenport@chromium.org> [squash in minor compiler warning fixes] Signed-off-by: Rob Clark <robdclark@chromium.org>
This commit is contained in:
parent
b954fa6baa
commit
bb00a452d6
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@ -12,8 +12,12 @@
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#include "dpu_encoder.h"
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#include "dpu_trace.h"
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#define RESERVED_BY_OTHER(h, r) \
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((h)->enc_id && (h)->enc_id != r)
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static inline bool reserved_by_other(uint32_t *res_map, int idx,
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uint32_t enc_id)
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{
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return res_map[idx] && res_map[idx] != enc_id;
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}
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/**
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* struct dpu_rm_requirements - Reservation requirements parameter bundle
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@ -25,126 +29,40 @@ struct dpu_rm_requirements {
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struct dpu_encoder_hw_resources hw_res;
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};
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/**
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* struct dpu_rm_hw_blk - hardware block tracking list member
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* @list: List head for list of all hardware blocks tracking items
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* @id: Hardware ID number, within it's own space, ie. LM_X
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* @enc_id: Encoder id to which this blk is binded
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* @hw: Pointer to the hardware register access object for this block
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*/
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struct dpu_rm_hw_blk {
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struct list_head list;
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uint32_t id;
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uint32_t enc_id;
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struct dpu_hw_blk *hw;
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};
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/**
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* struct dpu_rm_hw_iter - iterator for use with dpu_rm
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* @hw: dpu_hw object requested, or NULL on failure
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* @blk: dpu_rm internal block representation. Clients ignore. Used as iterator.
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* @enc_id: DRM ID of Encoder client wishes to search for, or 0 for Any Encoder
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* @type: Hardware Block Type client wishes to search for.
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*/
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struct dpu_rm_hw_iter {
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void *hw;
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struct dpu_rm_hw_blk *blk;
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uint32_t enc_id;
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enum dpu_hw_blk_type type;
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};
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static void dpu_rm_init_hw_iter(
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struct dpu_rm_hw_iter *iter,
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uint32_t enc_id,
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enum dpu_hw_blk_type type)
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{
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memset(iter, 0, sizeof(*iter));
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iter->enc_id = enc_id;
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iter->type = type;
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}
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static bool _dpu_rm_get_hw_locked(struct dpu_rm *rm, struct dpu_rm_hw_iter *i)
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{
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struct list_head *blk_list;
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if (!rm || !i || i->type >= DPU_HW_BLK_MAX) {
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DPU_ERROR("invalid rm\n");
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return false;
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}
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i->hw = NULL;
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blk_list = &rm->hw_blks[i->type];
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if (i->blk && (&i->blk->list == blk_list)) {
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DPU_DEBUG("attempt resume iteration past last\n");
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return false;
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}
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i->blk = list_prepare_entry(i->blk, blk_list, list);
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list_for_each_entry_continue(i->blk, blk_list, list) {
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if (i->enc_id == i->blk->enc_id) {
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i->hw = i->blk->hw;
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DPU_DEBUG("found type %d id %d for enc %d\n",
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i->type, i->blk->id, i->enc_id);
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return true;
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}
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}
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DPU_DEBUG("no match, type %d for enc %d\n", i->type, i->enc_id);
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return false;
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}
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static bool dpu_rm_get_hw(struct dpu_rm *rm, struct dpu_rm_hw_iter *i)
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{
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bool ret;
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mutex_lock(&rm->rm_lock);
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ret = _dpu_rm_get_hw_locked(rm, i);
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mutex_unlock(&rm->rm_lock);
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return ret;
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}
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static void _dpu_rm_hw_destroy(enum dpu_hw_blk_type type, void *hw)
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{
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switch (type) {
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case DPU_HW_BLK_LM:
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dpu_hw_lm_destroy(hw);
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break;
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case DPU_HW_BLK_CTL:
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dpu_hw_ctl_destroy(hw);
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break;
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case DPU_HW_BLK_PINGPONG:
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dpu_hw_pingpong_destroy(hw);
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break;
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case DPU_HW_BLK_INTF:
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dpu_hw_intf_destroy(hw);
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break;
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case DPU_HW_BLK_SSPP:
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/* SSPPs are not managed by the resource manager */
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case DPU_HW_BLK_TOP:
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/* Top is a singleton, not managed in hw_blks list */
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case DPU_HW_BLK_MAX:
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default:
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DPU_ERROR("unsupported block type %d\n", type);
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break;
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}
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}
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int dpu_rm_destroy(struct dpu_rm *rm)
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{
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struct dpu_rm_hw_blk *hw_cur, *hw_nxt;
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enum dpu_hw_blk_type type;
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int i;
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for (type = 0; type < DPU_HW_BLK_MAX; type++) {
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list_for_each_entry_safe(hw_cur, hw_nxt, &rm->hw_blks[type],
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list) {
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list_del(&hw_cur->list);
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_dpu_rm_hw_destroy(type, hw_cur->hw);
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kfree(hw_cur);
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for (i = 0; i < ARRAY_SIZE(rm->pingpong_blks); i++) {
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struct dpu_hw_pingpong *hw;
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if (rm->pingpong_blks[i]) {
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hw = to_dpu_hw_pingpong(rm->pingpong_blks[i]);
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dpu_hw_pingpong_destroy(hw);
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}
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}
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for (i = 0; i < ARRAY_SIZE(rm->mixer_blks); i++) {
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struct dpu_hw_mixer *hw;
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if (rm->mixer_blks[i]) {
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hw = to_dpu_hw_mixer(rm->mixer_blks[i]);
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dpu_hw_lm_destroy(hw);
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}
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}
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for (i = 0; i < ARRAY_SIZE(rm->ctl_blks); i++) {
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struct dpu_hw_ctl *hw;
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if (rm->ctl_blks[i]) {
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hw = to_dpu_hw_ctl(rm->ctl_blks[i]);
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dpu_hw_ctl_destroy(hw);
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}
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}
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for (i = 0; i < ARRAY_SIZE(rm->intf_blks); i++) {
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struct dpu_hw_intf *hw;
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if (rm->intf_blks[i]) {
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hw = to_dpu_hw_intf(rm->intf_blks[i]);
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dpu_hw_intf_destroy(hw);
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}
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}
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return 0;
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}
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static int _dpu_rm_hw_blk_create(
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struct dpu_rm *rm,
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const struct dpu_mdss_cfg *cat,
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void __iomem *mmio,
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enum dpu_hw_blk_type type,
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uint32_t id)
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{
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struct dpu_rm_hw_blk *blk;
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void *hw;
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switch (type) {
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case DPU_HW_BLK_LM:
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hw = dpu_hw_lm_init(id, mmio, cat);
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break;
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case DPU_HW_BLK_CTL:
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hw = dpu_hw_ctl_init(id, mmio, cat);
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break;
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case DPU_HW_BLK_PINGPONG:
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hw = dpu_hw_pingpong_init(id, mmio, cat);
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break;
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case DPU_HW_BLK_INTF:
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hw = dpu_hw_intf_init(id, mmio, cat);
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break;
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case DPU_HW_BLK_SSPP:
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/* SSPPs are not managed by the resource manager */
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case DPU_HW_BLK_TOP:
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/* Top is a singleton, not managed in hw_blks list */
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case DPU_HW_BLK_MAX:
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default:
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DPU_ERROR("unsupported block type %d\n", type);
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return -EINVAL;
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}
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if (IS_ERR_OR_NULL(hw)) {
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DPU_ERROR("failed hw object creation: type %d, err %ld\n",
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type, PTR_ERR(hw));
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return -EFAULT;
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}
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blk = kzalloc(sizeof(*blk), GFP_KERNEL);
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if (!blk) {
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_dpu_rm_hw_destroy(type, hw);
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return -ENOMEM;
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}
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blk->id = id;
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blk->hw = hw;
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blk->enc_id = 0;
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list_add_tail(&blk->list, &rm->hw_blks[type]);
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return 0;
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}
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int dpu_rm_init(struct dpu_rm *rm,
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struct dpu_mdss_cfg *cat,
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void __iomem *mmio)
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{
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int rc, i;
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enum dpu_hw_blk_type type;
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if (!rm || !cat || !mmio) {
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DPU_ERROR("invalid kms\n");
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mutex_init(&rm->rm_lock);
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for (type = 0; type < DPU_HW_BLK_MAX; type++)
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INIT_LIST_HEAD(&rm->hw_blks[type]);
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/* Interrogate HW catalog and create tracking items for hw blocks */
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for (i = 0; i < cat->mixer_count; i++) {
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struct dpu_hw_mixer *hw;
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const struct dpu_lm_cfg *lm = &cat->mixer[i];
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if (lm->pingpong == PINGPONG_MAX) {
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continue;
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}
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rc = _dpu_rm_hw_blk_create(rm, cat, mmio, DPU_HW_BLK_LM,
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cat->mixer[i].id);
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if (rc) {
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DPU_ERROR("failed: lm hw not available\n");
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if (lm->id < LM_0 || lm->id >= LM_MAX) {
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DPU_ERROR("skip mixer %d with invalid id\n", lm->id);
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continue;
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}
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hw = dpu_hw_lm_init(lm->id, mmio, cat);
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if (IS_ERR_OR_NULL(hw)) {
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rc = PTR_ERR(hw);
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DPU_ERROR("failed lm object creation: err %d\n", rc);
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goto fail;
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}
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rm->mixer_blks[lm->id - LM_0] = &hw->base;
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if (!rm->lm_max_width) {
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rm->lm_max_width = lm->sblk->maxwidth;
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}
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for (i = 0; i < cat->pingpong_count; i++) {
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rc = _dpu_rm_hw_blk_create(rm, cat, mmio, DPU_HW_BLK_PINGPONG,
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cat->pingpong[i].id);
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if (rc) {
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DPU_ERROR("failed: pp hw not available\n");
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struct dpu_hw_pingpong *hw;
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const struct dpu_pingpong_cfg *pp = &cat->pingpong[i];
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if (pp->id < PINGPONG_0 || pp->id >= PINGPONG_MAX) {
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DPU_ERROR("skip pingpong %d with invalid id\n", pp->id);
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continue;
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}
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hw = dpu_hw_pingpong_init(pp->id, mmio, cat);
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if (IS_ERR_OR_NULL(hw)) {
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rc = PTR_ERR(hw);
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DPU_ERROR("failed pingpong object creation: err %d\n",
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rc);
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goto fail;
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}
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rm->pingpong_blks[pp->id - PINGPONG_0] = &hw->base;
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}
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for (i = 0; i < cat->intf_count; i++) {
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if (cat->intf[i].type == INTF_NONE) {
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struct dpu_hw_intf *hw;
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const struct dpu_intf_cfg *intf = &cat->intf[i];
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if (intf->type == INTF_NONE) {
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DPU_DEBUG("skip intf %d with type none\n", i);
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continue;
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}
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rc = _dpu_rm_hw_blk_create(rm, cat, mmio, DPU_HW_BLK_INTF,
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cat->intf[i].id);
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if (rc) {
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DPU_ERROR("failed: intf hw not available\n");
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if (intf->id < INTF_0 || intf->id >= INTF_MAX) {
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DPU_ERROR("skip intf %d with invalid id\n", intf->id);
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continue;
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}
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hw = dpu_hw_intf_init(intf->id, mmio, cat);
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if (IS_ERR_OR_NULL(hw)) {
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rc = PTR_ERR(hw);
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DPU_ERROR("failed intf object creation: err %d\n", rc);
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goto fail;
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}
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rm->intf_blks[intf->id - INTF_0] = &hw->base;
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}
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for (i = 0; i < cat->ctl_count; i++) {
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rc = _dpu_rm_hw_blk_create(rm, cat, mmio, DPU_HW_BLK_CTL,
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cat->ctl[i].id);
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if (rc) {
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DPU_ERROR("failed: ctl hw not available\n");
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struct dpu_hw_ctl *hw;
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const struct dpu_ctl_cfg *ctl = &cat->ctl[i];
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if (ctl->id < CTL_0 || ctl->id >= CTL_MAX) {
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DPU_ERROR("skip ctl %d with invalid id\n", ctl->id);
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continue;
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}
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hw = dpu_hw_ctl_init(ctl->id, mmio, cat);
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if (IS_ERR_OR_NULL(hw)) {
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rc = PTR_ERR(hw);
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DPU_ERROR("failed ctl object creation: err %d\n", rc);
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goto fail;
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}
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rm->ctl_blks[ctl->id - CTL_0] = &hw->base;
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}
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return 0;
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@ -292,7 +183,7 @@ int dpu_rm_init(struct dpu_rm *rm,
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fail:
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dpu_rm_destroy(rm);
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return rc;
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return rc ? rc : -EFAULT;
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}
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static bool _dpu_rm_needs_split_display(const struct msm_display_topology *top)
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@ -300,72 +191,69 @@ static bool _dpu_rm_needs_split_display(const struct msm_display_topology *top)
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return top->num_intf > 1;
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}
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/**
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* _dpu_rm_check_lm_peer - check if a mixer is a peer of the primary
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* @rm: dpu resource manager handle
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* @primary_idx: index of primary mixer in rm->mixer_blks[]
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* @peer_idx: index of other mixer in rm->mixer_blks[]
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* @Return: true if rm->mixer_blks[peer_idx] is a peer of
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* rm->mixer_blks[primary_idx]
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*/
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static bool _dpu_rm_check_lm_peer(struct dpu_rm *rm, int primary_idx,
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int peer_idx)
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{
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const struct dpu_lm_cfg *prim_lm_cfg;
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const struct dpu_lm_cfg *peer_cfg;
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prim_lm_cfg = to_dpu_hw_mixer(rm->mixer_blks[primary_idx])->cap;
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peer_cfg = to_dpu_hw_mixer(rm->mixer_blks[peer_idx])->cap;
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if (!test_bit(peer_cfg->id, &prim_lm_cfg->lm_pair_mask)) {
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DPU_DEBUG("lm %d not peer of lm %d\n", peer_cfg->id,
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peer_cfg->id);
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return false;
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}
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return true;
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}
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/**
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* _dpu_rm_check_lm_and_get_connected_blks - check if proposed layer mixer meets
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* proposed use case requirements, incl. hardwired dependent blocks like
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* pingpong
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* @rm: dpu resource manager handle
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* @enc_id: encoder id requesting for allocation
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* @lm: proposed layer mixer, function checks if lm, and all other hardwired
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* blocks connected to the lm (pp) is available and appropriate
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* @pp: output parameter, pingpong block attached to the layer mixer.
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* NULL if pp was not available, or not matching requirements.
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* @primary_lm: if non-null, this function check if lm is compatible primary_lm
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* as well as satisfying all other requirements
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* @lm_idx: index of proposed layer mixer in rm->mixer_blks[], function checks
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* if lm, and all other hardwired blocks connected to the lm (pp) is
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* available and appropriate
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* @pp_idx: output parameter, index of pingpong block attached to the layer
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* mixer in rm->pongpong_blks[].
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* @Return: true if lm matches all requirements, false otherwise
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*/
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static bool _dpu_rm_check_lm_and_get_connected_blks(
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struct dpu_rm *rm,
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uint32_t enc_id,
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struct dpu_rm_hw_blk *lm,
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struct dpu_rm_hw_blk **pp,
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struct dpu_rm_hw_blk *primary_lm)
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static bool _dpu_rm_check_lm_and_get_connected_blks(struct dpu_rm *rm,
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uint32_t enc_id, int lm_idx, int *pp_idx)
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{
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const struct dpu_lm_cfg *lm_cfg = to_dpu_hw_mixer(lm->hw)->cap;
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struct dpu_rm_hw_iter iter;
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*pp = NULL;
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DPU_DEBUG("check lm %d pp %d\n",
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lm_cfg->id, lm_cfg->pingpong);
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/* Check if this layer mixer is a peer of the proposed primary LM */
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if (primary_lm) {
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const struct dpu_lm_cfg *prim_lm_cfg =
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to_dpu_hw_mixer(primary_lm->hw)->cap;
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if (!test_bit(lm_cfg->id, &prim_lm_cfg->lm_pair_mask)) {
|
||||
DPU_DEBUG("lm %d not peer of lm %d\n", lm_cfg->id,
|
||||
prim_lm_cfg->id);
|
||||
return false;
|
||||
}
|
||||
}
|
||||
const struct dpu_lm_cfg *lm_cfg;
|
||||
int idx;
|
||||
|
||||
/* Already reserved? */
|
||||
if (RESERVED_BY_OTHER(lm, enc_id)) {
|
||||
DPU_DEBUG("lm %d already reserved\n", lm_cfg->id);
|
||||
if (reserved_by_other(rm->mixer_to_enc_id, lm_idx, enc_id)) {
|
||||
DPU_DEBUG("lm %d already reserved\n", lm_idx + LM_0);
|
||||
return false;
|
||||
}
|
||||
|
||||
dpu_rm_init_hw_iter(&iter, 0, DPU_HW_BLK_PINGPONG);
|
||||
while (_dpu_rm_get_hw_locked(rm, &iter)) {
|
||||
if (iter.blk->id == lm_cfg->pingpong) {
|
||||
*pp = iter.blk;
|
||||
break;
|
||||
}
|
||||
}
|
||||
|
||||
if (!*pp) {
|
||||
lm_cfg = to_dpu_hw_mixer(rm->mixer_blks[lm_idx])->cap;
|
||||
idx = lm_cfg->pingpong - PINGPONG_0;
|
||||
if (idx < 0 || idx >= ARRAY_SIZE(rm->pingpong_blks)) {
|
||||
DPU_ERROR("failed to get pp on lm %d\n", lm_cfg->pingpong);
|
||||
return false;
|
||||
}
|
||||
|
||||
if (RESERVED_BY_OTHER(*pp, enc_id)) {
|
||||
DPU_DEBUG("lm %d pp %d already reserved\n", lm->id,
|
||||
(*pp)->id);
|
||||
if (reserved_by_other(rm->pingpong_to_enc_id, idx, enc_id)) {
|
||||
DPU_DEBUG("lm %d pp %d already reserved\n", lm_cfg->id,
|
||||
lm_cfg->pingpong);
|
||||
return false;
|
||||
}
|
||||
|
||||
*pp_idx = idx;
|
||||
return true;
|
||||
}
|
||||
|
||||
|
@ -373,11 +261,9 @@ static int _dpu_rm_reserve_lms(struct dpu_rm *rm, uint32_t enc_id,
|
|||
struct dpu_rm_requirements *reqs)
|
||||
|
||||
{
|
||||
struct dpu_rm_hw_blk *lm[MAX_BLOCKS];
|
||||
struct dpu_rm_hw_blk *pp[MAX_BLOCKS];
|
||||
struct dpu_rm_hw_iter iter_i, iter_j;
|
||||
int lm_count = 0;
|
||||
int i, rc = 0;
|
||||
int lm_idx[MAX_BLOCKS];
|
||||
int pp_idx[MAX_BLOCKS];
|
||||
int i, j, lm_count = 0;
|
||||
|
||||
if (!reqs->topology.num_lm) {
|
||||
DPU_ERROR("invalid number of lm: %d\n", reqs->topology.num_lm);
|
||||
|
@ -385,36 +271,39 @@ static int _dpu_rm_reserve_lms(struct dpu_rm *rm, uint32_t enc_id,
|
|||
}
|
||||
|
||||
/* Find a primary mixer */
|
||||
dpu_rm_init_hw_iter(&iter_i, 0, DPU_HW_BLK_LM);
|
||||
while (lm_count != reqs->topology.num_lm &&
|
||||
_dpu_rm_get_hw_locked(rm, &iter_i)) {
|
||||
memset(&lm, 0, sizeof(lm));
|
||||
memset(&pp, 0, sizeof(pp));
|
||||
for (i = 0; i < ARRAY_SIZE(rm->mixer_blks) &&
|
||||
lm_count < reqs->topology.num_lm; i++) {
|
||||
if (!rm->mixer_blks[i])
|
||||
continue;
|
||||
|
||||
lm_count = 0;
|
||||
lm[lm_count] = iter_i.blk;
|
||||
lm_idx[lm_count] = i;
|
||||
|
||||
if (!_dpu_rm_check_lm_and_get_connected_blks(
|
||||
rm, enc_id, lm[lm_count],
|
||||
&pp[lm_count], NULL))
|
||||
rm, enc_id, i, &pp_idx[lm_count])) {
|
||||
continue;
|
||||
}
|
||||
|
||||
++lm_count;
|
||||
|
||||
/* Valid primary mixer found, find matching peers */
|
||||
dpu_rm_init_hw_iter(&iter_j, 0, DPU_HW_BLK_LM);
|
||||
|
||||
while (lm_count != reqs->topology.num_lm &&
|
||||
_dpu_rm_get_hw_locked(rm, &iter_j)) {
|
||||
if (iter_i.blk == iter_j.blk)
|
||||
for (j = i + 1; j < ARRAY_SIZE(rm->mixer_blks) &&
|
||||
lm_count < reqs->topology.num_lm; j++) {
|
||||
if (!rm->mixer_blks[j])
|
||||
continue;
|
||||
|
||||
if (!_dpu_rm_check_lm_peer(rm, i, j)) {
|
||||
DPU_DEBUG("lm %d not peer of lm %d\n", LM_0 + j,
|
||||
LM_0 + i);
|
||||
continue;
|
||||
}
|
||||
|
||||
if (!_dpu_rm_check_lm_and_get_connected_blks(
|
||||
rm, enc_id, iter_j.blk,
|
||||
&pp[lm_count], iter_i.blk))
|
||||
rm, enc_id, j, &pp_idx[lm_count])) {
|
||||
continue;
|
||||
}
|
||||
|
||||
lm[lm_count] = iter_j.blk;
|
||||
lm_idx[lm_count] = j;
|
||||
++lm_count;
|
||||
}
|
||||
}
|
||||
|
@ -424,17 +313,15 @@ static int _dpu_rm_reserve_lms(struct dpu_rm *rm, uint32_t enc_id,
|
|||
return -ENAVAIL;
|
||||
}
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(lm); i++) {
|
||||
if (!lm[i])
|
||||
break;
|
||||
for (i = 0; i < lm_count; i++) {
|
||||
rm->mixer_to_enc_id[lm_idx[i]] = enc_id;
|
||||
rm->pingpong_to_enc_id[pp_idx[i]] = enc_id;
|
||||
|
||||
lm[i]->enc_id = enc_id;
|
||||
pp[i]->enc_id = enc_id;
|
||||
|
||||
trace_dpu_rm_reserve_lms(lm[i]->id, enc_id, pp[i]->id);
|
||||
trace_dpu_rm_reserve_lms(lm_idx[i] + LM_0, enc_id,
|
||||
pp_idx[i] + PINGPONG_0);
|
||||
}
|
||||
|
||||
return rc;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int _dpu_rm_reserve_ctls(
|
||||
|
@ -442,47 +329,48 @@ static int _dpu_rm_reserve_ctls(
|
|||
uint32_t enc_id,
|
||||
const struct msm_display_topology *top)
|
||||
{
|
||||
struct dpu_rm_hw_blk *ctls[MAX_BLOCKS];
|
||||
struct dpu_rm_hw_iter iter;
|
||||
int i = 0, num_ctls = 0;
|
||||
bool needs_split_display = false;
|
||||
|
||||
memset(&ctls, 0, sizeof(ctls));
|
||||
int ctl_idx[MAX_BLOCKS];
|
||||
int i = 0, j, num_ctls;
|
||||
bool needs_split_display;
|
||||
|
||||
/* each hw_intf needs its own hw_ctrl to program its control path */
|
||||
num_ctls = top->num_intf;
|
||||
|
||||
needs_split_display = _dpu_rm_needs_split_display(top);
|
||||
|
||||
dpu_rm_init_hw_iter(&iter, 0, DPU_HW_BLK_CTL);
|
||||
while (_dpu_rm_get_hw_locked(rm, &iter)) {
|
||||
const struct dpu_hw_ctl *ctl = to_dpu_hw_ctl(iter.blk->hw);
|
||||
unsigned long features = ctl->caps->features;
|
||||
for (j = 0; j < ARRAY_SIZE(rm->ctl_blks); j++) {
|
||||
const struct dpu_hw_ctl *ctl;
|
||||
unsigned long features;
|
||||
bool has_split_display;
|
||||
|
||||
if (RESERVED_BY_OTHER(iter.blk, enc_id))
|
||||
if (!rm->ctl_blks[j])
|
||||
continue;
|
||||
if (reserved_by_other(rm->ctl_to_enc_id, j, enc_id))
|
||||
continue;
|
||||
|
||||
ctl = to_dpu_hw_ctl(rm->ctl_blks[j]);
|
||||
features = ctl->caps->features;
|
||||
has_split_display = BIT(DPU_CTL_SPLIT_DISPLAY) & features;
|
||||
|
||||
DPU_DEBUG("ctl %d caps 0x%lX\n", iter.blk->id, features);
|
||||
DPU_DEBUG("ctl %d caps 0x%lX\n", rm->ctl_blks[j]->id, features);
|
||||
|
||||
if (needs_split_display != has_split_display)
|
||||
continue;
|
||||
|
||||
ctls[i] = iter.blk;
|
||||
DPU_DEBUG("ctl %d match\n", iter.blk->id);
|
||||
ctl_idx[i] = j;
|
||||
DPU_DEBUG("ctl %d match\n", j + CTL_0);
|
||||
|
||||
if (++i == num_ctls)
|
||||
break;
|
||||
|
||||
}
|
||||
|
||||
if (i != num_ctls)
|
||||
return -ENAVAIL;
|
||||
|
||||
for (i = 0; i < ARRAY_SIZE(ctls) && i < num_ctls; i++) {
|
||||
ctls[i]->enc_id = enc_id;
|
||||
trace_dpu_rm_reserve_ctls(ctls[i]->id, enc_id);
|
||||
for (i = 0; i < ARRAY_SIZE(ctl_idx) && i < num_ctls; i++) {
|
||||
rm->ctl_to_enc_id[ctl_idx[i]] = enc_id;
|
||||
trace_dpu_rm_reserve_ctls(i + CTL_0, enc_id);
|
||||
}
|
||||
|
||||
return 0;
|
||||
|
@ -493,32 +381,20 @@ static int _dpu_rm_reserve_intf(
|
|||
uint32_t enc_id,
|
||||
uint32_t id)
|
||||
{
|
||||
struct dpu_rm_hw_iter iter;
|
||||
int ret = 0;
|
||||
int idx = id - INTF_0;
|
||||
|
||||
/* Find the block entry in the rm, and note the reservation */
|
||||
dpu_rm_init_hw_iter(&iter, 0, DPU_HW_BLK_INTF);
|
||||
while (_dpu_rm_get_hw_locked(rm, &iter)) {
|
||||
if (iter.blk->id != id)
|
||||
continue;
|
||||
|
||||
if (RESERVED_BY_OTHER(iter.blk, enc_id)) {
|
||||
DPU_ERROR("intf id %d already reserved\n", id);
|
||||
return -ENAVAIL;
|
||||
}
|
||||
|
||||
iter.blk->enc_id = enc_id;
|
||||
trace_dpu_rm_reserve_intf(iter.blk->id, enc_id);
|
||||
break;
|
||||
}
|
||||
|
||||
/* Shouldn't happen since intfs are fixed at probe */
|
||||
if (!iter.hw) {
|
||||
if (!rm->intf_blks[idx]) {
|
||||
DPU_ERROR("couldn't find intf id %d\n", id);
|
||||
return -EINVAL;
|
||||
}
|
||||
|
||||
return ret;
|
||||
if (reserved_by_other(rm->intf_to_enc_id, idx, enc_id)) {
|
||||
DPU_ERROR("intf id %d already reserved\n", id);
|
||||
return -ENAVAIL;
|
||||
}
|
||||
|
||||
rm->intf_to_enc_id[idx] = enc_id;
|
||||
return 0;
|
||||
}
|
||||
|
||||
static int _dpu_rm_reserve_intf_related_hw(
|
||||
|
@ -583,20 +459,27 @@ static int _dpu_rm_populate_requirements(
|
|||
return 0;
|
||||
}
|
||||
|
||||
static void _dpu_rm_clear_mapping(uint32_t *res_mapping, int cnt,
|
||||
uint32_t enc_id)
|
||||
{
|
||||
int i;
|
||||
|
||||
for (i = 0; i < cnt; i++) {
|
||||
if (res_mapping[i] == enc_id)
|
||||
res_mapping[i] = 0;
|
||||
}
|
||||
}
|
||||
|
||||
static void _dpu_rm_release_reservation(struct dpu_rm *rm, uint32_t enc_id)
|
||||
{
|
||||
struct dpu_rm_hw_blk *blk;
|
||||
enum dpu_hw_blk_type type;
|
||||
|
||||
for (type = 0; type < DPU_HW_BLK_MAX; type++) {
|
||||
list_for_each_entry(blk, &rm->hw_blks[type], list) {
|
||||
if (blk->enc_id == enc_id) {
|
||||
blk->enc_id = 0;
|
||||
DPU_DEBUG("rel enc %d %d %d\n", enc_id,
|
||||
type, blk->id);
|
||||
}
|
||||
}
|
||||
}
|
||||
_dpu_rm_clear_mapping(rm->pingpong_to_enc_id,
|
||||
ARRAY_SIZE(rm->pingpong_to_enc_id), enc_id);
|
||||
_dpu_rm_clear_mapping(rm->mixer_to_enc_id,
|
||||
ARRAY_SIZE(rm->mixer_to_enc_id), enc_id);
|
||||
_dpu_rm_clear_mapping(rm->ctl_to_enc_id,
|
||||
ARRAY_SIZE(rm->ctl_to_enc_id), enc_id);
|
||||
_dpu_rm_clear_mapping(rm->intf_to_enc_id,
|
||||
ARRAY_SIZE(rm->intf_to_enc_id), enc_id);
|
||||
}
|
||||
|
||||
void dpu_rm_release(struct dpu_rm *rm, struct drm_encoder *enc)
|
||||
|
@ -653,12 +536,48 @@ int dpu_rm_reserve(
|
|||
int dpu_rm_get_assigned_resources(struct dpu_rm *rm, uint32_t enc_id,
|
||||
enum dpu_hw_blk_type type, struct dpu_hw_blk **blks, int blks_size)
|
||||
{
|
||||
struct dpu_rm_hw_iter hw_iter;
|
||||
int num_blks = 0;
|
||||
struct dpu_hw_blk **hw_blks;
|
||||
uint32_t *hw_to_enc_id;
|
||||
int i, num_blks, max_blks;
|
||||
|
||||
dpu_rm_init_hw_iter(&hw_iter, enc_id, type);
|
||||
while (num_blks < blks_size && dpu_rm_get_hw(rm, &hw_iter))
|
||||
blks[num_blks++] = hw_iter.blk->hw;
|
||||
switch (type) {
|
||||
case DPU_HW_BLK_PINGPONG:
|
||||
hw_blks = rm->pingpong_blks;
|
||||
hw_to_enc_id = rm->pingpong_to_enc_id;
|
||||
max_blks = ARRAY_SIZE(rm->pingpong_blks);
|
||||
break;
|
||||
case DPU_HW_BLK_LM:
|
||||
hw_blks = rm->mixer_blks;
|
||||
hw_to_enc_id = rm->mixer_to_enc_id;
|
||||
max_blks = ARRAY_SIZE(rm->mixer_blks);
|
||||
break;
|
||||
case DPU_HW_BLK_CTL:
|
||||
hw_blks = rm->ctl_blks;
|
||||
hw_to_enc_id = rm->ctl_to_enc_id;
|
||||
max_blks = ARRAY_SIZE(rm->ctl_blks);
|
||||
break;
|
||||
case DPU_HW_BLK_INTF:
|
||||
hw_blks = rm->intf_blks;
|
||||
hw_to_enc_id = rm->intf_to_enc_id;
|
||||
max_blks = ARRAY_SIZE(rm->intf_blks);
|
||||
break;
|
||||
default:
|
||||
DPU_ERROR("blk type %d not managed by rm\n", type);
|
||||
return 0;
|
||||
}
|
||||
|
||||
num_blks = 0;
|
||||
for (i = 0; i < max_blks; i++) {
|
||||
if (hw_to_enc_id[i] != enc_id)
|
||||
continue;
|
||||
|
||||
if (num_blks == blks_size) {
|
||||
DPU_ERROR("More than %d resources assigned to enc %d\n",
|
||||
blks_size, enc_id);
|
||||
break;
|
||||
}
|
||||
blks[num_blks++] = hw_blks[i];
|
||||
}
|
||||
|
||||
return num_blks;
|
||||
}
|
||||
|
|
|
@ -11,15 +11,31 @@
|
|||
#include "msm_kms.h"
|
||||
#include "dpu_hw_top.h"
|
||||
|
||||
|
||||
/**
|
||||
* struct dpu_rm - DPU dynamic hardware resource manager
|
||||
* @hw_blks: array of lists of hardware resources present in the system, one
|
||||
* list per type of hardware block
|
||||
* @pingpong_blks: array of pingpong hardware resources
|
||||
* @mixer_blks: array of layer mixer hardware resources
|
||||
* @ctl_blks: array of ctl hardware resources
|
||||
* @intf_blks: array of intf hardware resources
|
||||
* @pingpong_to_enc_id: mapping of pingpong hardware resources to an encoder ID
|
||||
* @mixer_to_enc_id: mapping of mixer hardware resources to an encoder ID
|
||||
* @ctl_to_enc_id: mapping of ctl hardware resources to an encoder ID
|
||||
* @intf_to_enc_id: mapping of intf hardware resources to an encoder ID
|
||||
* @lm_max_width: cached layer mixer maximum width
|
||||
* @rm_lock: resource manager mutex
|
||||
*/
|
||||
struct dpu_rm {
|
||||
struct list_head hw_blks[DPU_HW_BLK_MAX];
|
||||
struct dpu_hw_blk *pingpong_blks[PINGPONG_MAX - PINGPONG_0];
|
||||
struct dpu_hw_blk *mixer_blks[LM_MAX - LM_0];
|
||||
struct dpu_hw_blk *ctl_blks[CTL_MAX - CTL_0];
|
||||
struct dpu_hw_blk *intf_blks[INTF_MAX - INTF_0];
|
||||
|
||||
uint32_t pingpong_to_enc_id[PINGPONG_MAX - PINGPONG_0];
|
||||
uint32_t mixer_to_enc_id[LM_MAX - LM_0];
|
||||
uint32_t ctl_to_enc_id[CTL_MAX - CTL_0];
|
||||
uint32_t intf_to_enc_id[INTF_MAX - INTF_0];
|
||||
|
||||
uint32_t lm_max_width;
|
||||
struct mutex rm_lock;
|
||||
};
|
||||
|
|
Loading…
Reference in New Issue