mirror of https://gitee.com/openkylin/linux.git
io-domains for rk3188 and rv1108, sfc (flash) support fpr rv1108
and some cleanups. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmEiG40QHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgeQiB/9HOQ4gh922O9OIr3O/xElYtHneFf0Rw+Qk /VcDouLNu9445hiVQzZGfzToc26oKp5DlWDyrhiVBFZy9NAGjJSpQjBE245yBJOz nYB6DKDXX4CFm1H1Di5PyTx8sU4BFIqQ3wyH4GEag16T9TrN+83O0eIrXibGFT5J r6NyMXN+nwABk9Yy9CkVC/rFGUQTviL7a1frmVqcPiXT94eXLjnItQ3IZQa31qSf KUoVGYggHQXSE47Gwf5aKk3bvqzFTusPpsJRuQnydBJnuvNeKbKUivg208n4Qh0z S1z2Swml0t1I2hJLPExx0rH7AxPk6/3/TFzsP4qfopLF1y/NaPvS =GUOh -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmEnYPQACgkQmmx57+YA GNnH6A/8DQV+bJVUcJ6H+fDgThU4YmrDPWp/PpRqCQa26iyyUeJt4vevyJDFEBOb Agt5EQ3bxtGQE6L9AaUfCuATAG7kMFDRqfBv/wiVukb1eIlOtLo4fWjGPrasJyUA YFg7/W/bKzFU6Bfi4EhqWY+JEmyyD74wvWn4bXfparUhfCJcm33RPQG/zTEyWpWO MxSdxyuCH+okGcsinwjdpJ9S2HbP/rsefPaB2WTyOnwEvIE2rL7lcbPbszNSg8pz 9F+m2zK3LV35jxzp/jKvY390DmkGYBKPafxv1u08kGzyezIkt4bX+p1SrDxn/gGv GfHDnLBMWN6OY0g4yijc2KNd7zMLLh8JLazttkaK5pV1jnls9Y7SQMNb0QwfXdiD otaYL3+q1H6CnARTPmjKbpqjdZnrmYkGlz3ABDXTEvzaVw60cgHYPmVnJKu3b2Ah V2wPyHHxK15EYXmf5UeAMB5qj/nI+vDxTag0Znywu6r8X1azpnpG6qr+erw6pe97 qZN5UeFMv0mX8NXBt5/rxd2OIKWoa0kty5iwfZtQQlix55pQojAhCMlr302Qj0me v1AC0p5orCU0aDYn3S2egpU8PDzU9Pq2IY1Fh/jGrKcGkUvE1ZVPhB1f+Vg79Zwy flEpLyJMBoZHjHAznuGpqN2CsGiP4yG/7ijf2kc9gybDq6xZQkI= =jxAj -----END PGP SIGNATURE----- Merge tag 'v5.15-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into arm/dt io-domains for rk3188 and rv1108, sfc (flash) support fpr rv1108 and some cleanups. * tag 'v5.15-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: Add SFC to RV1108 ARM: dts: rockchip: add io-domains nodes to rv1108.dtsi ARM: dts: rockchip: add io-domains node to rk3188.dtsi ARM: dts: rockchip: remove interrupt-names from iommu nodes ARM: dts: rockchip: rename timer compatible strings for rk3066a ARM: dts: rockchip: add space after &grf on rk3188 ARM: dts: rockchip: rename pcfg_* nodenames for rk3066/rk3188 Link: https://lore.kernel.org/r/4142796.VLH7GnMWUR@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
commit
bb4544c6d4
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@ -218,7 +218,7 @@ cru: clock-controller@20000000 {
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};
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timer2: timer@2000e000 {
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compatible = "snps,dw-apb-timer-osc";
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compatible = "snps,dw-apb-timer";
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reg = <0x2000e000 0x100>;
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interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_TIMER2>, <&cru PCLK_TIMER2>;
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@ -239,7 +239,7 @@ cpu_leakage: cpu_leakage@17 {
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};
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timer0: timer@20038000 {
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compatible = "snps,dw-apb-timer-osc";
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compatible = "snps,dw-apb-timer";
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reg = <0x20038000 0x100>;
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interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_TIMER0>, <&cru PCLK_TIMER0>;
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@ -247,7 +247,7 @@ timer0: timer@20038000 {
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};
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timer1: timer@2003a000 {
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compatible = "snps,dw-apb-timer-osc";
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compatible = "snps,dw-apb-timer";
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reg = <0x2003a000 0x100>;
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interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_TIMER1>, <&cru PCLK_TIMER1>;
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@ -351,11 +351,11 @@ gpio6: gpio6@2000a000 {
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#interrupt-cells = <2>;
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};
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pcfg_pull_default: pcfg_pull_default {
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pcfg_pull_default: pcfg-pull-default {
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bias-pull-pin-default;
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};
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pcfg_pull_none: pcfg_pull_none {
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pcfg_pull_none: pcfg-pull-none {
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bias-disable;
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};
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@ -275,15 +275,15 @@ gpio3: gpio3@20080000 {
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#interrupt-cells = <2>;
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};
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pcfg_pull_up: pcfg_pull_up {
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pcfg_pull_up: pcfg-pull-up {
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bias-pull-up;
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};
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pcfg_pull_down: pcfg_pull_down {
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pcfg_pull_down: pcfg-pull-down {
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bias-pull-down;
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};
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pcfg_pull_none: pcfg_pull_none {
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pcfg_pull_none: pcfg-pull-none {
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bias-disable;
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};
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@ -638,9 +638,14 @@ &gpu {
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power-domains = <&power RK3188_PD_GPU>;
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};
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&grf{
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&grf {
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compatible = "rockchip,rk3188-grf", "syscon", "simple-mfd";
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io_domains: io-domains {
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compatible = "rockchip,rk3188-io-voltage-domain";
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status = "disabled";
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};
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usbphy: usbphy {
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compatible = "rockchip,rk3188-usb-phy",
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"rockchip,rk3288-usb-phy";
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@ -987,7 +987,6 @@ iep_mmu: iommu@ff900800 {
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compatible = "rockchip,iommu";
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reg = <0x0 0xff900800 0x0 0x40>;
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interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "iep_mmu";
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clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>;
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clock-names = "aclk", "iface";
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#iommu-cells = <0>;
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@ -998,7 +997,6 @@ isp_mmu: iommu@ff914000 {
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compatible = "rockchip,iommu";
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reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>;
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interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "isp_mmu";
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clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>;
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clock-names = "aclk", "iface";
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#iommu-cells = <0>;
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@ -1059,7 +1057,6 @@ vopb_mmu: iommu@ff930300 {
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compatible = "rockchip,iommu";
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reg = <0x0 0xff930300 0x0 0x100>;
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interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "vopb_mmu";
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clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>;
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clock-names = "aclk", "iface";
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power-domains = <&power RK3288_PD_VIO>;
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@ -1109,7 +1106,6 @@ vopl_mmu: iommu@ff940300 {
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compatible = "rockchip,iommu";
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reg = <0x0 0xff940300 0x0 0x100>;
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interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "vopl_mmu";
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clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>;
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clock-names = "aclk", "iface";
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power-domains = <&power RK3288_PD_VIO>;
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@ -1252,7 +1248,6 @@ vpu_mmu: iommu@ff9a0800 {
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compatible = "rockchip,iommu";
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reg = <0x0 0xff9a0800 0x0 0x100>;
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interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "vpu_mmu";
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clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>;
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clock-names = "aclk", "iface";
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#iommu-cells = <0>;
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@ -1263,7 +1258,6 @@ hevc_mmu: iommu@ff9c0440 {
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compatible = "rockchip,iommu";
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reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>;
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interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-names = "hevc_mmu";
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clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>;
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clock-names = "aclk", "iface";
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#iommu-cells = <0>;
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@ -265,6 +265,11 @@ grf: syscon@10300000 {
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#address-cells = <1>;
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#size-cells = <1>;
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io_domains: io-domains {
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compatible = "rockchip,rv1108-io-voltage-domain";
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status = "disabled";
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};
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u2phy: usb2phy@100 {
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compatible = "rockchip,rv1108-usb2phy";
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reg = <0x100 0x0c>;
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@ -434,8 +439,13 @@ pwm3: pwm@20040030 {
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};
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pmugrf: syscon@20060000 {
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compatible = "rockchip,rv1108-pmugrf", "syscon";
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compatible = "rockchip,rv1108-pmugrf", "syscon", "simple-mfd";
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reg = <0x20060000 0x1000>;
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pmu_io_domains: io-domains {
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compatible = "rockchip,rv1108-pmu-io-voltage-domain";
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status = "disabled";
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};
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};
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usbgrf: syscon@202a0000 {
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@ -536,6 +546,17 @@ usb_otg: usb@30180000 {
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status = "disabled";
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};
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sfc: spi@301c0000 {
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compatible = "rockchip,sfc";
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reg = <0x301c0000 0x4000>;
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interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
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clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>;
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clock-names = "clk_sfc", "hclk_sfc";
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pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>;
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pinctrl-names = "default";
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status = "disabled";
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};
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gmac: eth@30200000 {
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compatible = "rockchip,rv1108-gmac";
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reg = <0x30200000 0x10000>;
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@ -704,6 +725,32 @@ emmc_cmd: emmc-cmd {
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};
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};
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sfc {
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sfc_bus4: sfc-bus4 {
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rockchip,pins =
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<2 RK_PA0 3 &pcfg_pull_none>,
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<2 RK_PA1 3 &pcfg_pull_none>,
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<2 RK_PA2 3 &pcfg_pull_none>,
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<2 RK_PA3 3 &pcfg_pull_none>;
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};
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sfc_bus2: sfc-bus2 {
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rockchip,pins =
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<2 RK_PA0 3 &pcfg_pull_none>,
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<2 RK_PA1 3 &pcfg_pull_none>;
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};
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sfc_cs0: sfc-cs0 {
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rockchip,pins =
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<2 RK_PB4 3 &pcfg_pull_none>;
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};
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sfc_clk: sfc-clk {
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rockchip,pins =
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<2 RK_PB7 2 &pcfg_pull_none>;
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};
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};
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gmac {
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rmii_pins: rmii-pins {
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rockchip,pins = <1 RK_PC5 2 &pcfg_pull_none>,
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