From f295228b384f9d66d1b4d31151123261a1c9e071 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Sun, 11 Jul 2021 13:21:54 +0200 Subject: [PATCH 1/7] ARM: dts: rockchip: rename pcfg_* nodenames for rk3066/rk3188 Rename pcfg_* nodenames for rk3066/rk3188 to pcfg-*, so that they fit in the regex with the other Rockchip SoCs. Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210711112154.5287-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3066a.dtsi | 4 ++-- arch/arm/boot/dts/rk3188.dtsi | 6 +++--- 2 files changed, 5 insertions(+), 5 deletions(-) diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index f5a665b5d209..3de82fb27b28 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -351,11 +351,11 @@ gpio6: gpio6@2000a000 { #interrupt-cells = <2>; }; - pcfg_pull_default: pcfg_pull_default { + pcfg_pull_default: pcfg-pull-default { bias-pull-pin-default; }; - pcfg_pull_none: pcfg_pull_none { + pcfg_pull_none: pcfg-pull-none { bias-disable; }; diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index 793a1b9117fe..083fca901bbe 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -275,15 +275,15 @@ gpio3: gpio3@20080000 { #interrupt-cells = <2>; }; - pcfg_pull_up: pcfg_pull_up { + pcfg_pull_up: pcfg-pull-up { bias-pull-up; }; - pcfg_pull_down: pcfg_pull_down { + pcfg_pull_down: pcfg-pull-down { bias-pull-down; }; - pcfg_pull_none: pcfg_pull_none { + pcfg_pull_none: pcfg-pull-none { bias-disable; }; From 2120e486b41963dfdad355d91c2818ff670776ba Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Fri, 9 Jul 2021 12:31:34 +0200 Subject: [PATCH 2/7] ARM: dts: rockchip: add space after &grf on rk3188 Fix layout by adding a space after &grf. Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210709103134.1750-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3188.dtsi | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index 083fca901bbe..b46967ccdff3 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -638,7 +638,7 @@ &gpu { power-domains = <&power RK3188_PD_GPU>; }; -&grf{ +&grf { compatible = "rockchip,rk3188-grf", "syscon", "simple-mfd"; usbphy: usbphy { From b3198e046821d395d148cfd5c623de4f280628d0 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Fri, 9 Jul 2021 12:16:24 +0200 Subject: [PATCH 3/7] ARM: dts: rockchip: rename timer compatible strings for rk3066a The compatible string "snps,dw-apb-timer-osc" was deprecated in place of "snps,dw-apb-timer". Rename the timer compatible strings in rk3066a.dtsi, so boot loaders like U-boot can use the timer node directly without conversion. Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210709101624.1463-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3066a.dtsi | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/arch/arm/boot/dts/rk3066a.dtsi b/arch/arm/boot/dts/rk3066a.dtsi index 3de82fb27b28..ae4055428c5e 100644 --- a/arch/arm/boot/dts/rk3066a.dtsi +++ b/arch/arm/boot/dts/rk3066a.dtsi @@ -218,7 +218,7 @@ cru: clock-controller@20000000 { }; timer2: timer@2000e000 { - compatible = "snps,dw-apb-timer-osc"; + compatible = "snps,dw-apb-timer"; reg = <0x2000e000 0x100>; interrupts = ; clocks = <&cru SCLK_TIMER2>, <&cru PCLK_TIMER2>; @@ -239,7 +239,7 @@ cpu_leakage: cpu_leakage@17 { }; timer0: timer@20038000 { - compatible = "snps,dw-apb-timer-osc"; + compatible = "snps,dw-apb-timer"; reg = <0x20038000 0x100>; interrupts = ; clocks = <&cru SCLK_TIMER0>, <&cru PCLK_TIMER0>; @@ -247,7 +247,7 @@ timer0: timer@20038000 { }; timer1: timer@2003a000 { - compatible = "snps,dw-apb-timer-osc"; + compatible = "snps,dw-apb-timer"; reg = <0x2003a000 0x100>; interrupts = ; clocks = <&cru SCLK_TIMER1>, <&cru PCLK_TIMER1>; From 6af95e03fb113fecc1c5d9883d8a7910dace010d Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Sun, 11 Jul 2021 16:34:29 +0200 Subject: [PATCH 4/7] ARM: dts: rockchip: remove interrupt-names from iommu nodes The iommu driver gets the interrupts by platform_get_irq(), so remove interrupt-names property from iommu nodes. Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210711143430.14347-1-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3288.dtsi | 6 ------ 1 file changed, 6 deletions(-) diff --git a/arch/arm/boot/dts/rk3288.dtsi b/arch/arm/boot/dts/rk3288.dtsi index 9c5a7791a1ab..4dcdcf17c977 100644 --- a/arch/arm/boot/dts/rk3288.dtsi +++ b/arch/arm/boot/dts/rk3288.dtsi @@ -987,7 +987,6 @@ iep_mmu: iommu@ff900800 { compatible = "rockchip,iommu"; reg = <0x0 0xff900800 0x0 0x40>; interrupts = ; - interrupt-names = "iep_mmu"; clocks = <&cru ACLK_IEP>, <&cru HCLK_IEP>; clock-names = "aclk", "iface"; #iommu-cells = <0>; @@ -998,7 +997,6 @@ isp_mmu: iommu@ff914000 { compatible = "rockchip,iommu"; reg = <0x0 0xff914000 0x0 0x100>, <0x0 0xff915000 0x0 0x100>; interrupts = ; - interrupt-names = "isp_mmu"; clocks = <&cru ACLK_ISP>, <&cru HCLK_ISP>; clock-names = "aclk", "iface"; #iommu-cells = <0>; @@ -1059,7 +1057,6 @@ vopb_mmu: iommu@ff930300 { compatible = "rockchip,iommu"; reg = <0x0 0xff930300 0x0 0x100>; interrupts = ; - interrupt-names = "vopb_mmu"; clocks = <&cru ACLK_VOP0>, <&cru HCLK_VOP0>; clock-names = "aclk", "iface"; power-domains = <&power RK3288_PD_VIO>; @@ -1109,7 +1106,6 @@ vopl_mmu: iommu@ff940300 { compatible = "rockchip,iommu"; reg = <0x0 0xff940300 0x0 0x100>; interrupts = ; - interrupt-names = "vopl_mmu"; clocks = <&cru ACLK_VOP1>, <&cru HCLK_VOP1>; clock-names = "aclk", "iface"; power-domains = <&power RK3288_PD_VIO>; @@ -1252,7 +1248,6 @@ vpu_mmu: iommu@ff9a0800 { compatible = "rockchip,iommu"; reg = <0x0 0xff9a0800 0x0 0x100>; interrupts = ; - interrupt-names = "vpu_mmu"; clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; clock-names = "aclk", "iface"; #iommu-cells = <0>; @@ -1263,7 +1258,6 @@ hevc_mmu: iommu@ff9c0440 { compatible = "rockchip,iommu"; reg = <0x0 0xff9c0440 0x0 0x40>, <0x0 0xff9c0480 0x0 0x40>; interrupts = ; - interrupt-names = "hevc_mmu"; clocks = <&cru ACLK_HEVC>, <&cru HCLK_HEVC>; clock-names = "aclk", "iface"; #iommu-cells = <0>; From 453da32aca12d91b096934a4870ec72e34d61447 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Fri, 25 Jun 2021 13:17:45 +0200 Subject: [PATCH 5/7] ARM: dts: rockchip: add io-domains node to rk3188.dtsi The compatible string below was added to rockchip-io-domain.txt, but never added to the device tree, so add a io-domains node to rk3188.dtsi "rockchip,rk3188-io-voltage-domain" Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210625111746.6269-3-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rk3188.dtsi | 5 +++++ 1 file changed, 5 insertions(+) diff --git a/arch/arm/boot/dts/rk3188.dtsi b/arch/arm/boot/dts/rk3188.dtsi index b46967ccdff3..2c606494b78c 100644 --- a/arch/arm/boot/dts/rk3188.dtsi +++ b/arch/arm/boot/dts/rk3188.dtsi @@ -641,6 +641,11 @@ &gpu { &grf { compatible = "rockchip,rk3188-grf", "syscon", "simple-mfd"; + io_domains: io-domains { + compatible = "rockchip,rk3188-io-voltage-domain"; + status = "disabled"; + }; + usbphy: usbphy { compatible = "rockchip,rk3188-usb-phy", "rockchip,rk3288-usb-phy"; From c0728a2732f0fe2b5e7c57b8c0c170352ace6476 Mon Sep 17 00:00:00 2001 From: Johan Jonker Date: Fri, 25 Jun 2021 13:17:46 +0200 Subject: [PATCH 6/7] ARM: dts: rockchip: add io-domains nodes to rv1108.dtsi The compatible strings below were added to rockchip-io-domain.txt, but never added to the device tree, so add io-domains nodes to rv1108.dtsi "rockchip,rv1108-io-voltage-domain" "rockchip,rv1108-pmu-io-voltage-domain" Signed-off-by: Johan Jonker Link: https://lore.kernel.org/r/20210625111746.6269-4-jbx6244@gmail.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rv1108.dtsi | 12 +++++++++++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index 9bd0acf3b708..1a61a6a68b01 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -265,6 +265,11 @@ grf: syscon@10300000 { #address-cells = <1>; #size-cells = <1>; + io_domains: io-domains { + compatible = "rockchip,rv1108-io-voltage-domain"; + status = "disabled"; + }; + u2phy: usb2phy@100 { compatible = "rockchip,rv1108-usb2phy"; reg = <0x100 0x0c>; @@ -434,8 +439,13 @@ pwm3: pwm@20040030 { }; pmugrf: syscon@20060000 { - compatible = "rockchip,rv1108-pmugrf", "syscon"; + compatible = "rockchip,rv1108-pmugrf", "syscon", "simple-mfd"; reg = <0x20060000 0x1000>; + + pmu_io_domains: io-domains { + compatible = "rockchip,rv1108-pmu-io-voltage-domain"; + status = "disabled"; + }; }; usbgrf: syscon@202a0000 { From 9d508827c7939242e8ed6b06f66aa87d9f7ea832 Mon Sep 17 00:00:00 2001 From: Chris Morgan Date: Thu, 12 Aug 2021 21:45:44 +0800 Subject: [PATCH 7/7] ARM: dts: rockchip: Add SFC to RV1108 Add a devicetree entry for the Rockchip SFC for the RV1108 SOC. Signed-off-by: Chris Morgan Signed-off-by: Jon Lin Link: https://lore.kernel.org/r/20210812134546.31340-5-jon.lin@rock-chips.com Signed-off-by: Heiko Stuebner --- arch/arm/boot/dts/rv1108.dtsi | 37 +++++++++++++++++++++++++++++++++++ 1 file changed, 37 insertions(+) diff --git a/arch/arm/boot/dts/rv1108.dtsi b/arch/arm/boot/dts/rv1108.dtsi index 1a61a6a68b01..24d56849af46 100644 --- a/arch/arm/boot/dts/rv1108.dtsi +++ b/arch/arm/boot/dts/rv1108.dtsi @@ -546,6 +546,17 @@ usb_otg: usb@30180000 { status = "disabled"; }; + sfc: spi@301c0000 { + compatible = "rockchip,sfc"; + reg = <0x301c0000 0x4000>; + interrupts = ; + clocks = <&cru SCLK_SFC>, <&cru HCLK_SFC>; + clock-names = "clk_sfc", "hclk_sfc"; + pinctrl-0 = <&sfc_clk &sfc_cs0 &sfc_bus4>; + pinctrl-names = "default"; + status = "disabled"; + }; + gmac: eth@30200000 { compatible = "rockchip,rv1108-gmac"; reg = <0x30200000 0x10000>; @@ -714,6 +725,32 @@ emmc_cmd: emmc-cmd { }; }; + sfc { + sfc_bus4: sfc-bus4 { + rockchip,pins = + <2 RK_PA0 3 &pcfg_pull_none>, + <2 RK_PA1 3 &pcfg_pull_none>, + <2 RK_PA2 3 &pcfg_pull_none>, + <2 RK_PA3 3 &pcfg_pull_none>; + }; + + sfc_bus2: sfc-bus2 { + rockchip,pins = + <2 RK_PA0 3 &pcfg_pull_none>, + <2 RK_PA1 3 &pcfg_pull_none>; + }; + + sfc_cs0: sfc-cs0 { + rockchip,pins = + <2 RK_PB4 3 &pcfg_pull_none>; + }; + + sfc_clk: sfc-clk { + rockchip,pins = + <2 RK_PB7 2 &pcfg_pull_none>; + }; + }; + gmac { rmii_pins: rmii-pins { rockchip,pins = <1 RK_PC5 2 &pcfg_pull_none>,