mirror of https://gitee.com/openkylin/linux.git
net: dsa: bcm_sf2: Allow matching arbitrary IPv4 mask lengths
There is no reason why we should limit ourselves to matching only full IPv4 addresses (/32), the same logic applies between the DATA and MASK ports, so just make it more configurable to accept both. Signed-off-by: Florian Fainelli <f.fainelli@gmail.com> Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Florian Fainelli
David S. Miller
parent
ba0696c22e
commit
bc3fc44c12
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@ -250,13 +250,84 @@ static int bcm_sf2_cfp_act_pol_set(struct bcm_sf2_priv *priv,
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return 0;
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}
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static void bcm_sf2_cfp_slice_ipv4(struct bcm_sf2_priv *priv,
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struct ethtool_tcpip4_spec *v4_spec,
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unsigned int slice_num,
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bool mask)
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{
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u32 reg, offset;
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/* C-Tag [31:24]
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* UDF_n_A8 [23:8]
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* UDF_n_A7 [7:0]
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*/
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reg = 0;
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if (mask)
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offset = CORE_CFP_MASK_PORT(4);
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else
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offset = CORE_CFP_DATA_PORT(4);
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core_writel(priv, reg, offset);
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/* UDF_n_A7 [31:24]
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* UDF_n_A6 [23:8]
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* UDF_n_A5 [7:0]
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*/
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reg = be16_to_cpu(v4_spec->pdst) >> 8;
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if (mask)
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offset = CORE_CFP_MASK_PORT(3);
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else
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offset = CORE_CFP_DATA_PORT(3);
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core_writel(priv, reg, offset);
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/* UDF_n_A5 [31:24]
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* UDF_n_A4 [23:8]
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* UDF_n_A3 [7:0]
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*/
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reg = (be16_to_cpu(v4_spec->pdst) & 0xff) << 24 |
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(u32)be16_to_cpu(v4_spec->psrc) << 8 |
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(be32_to_cpu(v4_spec->ip4dst) & 0x0000ff00) >> 8;
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if (mask)
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offset = CORE_CFP_MASK_PORT(2);
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else
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offset = CORE_CFP_DATA_PORT(2);
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core_writel(priv, reg, offset);
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/* UDF_n_A3 [31:24]
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* UDF_n_A2 [23:8]
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* UDF_n_A1 [7:0]
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*/
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reg = (u32)(be32_to_cpu(v4_spec->ip4dst) & 0xff) << 24 |
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(u32)(be32_to_cpu(v4_spec->ip4dst) >> 16) << 8 |
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(be32_to_cpu(v4_spec->ip4src) & 0x0000ff00) >> 8;
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if (mask)
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offset = CORE_CFP_MASK_PORT(1);
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else
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offset = CORE_CFP_DATA_PORT(1);
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core_writel(priv, reg, offset);
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/* UDF_n_A1 [31:24]
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* UDF_n_A0 [23:8]
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* Reserved [7:4]
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* Slice ID [3:2]
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* Slice valid [1:0]
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*/
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reg = (u32)(be32_to_cpu(v4_spec->ip4src) & 0xff) << 24 |
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(u32)(be32_to_cpu(v4_spec->ip4src) >> 16) << 8 |
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SLICE_NUM(slice_num) | SLICE_VALID;
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if (mask)
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offset = CORE_CFP_MASK_PORT(0);
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else
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offset = CORE_CFP_DATA_PORT(0);
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core_writel(priv, reg, offset);
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}
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static int bcm_sf2_cfp_ipv4_rule_set(struct bcm_sf2_priv *priv, int port,
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unsigned int port_num,
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unsigned int queue_num,
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struct ethtool_rx_flow_spec *fs)
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{
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struct ethtool_tcpip4_spec *v4_spec, *v4_m_spec;
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const struct cfp_udf_layout *layout;
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struct ethtool_tcpip4_spec *v4_spec;
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unsigned int slice_num, rule_index;
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u8 ip_proto, ip_frag;
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u8 num_udf;
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@ -267,10 +338,12 @@ static int bcm_sf2_cfp_ipv4_rule_set(struct bcm_sf2_priv *priv, int port,
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case TCP_V4_FLOW:
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ip_proto = IPPROTO_TCP;
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v4_spec = &fs->h_u.tcp_ip4_spec;
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v4_m_spec = &fs->m_u.tcp_ip4_spec;
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break;
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case UDP_V4_FLOW:
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ip_proto = IPPROTO_UDP;
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v4_spec = &fs->h_u.udp_ip4_spec;
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v4_m_spec = &fs->m_u.udp_ip4_spec;
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break;
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default:
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return -EINVAL;
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@ -321,69 +394,22 @@ static int bcm_sf2_cfp_ipv4_rule_set(struct bcm_sf2_priv *priv, int port,
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udf_upper_bits(num_udf),
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CORE_CFP_DATA_PORT(6));
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/* Mask with the specific layout for IPv4 packets */
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core_writel(priv, layout->udfs[slice_num].mask_value |
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udf_upper_bits(num_udf), CORE_CFP_MASK_PORT(6));
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/* UDF_Valid[7:0] [31:24]
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* S-Tag [23:8]
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* C-Tag [7:0]
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*/
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core_writel(priv, udf_lower_bits(num_udf) << 24, CORE_CFP_DATA_PORT(5));
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/* C-Tag [31:24]
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* UDF_n_A8 [23:8]
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* UDF_n_A7 [7:0]
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*/
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core_writel(priv, 0, CORE_CFP_DATA_PORT(4));
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/* UDF_n_A7 [31:24]
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* UDF_n_A6 [23:8]
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* UDF_n_A5 [7:0]
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*/
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core_writel(priv, be16_to_cpu(v4_spec->pdst) >> 8,
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CORE_CFP_DATA_PORT(3));
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/* UDF_n_A5 [31:24]
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* UDF_n_A4 [23:8]
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* UDF_n_A3 [7:0]
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*/
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reg = (be16_to_cpu(v4_spec->pdst) & 0xff) << 24 |
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(u32)be16_to_cpu(v4_spec->psrc) << 8 |
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(be32_to_cpu(v4_spec->ip4dst) & 0x0000ff00) >> 8;
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core_writel(priv, reg, CORE_CFP_DATA_PORT(2));
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/* UDF_n_A3 [31:24]
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* UDF_n_A2 [23:8]
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* UDF_n_A1 [7:0]
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*/
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reg = (u32)(be32_to_cpu(v4_spec->ip4dst) & 0xff) << 24 |
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(u32)(be32_to_cpu(v4_spec->ip4dst) >> 16) << 8 |
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(be32_to_cpu(v4_spec->ip4src) & 0x0000ff00) >> 8;
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core_writel(priv, reg, CORE_CFP_DATA_PORT(1));
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/* UDF_n_A1 [31:24]
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* UDF_n_A0 [23:8]
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* Reserved [7:4]
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* Slice ID [3:2]
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* Slice valid [1:0]
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*/
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reg = (u32)(be32_to_cpu(v4_spec->ip4src) & 0xff) << 24 |
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(u32)(be32_to_cpu(v4_spec->ip4src) >> 16) << 8 |
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SLICE_NUM(slice_num) | SLICE_VALID;
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core_writel(priv, reg, CORE_CFP_DATA_PORT(0));
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/* Mask with the specific layout for IPv4 packets */
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core_writel(priv, layout->udfs[slice_num].mask_value |
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udf_upper_bits(num_udf), CORE_CFP_MASK_PORT(6));
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/* Mask all but valid UDFs */
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core_writel(priv, udf_lower_bits(num_udf) << 24, CORE_CFP_MASK_PORT(5));
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/* Mask all */
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core_writel(priv, 0, CORE_CFP_MASK_PORT(4));
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/* All other UDFs should be matched with the filter */
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core_writel(priv, 0xff, CORE_CFP_MASK_PORT(3));
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core_writel(priv, 0xffffffff, CORE_CFP_MASK_PORT(2));
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core_writel(priv, 0xffffffff, CORE_CFP_MASK_PORT(1));
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core_writel(priv, 0xffffff0f, CORE_CFP_MASK_PORT(0));
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/* Program the match and the mask */
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bcm_sf2_cfp_slice_ipv4(priv, v4_spec, slice_num, false);
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bcm_sf2_cfp_slice_ipv4(priv, v4_m_spec, SLICE_NUM_MASK, true);
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/* Insert into TCAM now */
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bcm_sf2_cfp_rule_addr_set(priv, rule_index);
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@ -802,12 +828,80 @@ static void bcm_sf2_invert_masks(struct ethtool_rx_flow_spec *flow)
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flow->m_ext.data[1] ^= cpu_to_be32(~0);
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}
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static int bcm_sf2_cfp_unslice_ipv4(struct bcm_sf2_priv *priv,
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struct ethtool_tcpip4_spec *v4_spec,
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bool mask)
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{
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u32 reg, offset, ipv4;
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u16 src_dst_port;
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if (mask)
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offset = CORE_CFP_MASK_PORT(3);
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else
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offset = CORE_CFP_DATA_PORT(3);
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reg = core_readl(priv, offset);
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/* src port [15:8] */
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src_dst_port = reg << 8;
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if (mask)
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offset = CORE_CFP_MASK_PORT(2);
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else
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offset = CORE_CFP_DATA_PORT(2);
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reg = core_readl(priv, offset);
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/* src port [7:0] */
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src_dst_port |= (reg >> 24);
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v4_spec->pdst = cpu_to_be16(src_dst_port);
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v4_spec->psrc = cpu_to_be16((u16)(reg >> 8));
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/* IPv4 dst [15:8] */
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ipv4 = (reg & 0xff) << 8;
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if (mask)
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offset = CORE_CFP_MASK_PORT(1);
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else
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offset = CORE_CFP_DATA_PORT(1);
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reg = core_readl(priv, offset);
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/* IPv4 dst [31:16] */
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ipv4 |= ((reg >> 8) & 0xffff) << 16;
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/* IPv4 dst [7:0] */
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ipv4 |= (reg >> 24) & 0xff;
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v4_spec->ip4dst = cpu_to_be32(ipv4);
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/* IPv4 src [15:8] */
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ipv4 = (reg & 0xff) << 8;
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if (mask)
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offset = CORE_CFP_MASK_PORT(0);
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else
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offset = CORE_CFP_DATA_PORT(0);
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reg = core_readl(priv, offset);
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/* Once the TCAM is programmed, the mask reflects the slice number
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* being matched, don't bother checking it when reading back the
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* mask spec
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*/
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if (!mask && !(reg & SLICE_VALID))
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return -EINVAL;
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/* IPv4 src [7:0] */
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ipv4 |= (reg >> 24) & 0xff;
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/* IPv4 src [31:16] */
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ipv4 |= ((reg >> 8) & 0xffff) << 16;
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v4_spec->ip4src = cpu_to_be32(ipv4);
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return 0;
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}
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static int bcm_sf2_cfp_ipv4_rule_get(struct bcm_sf2_priv *priv, int port,
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struct ethtool_rx_flow_spec *fs)
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{
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struct ethtool_tcpip4_spec *v4_spec = NULL, *v4_m_spec = NULL;
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u16 src_dst_port;
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u32 reg, ipv4;
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u32 reg;
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int ret;
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reg = core_readl(priv, CORE_CFP_DATA_PORT(6));
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@ -829,44 +923,11 @@ static int bcm_sf2_cfp_ipv4_rule_get(struct bcm_sf2_priv *priv, int port,
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fs->m_ext.data[0] = cpu_to_be32((reg >> IP_FRAG_SHIFT) & 1);
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v4_spec->tos = (reg >> IPTOS_SHIFT) & IPTOS_MASK;
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reg = core_readl(priv, CORE_CFP_DATA_PORT(3));
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/* src port [15:8] */
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src_dst_port = reg << 8;
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ret = bcm_sf2_cfp_unslice_ipv4(priv, v4_spec, false);
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if (ret)
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return ret;
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reg = core_readl(priv, CORE_CFP_DATA_PORT(2));
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/* src port [7:0] */
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src_dst_port |= (reg >> 24);
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v4_spec->pdst = cpu_to_be16(src_dst_port);
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v4_m_spec->pdst = cpu_to_be16(~0);
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v4_spec->psrc = cpu_to_be16((u16)(reg >> 8));
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v4_m_spec->psrc = cpu_to_be16(~0);
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/* IPv4 dst [15:8] */
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ipv4 = (reg & 0xff) << 8;
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reg = core_readl(priv, CORE_CFP_DATA_PORT(1));
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/* IPv4 dst [31:16] */
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ipv4 |= ((reg >> 8) & 0xffff) << 16;
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/* IPv4 dst [7:0] */
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ipv4 |= (reg >> 24) & 0xff;
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v4_spec->ip4dst = cpu_to_be32(ipv4);
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v4_m_spec->ip4dst = cpu_to_be32(~0);
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/* IPv4 src [15:8] */
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ipv4 = (reg & 0xff) << 8;
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reg = core_readl(priv, CORE_CFP_DATA_PORT(0));
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if (!(reg & SLICE_VALID))
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return -EINVAL;
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/* IPv4 src [7:0] */
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ipv4 |= (reg >> 24) & 0xff;
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/* IPv4 src [31:16] */
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ipv4 |= ((reg >> 8) & 0xffff) << 16;
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v4_spec->ip4src = cpu_to_be32(ipv4);
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v4_m_spec->ip4src = cpu_to_be32(~0);
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return 0;
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return bcm_sf2_cfp_unslice_ipv4(priv, v4_m_spec, true);
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}
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static int bcm_sf2_cfp_unslice_ipv6(struct bcm_sf2_priv *priv,
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@ -313,7 +313,7 @@ enum bcm_sf2_reg_offs {
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#define SLICE_VALID 3
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#define SLICE_NUM_SHIFT 2
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#define SLICE_NUM(x) ((x) << SLICE_NUM_SHIFT)
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#define SLICE_NUM_MASK 0xff
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#define SLICE_NUM_MASK 0x3
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#define CORE_CFP_MASK_PORT_0 0x280c0
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