mirror of https://gitee.com/openkylin/linux.git
clk: renesas: r8a77965: Add FDP clock
This patch adds FDP1-0 clock to the R8A77965 SoC. Signed-off-by: Hoan Nguyen An <na-hoan@jinso.co.jp> Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
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@ -112,6 +112,7 @@ static const struct cpg_core_clk r8a77965_core_clks[] __initconst = {
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};
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static const struct mssr_mod_clk r8a77965_mod_clks[] __initconst = {
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DEF_MOD("fdp1-0", 119, R8A77965_CLK_S0D1),
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DEF_MOD("scif5", 202, R8A77965_CLK_S3D4),
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DEF_MOD("scif4", 203, R8A77965_CLK_S3D4),
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DEF_MOD("scif3", 204, R8A77965_CLK_S3D4),
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