mirror of https://gitee.com/openkylin/linux.git
perf vendor events intel: Add uncore events for Ivy Bridge client
Add V18 of Ivy Bridge uncore events Cc: jolsa@kernel.org Link: http://lkml.kernel.org/n/tip-299k76asec5rwp0i86qygnnt@git.kernel.org Signed-off-by: Andi Kleen <ak@linux.intel.com>
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[
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{
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"Unit": "CBO",
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"EventCode": "0x22",
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"UMask": "0x01",
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"EventName": "UNC_CBO_XSNP_RESPONSE.MISS",
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"BriefDescription": "A snoop misses in some processor core.",
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"PublicDescription": "A snoop misses in some processor core.",
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"Counter": "0,1",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "CBO",
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"EventCode": "0x22",
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"UMask": "0x02",
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"EventName": "UNC_CBO_XSNP_RESPONSE.INVAL",
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"BriefDescription": "A snoop invalidates a non-modified line in some processor core.",
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"PublicDescription": "A snoop invalidates a non-modified line in some processor core.",
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"Counter": "0,1",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "CBO",
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"EventCode": "0x22",
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"UMask": "0x04",
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"EventName": "UNC_CBO_XSNP_RESPONSE.HIT",
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"BriefDescription": "A snoop hits a non-modified line in some processor core.",
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"PublicDescription": "A snoop hits a non-modified line in some processor core.",
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"Counter": "0,1",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "CBO",
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"EventCode": "0x22",
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"UMask": "0x08",
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"EventName": "UNC_CBO_XSNP_RESPONSE.HITM",
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"BriefDescription": "A snoop hits a modified line in some processor core.",
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"PublicDescription": "A snoop hits a modified line in some processor core.",
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"Counter": "0,1",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "CBO",
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"EventCode": "0x22",
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"UMask": "0x10",
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"EventName": "UNC_CBO_XSNP_RESPONSE.INVAL_M",
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"BriefDescription": "A snoop invalidates a modified line in some processor core.",
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"PublicDescription": "A snoop invalidates a modified line in some processor core.",
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"Counter": "0,1",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "CBO",
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"EventCode": "0x22",
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"UMask": "0x20",
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"EventName": "UNC_CBO_XSNP_RESPONSE.EXTERNAL_FILTER",
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"BriefDescription": "Filter on cross-core snoops initiated by this Cbox due to external snoop request.",
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"PublicDescription": "Filter on cross-core snoops initiated by this Cbox due to external snoop request.",
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"Counter": "0,1",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "CBO",
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"EventCode": "0x22",
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"UMask": "0x40",
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"EventName": "UNC_CBO_XSNP_RESPONSE.XCORE_FILTER",
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"BriefDescription": "Filter on cross-core snoops initiated by this Cbox due to processor core memory request.",
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"PublicDescription": "Filter on cross-core snoops initiated by this Cbox due to processor core memory request.",
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"Counter": "0,1",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "CBO",
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"EventCode": "0x22",
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"UMask": "0x80",
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"EventName": "UNC_CBO_XSNP_RESPONSE.EVICTION_FILTER",
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"BriefDescription": "Filter on cross-core snoops initiated by this Cbox due to LLC eviction.",
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"PublicDescription": "Filter on cross-core snoops initiated by this Cbox due to LLC eviction.",
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"Counter": "0,1",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "CBO",
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"EventCode": "0x34",
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"UMask": "0x01",
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"EventName": "UNC_CBO_CACHE_LOOKUP.M",
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"BriefDescription": "LLC lookup request that access cache and found line in M-state.",
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"PublicDescription": "LLC lookup request that access cache and found line in M-state.",
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"Counter": "0,1",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "CBO",
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"EventCode": "0x34",
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"UMask": "0x02",
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"EventName": "UNC_CBO_CACHE_LOOKUP.E",
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"BriefDescription": "LLC lookup request that access cache and found line in E-state.",
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"PublicDescription": "LLC lookup request that access cache and found line in E-state.",
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"Counter": "0,1",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "CBO",
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"EventCode": "0x34",
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"UMask": "0x04",
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"EventName": "UNC_CBO_CACHE_LOOKUP.S",
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"BriefDescription": "LLC lookup request that access cache and found line in S-state.",
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"PublicDescription": "LLC lookup request that access cache and found line in S-state.",
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"Counter": "0,1",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "CBO",
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"EventCode": "0x34",
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"UMask": "0x08",
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"EventName": "UNC_CBO_CACHE_LOOKUP.I",
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"BriefDescription": "LLC lookup request that access cache and found line in I-state.",
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"PublicDescription": "LLC lookup request that access cache and found line in I-state.",
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"Counter": "0,1",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "CBO",
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"EventCode": "0x34",
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"UMask": "0x10",
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"EventName": "UNC_CBO_CACHE_LOOKUP.READ_FILTER",
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"BriefDescription": "Filter on processor core initiated cacheable read requests.",
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"PublicDescription": "Filter on processor core initiated cacheable read requests.",
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"Counter": "0,1",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "CBO",
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"EventCode": "0x34",
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"UMask": "0x20",
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"EventName": "UNC_CBO_CACHE_LOOKUP.WRITE_FILTER",
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"BriefDescription": "Filter on processor core initiated cacheable write requests.",
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"PublicDescription": "Filter on processor core initiated cacheable write requests.",
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"Counter": "0,1",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "CBO",
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"EventCode": "0x34",
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"UMask": "0x40",
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"EventName": "UNC_CBO_CACHE_LOOKUP.EXTSNP_FILTER",
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"BriefDescription": "Filter on external snoop requests.",
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"PublicDescription": "Filter on external snoop requests.",
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"Counter": "0,1",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "CBO",
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"EventCode": "0x34",
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"UMask": "0x80",
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"EventName": "UNC_CBO_CACHE_LOOKUP.ANY_REQUEST_FILTER",
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"BriefDescription": "Filter on any IRQ or IPQ initiated requests including uncacheable, non-coherent requests.",
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"PublicDescription": "Filter on any IRQ or IPQ initiated requests including uncacheable, non-coherent requests.",
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"Counter": "0,1",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "ARB",
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"EventCode": "0x80",
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"UMask": "0x01",
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"EventName": "UNC_ARB_TRK_OCCUPANCY.ALL",
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"BriefDescription": "Counts cycles weighted by the number of requests waiting for data returning from the memory controller. Accounts for coherent and non-coherent requests initiated by IA cores, processor graphic units, or LLC.",
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"PublicDescription": "Counts cycles weighted by the number of requests waiting for data returning from the memory controller. Accounts for coherent and non-coherent requests initiated by IA cores, processor graphic units, or LLC.",
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"Counter": "0",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "ARB",
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"EventCode": "0x81",
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"UMask": "0x01",
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"EventName": "UNC_ARB_TRK_REQUESTS.ALL",
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"BriefDescription": "Counts the number of coherent and in-coherent requests initiated by IA cores, processor graphic units, or LLC.",
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"PublicDescription": "Counts the number of coherent and in-coherent requests initiated by IA cores, processor graphic units, or LLC.",
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"Counter": "0,1",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "ARB",
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"EventCode": "0x81",
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"UMask": "0x20",
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"EventName": "UNC_ARB_TRK_REQUESTS.WRITES",
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"BriefDescription": "Counts the number of allocated write entries, include full, partial, and LLC evictions.",
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"PublicDescription": "Counts the number of allocated write entries, include full, partial, and LLC evictions.",
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"Counter": "0,1",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "ARB",
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"EventCode": "0x81",
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"UMask": "0x80",
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"EventName": "UNC_ARB_TRK_REQUESTS.EVICTIONS",
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"BriefDescription": "Counts the number of LLC evictions allocated.",
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"PublicDescription": "Counts the number of LLC evictions allocated.",
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"Counter": "0,1",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "ARB",
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"EventCode": "0x83",
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"UMask": "0x01",
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"EventName": "UNC_ARB_COH_TRK_OCCUPANCY.ALL",
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"BriefDescription": "Cycles weighted by number of requests pending in Coherency Tracker.",
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"PublicDescription": "Cycles weighted by number of requests pending in Coherency Tracker.",
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"Counter": "0",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "ARB",
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"EventCode": "0x84",
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"UMask": "0x01",
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"EventName": "UNC_ARB_COH_TRK_REQUESTS.ALL",
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"BriefDescription": "Number of requests allocated in Coherency Tracker.",
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"PublicDescription": "Number of requests allocated in Coherency Tracker.",
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"Counter": "0,1",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "ARB",
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"EventCode": "0x80",
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"UMask": "0x01",
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"EventName": "UNC_ARB_TRK_OCCUPANCY.CYCLES_WITH_ANY_REQUEST",
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"BriefDescription": "Cycles with at least one request outstanding is waiting for data return from memory controller. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, or LLC.",
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"PublicDescription": "Cycles with at least one request outstanding is waiting for data return from memory controller. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, or LLC.",
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"Counter": "0,1",
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"CounterMask": "1",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "ARB",
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"EventCode": "0x80",
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"UMask": "0x01",
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"EventName": "UNC_ARB_TRK_OCCUPANCY.CYCLES_OVER_HALF_FULL",
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"BriefDescription": "Cycles with at least half of the requests outstanding are waiting for data return from memory controller. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, or LLC.",
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"PublicDescription": "Cycles with at least half of the requests outstanding are waiting for data return from memory controller. Account for coherent and non-coherent requests initiated by IA Cores, Processor Graphics Unit, or LLC.",
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"Counter": "0,1",
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"CounterMask": "10",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "ARB",
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"EventCode": "0x0",
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"UMask": "0x01",
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"EventName": "UNC_CLOCK.SOCKET",
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"BriefDescription": "This 48-bit fixed counter counts the UCLK cycles.",
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"PublicDescription": "This 48-bit fixed counter counts the UCLK cycles.",
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"Counter": "Fixed",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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},
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{
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"Unit": "CBO",
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"EventCode": "0x34",
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"UMask": "0x06",
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"EventName": "UNC_CBO_CACHE_LOOKUP.ES",
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"BriefDescription": "LLC lookup request that access cache and found line in E-state or S-state.",
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"PublicDescription": "LLC lookup request that access cache and found line in E-state or S-state.",
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"Counter": "0,1",
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"CounterMask": "0",
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"Invert": "0",
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"EdgeDetect": "0"
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}
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]
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