mirror of https://gitee.com/openkylin/linux.git
arm64: dts: renesas: r8a77995: draak: Enable HDMI display output
Adds LVDS decoder, HDMI encoder and connector for the Draak board. The LVDS0 and LVDS1 encoders can use the DU_DOTCLKIN0, DU_DOTCLKIN1 and EXTAL externals clocks. Two of them are provided to the SoC on the Draak board, hook them up in DT. Signed-off-by: Ulrich Hecht <uli+renesas@fpond.eu> Signed-off-by: Laurent Pinchart <laurent.pinchart+renesas@ideasonboard.com> Tested-by: Jacopo Mondi <jacopo+renesas@jmondi.org> Signed-off-by: Simon Horman <horms+renesas@verge.net.au>
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@ -2,7 +2,7 @@
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/*
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* Device Tree Source for the Draak board
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*
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* Copyright (C) 2016 Renesas Electronics Corp.
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* Copyright (C) 2016-2018 Renesas Electronics Corp.
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* Copyright (C) 2017 Glider bvba
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*/
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@ -45,6 +45,41 @@ hdmi_con_in: endpoint {
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};
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};
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hdmi-out {
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compatible = "hdmi-connector";
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type = "a";
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port {
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hdmi_con_out: endpoint {
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remote-endpoint = <&adv7511_out>;
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};
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};
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};
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lvds-decoder {
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compatible = "thine,thc63lvd1024";
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vcc-supply = <®_3p3v>;
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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thc63lvd1024_in: endpoint {
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remote-endpoint = <&lvds0_out>;
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};
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};
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port@2 {
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reg = <2>;
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thc63lvd1024_out: endpoint {
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remote-endpoint = <&adv7511_in>;
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};
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};
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};
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};
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memory@48000000 {
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device_type = "memory";
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/* first 128MB is reserved for secure area. */
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@ -190,6 +225,43 @@ adv7180_out: endpoint {
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};
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hdmi-encoder@39 {
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compatible = "adi,adv7511w";
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reg = <0x39>, <0x3f>, <0x38>, <0x3c>;
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reg-names = "main", "edid", "packet", "cec";
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interrupt-parent = <&gpio1>;
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interrupts = <28 IRQ_TYPE_LEVEL_LOW>;
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/* Depends on LVDS */
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max-clock = <135000000>;
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min-vrefresh = <50>;
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adi,input-depth = <8>;
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adi,input-colorspace = "rgb";
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adi,input-clock = "1x";
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adi,input-style = <1>;
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adi,input-justification = "evenly";
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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port@0 {
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reg = <0>;
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adv7511_in: endpoint {
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remote-endpoint = <&thc63lvd1024_out>;
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};
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};
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port@1 {
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reg = <1>;
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adv7511_out: endpoint {
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remote-endpoint = <&hdmi_con_out>;
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};
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};
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};
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};
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hdmi-decoder@4c {
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compatible = "adi,adv7612";
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reg = <0x4c>;
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@ -240,6 +312,30 @@ &i2c1 {
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status = "okay";
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};
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&lvds0 {
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status = "okay";
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clocks = <&cpg CPG_MOD 727>,
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<&x12_clk>,
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<&extal_clk>;
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clock-names = "fck", "dclkin.0", "extal";
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ports {
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port@1 {
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lvds0_out: endpoint {
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remote-endpoint = <&thc63lvd1024_in>;
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};
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};
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};
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};
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&lvds1 {
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clocks = <&cpg CPG_MOD 727>,
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<&x12_clk>,
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<&extal_clk>;
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clock-names = "fck", "dclkin.0", "extal";
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};
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&ohci0 {
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status = "okay";
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};
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