mirror of https://gitee.com/openkylin/linux.git
ixgbe: Move interrupt related values out of ring and into q_vector
This change moves work_limit, total_packets, and total_bytes into the ring container struct of the q_vector. The advantage of this is that it should reduce the size of memory used in the event of multiple rings being assigned to a single q_vector. In addition it should help to reduce the total workload for calculating itr since now total_packets and total_bytes will be the total work done of the interrupt instead of for the ring. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
This commit is contained in:
Alexander Duyck
Jeff Kirsher
parent
08c8833b29
commit
bd19805803
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@ -214,12 +214,10 @@ struct ixgbe_ring {
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struct ixgbe_rx_buffer *rx_buffer_info;
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};
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unsigned long state;
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u8 atr_sample_rate;
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u8 atr_count;
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u8 __iomem *tail;
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u16 count; /* amount of descriptors */
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u16 rx_buf_len;
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u16 next_to_use;
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u16 next_to_clean;
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u8 queue_index; /* needed for multiqueue queue management */
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u8 reg_idx; /* holds the special value that gets
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@ -227,15 +225,13 @@ struct ixgbe_ring {
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* associated with this ring, which is
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* different for DCB and RSS modes
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*/
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u8 atr_sample_rate;
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u8 atr_count;
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u16 next_to_use;
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u16 next_to_clean;
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u8 dcb_tc;
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u16 work_limit; /* max work per interrupt */
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u8 __iomem *tail;
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unsigned int total_bytes;
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unsigned int total_packets;
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struct ixgbe_queue_stats stats;
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struct u64_stats_sync syncp;
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union {
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@ -283,6 +279,9 @@ struct ixgbe_ring_container {
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#else
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DECLARE_BITMAP(idx, MAX_TX_QUEUES);
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#endif
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unsigned int total_bytes; /* total bytes processed this int */
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unsigned int total_packets; /* total packets processed this int */
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u16 work_limit; /* total work allowed per interrupt */
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u8 count; /* total number of rings in vector */
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u8 itr; /* current ITR setting for ring */
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};
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@ -417,6 +416,9 @@ struct ixgbe_adapter {
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u16 eitr_low;
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u16 eitr_high;
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/* Work limits */
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u16 tx_work_limit;
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/* TX */
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struct ixgbe_ring *tx_ring[MAX_TX_QUEUES] ____cacheline_aligned_in_smp;
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int num_tx_queues;
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@ -2103,7 +2103,7 @@ static int ixgbe_get_coalesce(struct net_device *netdev,
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{
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struct ixgbe_adapter *adapter = netdev_priv(netdev);
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ec->tx_max_coalesced_frames_irq = adapter->tx_ring[0]->work_limit;
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ec->tx_max_coalesced_frames_irq = adapter->tx_work_limit;
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/* only valid if in constant ITR mode */
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switch (adapter->rx_itr_setting) {
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@ -2192,7 +2192,7 @@ static int ixgbe_set_coalesce(struct net_device *netdev,
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return -EINVAL;
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if (ec->tx_max_coalesced_frames_irq)
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adapter->tx_ring[0]->work_limit = ec->tx_max_coalesced_frames_irq;
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adapter->tx_work_limit = ec->tx_max_coalesced_frames_irq;
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if (ec->rx_coalesce_usecs > 1) {
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/* check the limits */
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@ -2267,12 +2267,14 @@ static int ixgbe_set_coalesce(struct net_device *netdev,
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else
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/* rx only or mixed */
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q_vector->eitr = adapter->rx_eitr_param;
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q_vector->tx.work_limit = adapter->tx_work_limit;
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ixgbe_write_eitr(q_vector);
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}
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/* Legacy Interrupt Mode */
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} else {
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q_vector = adapter->q_vector[0];
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q_vector->eitr = adapter->rx_eitr_param;
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q_vector->tx.work_limit = adapter->tx_work_limit;
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ixgbe_write_eitr(q_vector);
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}
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@ -805,7 +805,7 @@ static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
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eop_desc = IXGBE_TX_DESC_ADV(tx_ring, eop);
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while ((eop_desc->wb.status & cpu_to_le32(IXGBE_TXD_STAT_DD)) &&
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(count < tx_ring->work_limit)) {
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(count < q_vector->tx.work_limit)) {
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bool cleaned = false;
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rmb(); /* read buffer_info after eop_desc */
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for ( ; !cleaned; count++) {
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@ -834,11 +834,11 @@ static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
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}
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tx_ring->next_to_clean = i;
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tx_ring->total_bytes += total_bytes;
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tx_ring->total_packets += total_packets;
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u64_stats_update_begin(&tx_ring->syncp);
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tx_ring->stats.packets += total_packets;
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tx_ring->stats.bytes += total_bytes;
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tx_ring->stats.packets += total_packets;
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u64_stats_update_begin(&tx_ring->syncp);
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q_vector->tx.total_bytes += total_bytes;
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q_vector->tx.total_packets += total_packets;
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u64_stats_update_end(&tx_ring->syncp);
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if (check_for_tx_hang(tx_ring) && ixgbe_check_tx_hang(tx_ring)) {
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@ -886,7 +886,7 @@ static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
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}
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}
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return count < tx_ring->work_limit;
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return count < q_vector->tx.work_limit;
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}
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#ifdef CONFIG_IXGBE_DCA
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@ -1486,12 +1486,12 @@ static void ixgbe_clean_rx_irq(struct ixgbe_q_vector *q_vector,
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}
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#endif /* IXGBE_FCOE */
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rx_ring->total_packets += total_rx_packets;
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rx_ring->total_bytes += total_rx_bytes;
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u64_stats_update_begin(&rx_ring->syncp);
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rx_ring->stats.packets += total_rx_packets;
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rx_ring->stats.bytes += total_rx_bytes;
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u64_stats_update_end(&rx_ring->syncp);
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q_vector->rx.total_packets += total_rx_packets;
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q_vector->rx.total_bytes += total_rx_bytes;
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}
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static int ixgbe_clean_rxonly(struct napi_struct *, int);
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@ -1597,11 +1597,8 @@ enum latency_range {
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/**
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* ixgbe_update_itr - update the dynamic ITR value based on statistics
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* @adapter: pointer to adapter
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* @eitr: eitr setting (ints per sec) to give last timeslice
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* @itr_setting: current throttle rate in ints/second
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* @packets: the number of packets during this measurement interval
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* @bytes: the number of bytes during this measurement interval
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* @q_vector: structure containing interrupt and ring information
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* @ring_container: structure containing ring performance data
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*
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* Stores a new ITR value based on packets and byte
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* counts during the last interrupt. The advantage of per interrupt
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@ -1613,17 +1610,18 @@ enum latency_range {
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* this functionality is controlled by the InterruptThrottleRate module
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* parameter (see ixgbe_param.c)
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**/
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static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
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u32 eitr, u8 itr_setting,
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int packets, int bytes)
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static void ixgbe_update_itr(struct ixgbe_q_vector *q_vector,
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struct ixgbe_ring_container *ring_container)
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{
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unsigned int retval = itr_setting;
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u32 timepassed_us;
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u64 bytes_perint;
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struct ixgbe_adapter *adapter = q_vector->adapter;
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int bytes = ring_container->total_bytes;
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int packets = ring_container->total_packets;
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u32 timepassed_us;
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u8 itr_setting = ring_container->itr;
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if (packets == 0)
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goto update_itr_done;
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return;
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/* simple throttlerate management
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* 0-20MB/s lowest (100000 ints/s)
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@ -1631,28 +1629,32 @@ static u8 ixgbe_update_itr(struct ixgbe_adapter *adapter,
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* 100-1249MB/s bulk (8000 ints/s)
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*/
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/* what was last interrupt timeslice? */
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timepassed_us = 1000000/eitr;
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timepassed_us = 1000000/q_vector->eitr;
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bytes_perint = bytes / timepassed_us; /* bytes/usec */
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switch (itr_setting) {
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case lowest_latency:
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if (bytes_perint > adapter->eitr_low)
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retval = low_latency;
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itr_setting = low_latency;
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break;
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case low_latency:
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if (bytes_perint > adapter->eitr_high)
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retval = bulk_latency;
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itr_setting = bulk_latency;
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else if (bytes_perint <= adapter->eitr_low)
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retval = lowest_latency;
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itr_setting = lowest_latency;
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break;
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case bulk_latency:
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if (bytes_perint <= adapter->eitr_high)
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retval = low_latency;
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itr_setting = low_latency;
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break;
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}
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update_itr_done:
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return retval;
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/* clear work counters since we have the values we need */
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ring_container->total_bytes = 0;
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ring_container->total_packets = 0;
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/* write updated itr to ring container */
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ring_container->itr = itr_setting;
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}
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/**
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@ -1698,42 +1700,13 @@ void ixgbe_write_eitr(struct ixgbe_q_vector *q_vector)
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IXGBE_WRITE_REG(hw, IXGBE_EITR(v_idx), itr_reg);
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}
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static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
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static void ixgbe_set_itr(struct ixgbe_q_vector *q_vector)
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{
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struct ixgbe_adapter *adapter = q_vector->adapter;
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int i, r_idx;
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u32 new_itr;
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u8 current_itr, ret_itr;
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u32 new_itr = q_vector->eitr;
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u8 current_itr;
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r_idx = find_first_bit(q_vector->tx.idx, adapter->num_tx_queues);
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for (i = 0; i < q_vector->tx.count; i++) {
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struct ixgbe_ring *tx_ring = adapter->tx_ring[r_idx];
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ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
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q_vector->tx.itr,
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tx_ring->total_packets,
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tx_ring->total_bytes);
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/* if the result for this queue would decrease interrupt
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* rate for this vector then use that result */
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q_vector->tx.itr = ((q_vector->tx.itr > ret_itr) ?
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q_vector->tx.itr - 1 : ret_itr);
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r_idx = find_next_bit(q_vector->tx.idx, adapter->num_tx_queues,
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r_idx + 1);
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}
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r_idx = find_first_bit(q_vector->rx.idx, adapter->num_rx_queues);
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for (i = 0; i < q_vector->rx.count; i++) {
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struct ixgbe_ring *rx_ring = adapter->rx_ring[r_idx];
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ret_itr = ixgbe_update_itr(adapter, q_vector->eitr,
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q_vector->rx.itr,
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rx_ring->total_packets,
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rx_ring->total_bytes);
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/* if the result for this queue would decrease interrupt
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* rate for this vector then use that result */
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q_vector->rx.itr = ((q_vector->rx.itr > ret_itr) ?
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q_vector->rx.itr - 1 : ret_itr);
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r_idx = find_next_bit(q_vector->rx.idx, adapter->num_rx_queues,
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r_idx + 1);
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}
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ixgbe_update_itr(q_vector, &q_vector->tx);
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ixgbe_update_itr(q_vector, &q_vector->rx);
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current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
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@ -1746,16 +1719,17 @@ static void ixgbe_set_itr_msix(struct ixgbe_q_vector *q_vector)
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new_itr = 20000; /* aka hwitr = ~200 */
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break;
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case bulk_latency:
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default:
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new_itr = 8000;
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break;
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default:
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break;
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}
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if (new_itr != q_vector->eitr) {
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/* do an exponential smoothing */
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new_itr = ((q_vector->eitr * 9) + new_itr)/10;
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/* save the algorithm value here, not the smoothed one */
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/* save the algorithm value here */
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q_vector->eitr = new_itr;
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ixgbe_write_eitr(q_vector);
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@ -2001,8 +1975,6 @@ static irqreturn_t ixgbe_msix_clean_tx(int irq, void *data)
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r_idx = find_first_bit(q_vector->tx.idx, adapter->num_tx_queues);
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for (i = 0; i < q_vector->tx.count; i++) {
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tx_ring = adapter->tx_ring[r_idx];
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tx_ring->total_bytes = 0;
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tx_ring->total_packets = 0;
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r_idx = find_next_bit(q_vector->tx.idx, adapter->num_tx_queues,
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r_idx + 1);
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}
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@ -2034,8 +2006,6 @@ static irqreturn_t ixgbe_msix_clean_rx(int irq, void *data)
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r_idx = find_first_bit(q_vector->rx.idx, adapter->num_rx_queues);
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for (i = 0; i < q_vector->rx.count; i++) {
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rx_ring = adapter->rx_ring[r_idx];
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rx_ring->total_bytes = 0;
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rx_ring->total_packets = 0;
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r_idx = find_next_bit(q_vector->rx.idx, adapter->num_rx_queues,
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r_idx + 1);
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}
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@ -2063,8 +2033,6 @@ static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
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r_idx = find_first_bit(q_vector->tx.idx, adapter->num_tx_queues);
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for (i = 0; i < q_vector->tx.count; i++) {
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ring = adapter->tx_ring[r_idx];
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ring->total_bytes = 0;
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ring->total_packets = 0;
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r_idx = find_next_bit(q_vector->tx.idx, adapter->num_tx_queues,
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r_idx + 1);
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}
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@ -2072,8 +2040,6 @@ static irqreturn_t ixgbe_msix_clean_many(int irq, void *data)
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r_idx = find_first_bit(q_vector->rx.idx, adapter->num_rx_queues);
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for (i = 0; i < q_vector->rx.count; i++) {
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ring = adapter->rx_ring[r_idx];
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ring->total_bytes = 0;
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ring->total_packets = 0;
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r_idx = find_next_bit(q_vector->rx.idx, adapter->num_rx_queues,
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r_idx + 1);
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}
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@ -2115,7 +2081,7 @@ static int ixgbe_clean_rxonly(struct napi_struct *napi, int budget)
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if (work_done < budget) {
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napi_complete(napi);
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if (adapter->rx_itr_setting & 1)
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ixgbe_set_itr_msix(q_vector);
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ixgbe_set_itr(q_vector);
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if (!test_bit(__IXGBE_DOWN, &adapter->state))
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ixgbe_irq_enable_queues(adapter,
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((u64)1 << q_vector->v_idx));
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@ -2173,7 +2139,7 @@ static int ixgbe_clean_rxtx_many(struct napi_struct *napi, int budget)
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if (work_done < budget) {
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napi_complete(napi);
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if (adapter->rx_itr_setting & 1)
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ixgbe_set_itr_msix(q_vector);
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ixgbe_set_itr(q_vector);
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if (!test_bit(__IXGBE_DOWN, &adapter->state))
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ixgbe_irq_enable_queues(adapter,
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((u64)1 << q_vector->v_idx));
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@ -2215,7 +2181,7 @@ static int ixgbe_clean_txonly(struct napi_struct *napi, int budget)
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if (work_done < budget) {
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napi_complete(napi);
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if (adapter->tx_itr_setting & 1)
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ixgbe_set_itr_msix(q_vector);
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ixgbe_set_itr(q_vector);
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if (!test_bit(__IXGBE_DOWN, &adapter->state))
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ixgbe_irq_enable_queues(adapter,
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((u64)1 << q_vector->v_idx));
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@ -2244,6 +2210,7 @@ static inline void map_vector_to_txq(struct ixgbe_adapter *a, int v_idx,
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set_bit(t_idx, q_vector->tx.idx);
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q_vector->tx.count++;
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tx_ring->q_vector = q_vector;
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q_vector->tx.work_limit = a->tx_work_limit;
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}
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/**
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@ -2386,51 +2353,6 @@ static int ixgbe_request_msix_irqs(struct ixgbe_adapter *adapter)
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return err;
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}
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static void ixgbe_set_itr(struct ixgbe_adapter *adapter)
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{
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struct ixgbe_q_vector *q_vector = adapter->q_vector[0];
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struct ixgbe_ring *rx_ring = adapter->rx_ring[0];
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struct ixgbe_ring *tx_ring = adapter->tx_ring[0];
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u32 new_itr = q_vector->eitr;
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u8 current_itr;
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q_vector->tx.itr = ixgbe_update_itr(adapter, new_itr,
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q_vector->tx.itr,
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tx_ring->total_packets,
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tx_ring->total_bytes);
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q_vector->rx.itr = ixgbe_update_itr(adapter, new_itr,
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q_vector->rx.itr,
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rx_ring->total_packets,
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rx_ring->total_bytes);
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current_itr = max(q_vector->rx.itr, q_vector->tx.itr);
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switch (current_itr) {
|
||||
/* counts and packets in update_itr are dependent on these numbers */
|
||||
case lowest_latency:
|
||||
new_itr = 100000;
|
||||
break;
|
||||
case low_latency:
|
||||
new_itr = 20000; /* aka hwitr = ~200 */
|
||||
break;
|
||||
case bulk_latency:
|
||||
new_itr = 8000;
|
||||
break;
|
||||
default:
|
||||
break;
|
||||
}
|
||||
|
||||
if (new_itr != q_vector->eitr) {
|
||||
/* do an exponential smoothing */
|
||||
new_itr = ((q_vector->eitr * 9) + new_itr)/10;
|
||||
|
||||
/* save the algorithm value here */
|
||||
q_vector->eitr = new_itr;
|
||||
|
||||
ixgbe_write_eitr(q_vector);
|
||||
}
|
||||
}
|
||||
|
||||
/**
|
||||
* ixgbe_irq_enable - Enable default interrupt generation settings
|
||||
* @adapter: board private structure
|
||||
|
|
@ -2528,10 +2450,6 @@ static irqreturn_t ixgbe_intr(int irq, void *data)
|
|||
ixgbe_check_fan_failure(adapter, eicr);
|
||||
|
||||
if (napi_schedule_prep(&(q_vector->napi))) {
|
||||
adapter->tx_ring[0]->total_packets = 0;
|
||||
adapter->tx_ring[0]->total_bytes = 0;
|
||||
adapter->rx_ring[0]->total_packets = 0;
|
||||
adapter->rx_ring[0]->total_bytes = 0;
|
||||
/* would disable interrupts here but EIAM disabled it */
|
||||
__napi_schedule(&(q_vector->napi));
|
||||
}
|
||||
|
|
@ -4299,7 +4217,7 @@ static int ixgbe_poll(struct napi_struct *napi, int budget)
|
|||
if (work_done < budget) {
|
||||
napi_complete(napi);
|
||||
if (adapter->rx_itr_setting & 1)
|
||||
ixgbe_set_itr(adapter);
|
||||
ixgbe_set_itr(q_vector);
|
||||
if (!test_bit(__IXGBE_DOWN, &adapter->state))
|
||||
ixgbe_irq_enable_queues(adapter, IXGBE_EIMS_RTX_QUEUE);
|
||||
}
|
||||
|
|
@ -5224,6 +5142,9 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
|
|||
adapter->tx_ring_count = IXGBE_DEFAULT_TXD;
|
||||
adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
|
||||
|
||||
/* set default work limits */
|
||||
adapter->tx_work_limit = adapter->tx_ring_count;
|
||||
|
||||
/* initialize eeprom parameters */
|
||||
if (ixgbe_init_eeprom_params_generic(hw)) {
|
||||
e_dev_err("EEPROM initialization failed\n");
|
||||
|
|
@ -5270,7 +5191,6 @@ int ixgbe_setup_tx_resources(struct ixgbe_ring *tx_ring)
|
|||
|
||||
tx_ring->next_to_use = 0;
|
||||
tx_ring->next_to_clean = 0;
|
||||
tx_ring->work_limit = tx_ring->count;
|
||||
return 0;
|
||||
|
||||
err:
|
||||
|
|
|
|||
Loading…
Reference in New Issue