mirror of https://gitee.com/openkylin/linux.git
iio:dac:ad5686: Add AD5691R/AD5692R/AD5693/AD5693R support
The AD5691R/AD5692R/AD5693/AD5693R are a family of one channel DACs with 12-bit, 14-bit and 16-bit precision respectively. The devices have either no built-in reference, or built-in 2.5V reference. These devices are pretty similar to AD5671R/AD5675R and AD5694/AD5694R/AD5695R/AD5696/AD5696R, except that they have one channel. Another difference is that they use a write control register(addr 0x04) for setting the power down modes and the internal reference instead of separate registers for each function. Datasheet: http://www.analog.com/media/en/technical-documentation/data-sheets/AD5693R_5692R_5691R_5693.pdf Signed-off-by: Stefan Popa <stefan.popa@analog.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
This commit is contained in:
Stefan Popa
Jonathan Cameron
parent
ed582db639
commit
be1b24d245
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@ -70,6 +70,8 @@ static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev,
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bool readin;
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int ret;
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struct ad5686_state *st = iio_priv(indio_dev);
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unsigned int val, ref_bit_msk;
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u8 shift;
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ret = strtobool(buf, &readin);
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if (ret)
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@ -80,9 +82,24 @@ static ssize_t ad5686_write_dac_powerdown(struct iio_dev *indio_dev,
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else
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st->pwr_down_mask &= ~(0x3 << (chan->channel * 2));
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ret = st->write(st, AD5686_CMD_POWERDOWN_DAC, 0,
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st->pwr_down_mask & st->pwr_down_mode);
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switch (st->chip_info->regmap_type) {
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case AD5686_REGMAP:
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shift = 0;
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ref_bit_msk = 0;
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break;
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case AD5693_REGMAP:
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shift = 13;
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ref_bit_msk = AD5693_REF_BIT_MSK;
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break;
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default:
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return -EINVAL;
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}
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val = ((st->pwr_down_mask & st->pwr_down_mode) << shift);
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if (!st->use_internal_vref)
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val |= ref_bit_msk;
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ret = st->write(st, AD5686_CMD_POWERDOWN_DAC, 0, val);
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return ret ? ret : len;
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}
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@ -175,6 +192,11 @@ static const struct iio_chan_spec_ext_info ad5686_ext_info[] = {
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.ext_info = ad5686_ext_info, \
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}
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#define DECLARE_AD5693_CHANNELS(name, bits, _shift) \
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static struct iio_chan_spec name[] = { \
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AD5868_CHANNEL(0, 0, bits, _shift), \
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}
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#define DECLARE_AD5686_CHANNELS(name, bits, _shift) \
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static struct iio_chan_spec name[] = { \
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AD5868_CHANNEL(0, 1, bits, _shift), \
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@ -200,72 +222,112 @@ DECLARE_AD5676_CHANNELS(ad5676_channels, 16, 0);
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DECLARE_AD5686_CHANNELS(ad5684_channels, 12, 4);
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DECLARE_AD5686_CHANNELS(ad5685r_channels, 14, 2);
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DECLARE_AD5686_CHANNELS(ad5686_channels, 16, 0);
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DECLARE_AD5693_CHANNELS(ad5693_channels, 16, 0);
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DECLARE_AD5693_CHANNELS(ad5692r_channels, 14, 2);
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DECLARE_AD5693_CHANNELS(ad5691r_channels, 12, 4);
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static const struct ad5686_chip_info ad5686_chip_info_tbl[] = {
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[ID_AD5671R] = {
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.channels = ad5672_channels,
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.int_vref_mv = 2500,
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.num_channels = 8,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5672R] = {
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.channels = ad5672_channels,
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.int_vref_mv = 2500,
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.num_channels = 8,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5675R] = {
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.channels = ad5676_channels,
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.int_vref_mv = 2500,
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.num_channels = 8,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5676] = {
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.channels = ad5676_channels,
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.num_channels = 8,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5676R] = {
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.channels = ad5676_channels,
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.int_vref_mv = 2500,
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.num_channels = 8,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5684] = {
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.channels = ad5684_channels,
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.num_channels = 4,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5684R] = {
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.channels = ad5684_channels,
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.int_vref_mv = 2500,
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.num_channels = 4,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5685R] = {
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.channels = ad5685r_channels,
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.int_vref_mv = 2500,
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.num_channels = 4,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5686] = {
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.channels = ad5686_channels,
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.num_channels = 4,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5686R] = {
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.channels = ad5686_channels,
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.int_vref_mv = 2500,
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.num_channels = 4,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5691R] = {
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.channels = ad5691r_channels,
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.int_vref_mv = 2500,
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.num_channels = 1,
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.regmap_type = AD5693_REGMAP,
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},
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[ID_AD5692R] = {
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.channels = ad5692r_channels,
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.int_vref_mv = 2500,
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.num_channels = 1,
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.regmap_type = AD5693_REGMAP,
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},
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[ID_AD5693] = {
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.channels = ad5693_channels,
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.num_channels = 1,
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.regmap_type = AD5693_REGMAP,
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},
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[ID_AD5693R] = {
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.channels = ad5693_channels,
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.int_vref_mv = 2500,
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.num_channels = 1,
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.regmap_type = AD5693_REGMAP,
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},
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[ID_AD5694] = {
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.channels = ad5684_channels,
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.num_channels = 4,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5694R] = {
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.channels = ad5684_channels,
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.int_vref_mv = 2500,
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.num_channels = 4,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5696] = {
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.channels = ad5686_channels,
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.num_channels = 4,
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.regmap_type = AD5686_REGMAP,
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},
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[ID_AD5696R] = {
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.channels = ad5686_channels,
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.int_vref_mv = 2500,
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.num_channels = 4,
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.regmap_type = AD5686_REGMAP,
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},
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};
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@ -276,7 +338,9 @@ int ad5686_probe(struct device *dev,
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{
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struct ad5686_state *st;
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struct iio_dev *indio_dev;
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int ret, voltage_uv = 0;
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unsigned int val, ref_bit_msk;
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u8 cmd;
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int ret, i, voltage_uv = 0;
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indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
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if (indio_dev == NULL)
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@ -310,7 +374,8 @@ int ad5686_probe(struct device *dev,
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st->vref_mv = st->chip_info->int_vref_mv;
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/* Set all the power down mode for all channels to 1K pulldown */
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st->pwr_down_mode = 0x55;
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for (i = 0; i < st->chip_info->num_channels; i++)
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st->pwr_down_mode |= (0x01 << (i * 2));
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indio_dev->dev.parent = dev;
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indio_dev->name = name;
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@ -319,8 +384,24 @@ int ad5686_probe(struct device *dev,
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indio_dev->channels = st->chip_info->channels;
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indio_dev->num_channels = st->chip_info->num_channels;
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ret = st->write(st, AD5686_CMD_INTERNAL_REFER_SETUP,
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0, !!voltage_uv);
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switch (st->chip_info->regmap_type) {
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case AD5686_REGMAP:
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cmd = AD5686_CMD_INTERNAL_REFER_SETUP;
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ref_bit_msk = 0;
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break;
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case AD5693_REGMAP:
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cmd = AD5686_CMD_CONTROL_REG;
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ref_bit_msk = AD5693_REF_BIT_MSK;
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st->use_internal_vref = !voltage_uv;
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break;
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default:
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ret = -EINVAL;
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goto error_disable_reg;
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}
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val = (voltage_uv | ref_bit_msk);
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ret = st->write(st, cmd, 0, !!val);
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if (ret)
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goto error_disable_reg;
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@ -35,6 +35,9 @@
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#define AD5686_LDAC_PWRDN_100K 0x2
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#define AD5686_LDAC_PWRDN_3STATE 0x3
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#define AD5686_CMD_CONTROL_REG 0x4
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#define AD5693_REF_BIT_MSK BIT(12)
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/**
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* ad5686_supported_device_ids:
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*/
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@ -49,6 +52,10 @@ enum ad5686_supported_device_ids {
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ID_AD5685R,
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ID_AD5686,
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ID_AD5686R,
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ID_AD5691R,
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ID_AD5692R,
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ID_AD5693,
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ID_AD5693R,
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ID_AD5694,
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ID_AD5694R,
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ID_AD5695R,
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@ -56,6 +63,11 @@ enum ad5686_supported_device_ids {
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ID_AD5696R,
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};
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enum ad5686_regmap_type {
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AD5686_REGMAP,
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AD5693_REGMAP
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};
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struct ad5686_state;
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typedef int (*ad5686_write_func)(struct ad5686_state *st,
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@ -68,12 +80,14 @@ typedef int (*ad5686_read_func)(struct ad5686_state *st, u8 addr);
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* @int_vref_mv: AD5620/40/60: the internal reference voltage
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* @num_channels: number of channels
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* @channel: channel specification
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* @regmap_type: register map layout variant
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*/
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struct ad5686_chip_info {
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u16 int_vref_mv;
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unsigned int num_channels;
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struct iio_chan_spec *channels;
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enum ad5686_regmap_type regmap_type;
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};
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/**
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@ -84,6 +98,7 @@ struct ad5686_chip_info {
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* @vref_mv: actual reference voltage used
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* @pwr_down_mask: power down mask
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* @pwr_down_mode: current power down mode
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* @use_internal_vref: set to true if the internal reference voltage is used
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* @data: spi transfer buffers
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*/
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@ -96,6 +111,7 @@ struct ad5686_state {
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unsigned int pwr_down_mode;
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ad5686_write_func write;
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ad5686_read_func read;
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bool use_internal_vref;
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/*
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* DMA (thus cache coherency maintenance) requires the
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@ -1,6 +1,7 @@
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// SPDX-License-Identifier: GPL-2.0+
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/*
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* AD5671R, AD5675R, AD5694, AD5694R, AD5695R, AD5696, AD5696R
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* AD5671R, AD5675R, AD5691R, AD5692R, AD5693, AD5693R,
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* AD5694, AD5694R, AD5695R, AD5696, AD5696R
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* Digital to analog converters driver
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*
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* Copyright 2018 Analog Devices Inc.
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@ -72,6 +73,10 @@ static int ad5686_i2c_remove(struct i2c_client *i2c)
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static const struct i2c_device_id ad5686_i2c_id[] = {
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{"ad5671r", ID_AD5671R},
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{"ad5675r", ID_AD5675R},
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{"ad5691r", ID_AD5691R},
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{"ad5692r", ID_AD5692R},
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{"ad5693", ID_AD5693},
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{"ad5693r", ID_AD5693R},
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{"ad5694", ID_AD5694},
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{"ad5694r", ID_AD5694R},
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{"ad5695r", ID_AD5695R},
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