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[media] omap3isp: Don't access ISP_CTRL directly in the statistics modules 

Use the existing omap3isp_subclk_enable() and omap3isp_subclk_disable()
functions instead.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Sakari Ailus <sakari.ailus@iki.fi>
Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
This commit is contained in:
Laurent Pinchart 2012-05-25 08:35:10 -03:00 committed by Mauro Carvalho Chehab
parent 2f65f467b4
commit be9a1b98f4
5 changed files with 14 additions and 25 deletions
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4
drivers/media/video/omap3isp/isp.c
View File

@ -1281,7 +1281,9 @@ static void __isp_subclk_update(struct isp_device *isp)
{ {
u32 clk = 0; u32 clk = 0;
if (isp->subclk_resources & OMAP3_ISP_SUBCLK_H3A) /* AEWB and AF share the same clock. */
if (isp->subclk_resources &
(OMAP3_ISP_SUBCLK_AEWB | OMAP3_ISP_SUBCLK_AF))
clk |= ISPCTRL_H3A_CLK_EN; clk |= ISPCTRL_H3A_CLK_EN;
if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST) if (isp->subclk_resources & OMAP3_ISP_SUBCLK_HIST)

9
drivers/media/video/omap3isp/isp.h
View File

@ -90,10 +90,11 @@ enum isp_sbl_resource {
enum isp_subclk_resource { enum isp_subclk_resource {
OMAP3_ISP_SUBCLK_CCDC = (1 << 0), OMAP3_ISP_SUBCLK_CCDC = (1 << 0),
OMAP3_ISP_SUBCLK_H3A = (1 << 1), OMAP3_ISP_SUBCLK_AEWB = (1 << 1),
OMAP3_ISP_SUBCLK_HIST = (1 << 2), OMAP3_ISP_SUBCLK_AF = (1 << 2),
OMAP3_ISP_SUBCLK_PREVIEW = (1 << 3), OMAP3_ISP_SUBCLK_HIST = (1 << 3),
OMAP3_ISP_SUBCLK_RESIZER = (1 << 4), OMAP3_ISP_SUBCLK_PREVIEW = (1 << 4),
OMAP3_ISP_SUBCLK_RESIZER = (1 << 5),
}; };
/* ISP: OMAP 34xx ES 1.0 */ /* ISP: OMAP 34xx ES 1.0 */

10
drivers/media/video/omap3isp/isph3a_aewb.c
View File

@ -93,17 +93,11 @@ static void h3a_aewb_enable(struct ispstat *aewb, int enable)
if (enable) { if (enable) {
isp_reg_set(aewb->isp, OMAP3_ISP_IOMEM_H3A, ISPH3A_PCR, isp_reg_set(aewb->isp, OMAP3_ISP_IOMEM_H3A, ISPH3A_PCR,
ISPH3A_PCR_AEW_EN); ISPH3A_PCR_AEW_EN);
/* This bit is already set if AF is enabled */ omap3isp_subclk_enable(aewb->isp, OMAP3_ISP_SUBCLK_AEWB);
if (aewb->isp->isp_af.state != ISPSTAT_ENABLED)
isp_reg_set(aewb->isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
ISPCTRL_H3A_CLK_EN);
} else { } else {
isp_reg_clr(aewb->isp, OMAP3_ISP_IOMEM_H3A, ISPH3A_PCR, isp_reg_clr(aewb->isp, OMAP3_ISP_IOMEM_H3A, ISPH3A_PCR,
ISPH3A_PCR_AEW_EN); ISPH3A_PCR_AEW_EN);
/* This bit can't be cleared if AF is enabled */ omap3isp_subclk_disable(aewb->isp, OMAP3_ISP_SUBCLK_AEWB);
if (aewb->isp->isp_af.state != ISPSTAT_ENABLED)
isp_reg_clr(aewb->isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
ISPCTRL_H3A_CLK_EN);
} }
} }

10
drivers/media/video/omap3isp/isph3a_af.c
View File

@ -143,17 +143,11 @@ static void h3a_af_enable(struct ispstat *af, int enable)
if (enable) { if (enable) {
isp_reg_set(af->isp, OMAP3_ISP_IOMEM_H3A, ISPH3A_PCR, isp_reg_set(af->isp, OMAP3_ISP_IOMEM_H3A, ISPH3A_PCR,
ISPH3A_PCR_AF_EN); ISPH3A_PCR_AF_EN);
/* This bit is already set if AEWB is enabled */ omap3isp_subclk_enable(af->isp, OMAP3_ISP_SUBCLK_AF);
if (af->isp->isp_aewb.state != ISPSTAT_ENABLED)
isp_reg_set(af->isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
ISPCTRL_H3A_CLK_EN);
} else { } else {
isp_reg_clr(af->isp, OMAP3_ISP_IOMEM_H3A, ISPH3A_PCR, isp_reg_clr(af->isp, OMAP3_ISP_IOMEM_H3A, ISPH3A_PCR,
ISPH3A_PCR_AF_EN); ISPH3A_PCR_AF_EN);
/* This bit can't be cleared if AEWB is enabled */ omap3isp_subclk_disable(af->isp, OMAP3_ISP_SUBCLK_AF);
if (af->isp->isp_aewb.state != ISPSTAT_ENABLED)
isp_reg_clr(af->isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL,
ISPCTRL_H3A_CLK_EN);
} }
} }

6
drivers/media/video/omap3isp/isphist.c
View File

@ -167,13 +167,11 @@ static void hist_enable(struct ispstat *hist, int enable)
if (enable) { if (enable) {
isp_reg_set(hist->isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_PCR, isp_reg_set(hist->isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_PCR,
ISPHIST_PCR_ENABLE); ISPHIST_PCR_ENABLE);
isp_reg_set(hist->isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, omap3isp_subclk_enable(hist->isp, OMAP3_ISP_SUBCLK_HIST);
ISPCTRL_HIST_CLK_EN);
} else { } else {
isp_reg_clr(hist->isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_PCR, isp_reg_clr(hist->isp, OMAP3_ISP_IOMEM_HIST, ISPHIST_PCR,
ISPHIST_PCR_ENABLE); ISPHIST_PCR_ENABLE);
isp_reg_clr(hist->isp, OMAP3_ISP_IOMEM_MAIN, ISP_CTRL, omap3isp_subclk_disable(hist->isp, OMAP3_ISP_SUBCLK_HIST);
ISPCTRL_HIST_CLK_EN);
} }
} }