From bfbb92c446700da645e4834fb01439097846ce1e Mon Sep 17 00:00:00 2001 From: Nathan Sullivan Date: Tue, 5 May 2015 15:00:25 -0500 Subject: [PATCH] net: macb: Handle the RXUBR interrupt on all devices The same hardware issue the at91 must work around applies to at least the Zynq ethernet, and possibly more devices. The driver also needs to handle the RXUBR interrupt since it turns it on with MACB_RX_INT_FLAGS anyway. Signed-off-by: Nathan Sullivan Signed-off-by: David S. Miller --- drivers/net/ethernet/cadence/macb.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-) diff --git a/drivers/net/ethernet/cadence/macb.c b/drivers/net/ethernet/cadence/macb.c index 4104d49f005d..61aa570aad9a 100644 --- a/drivers/net/ethernet/cadence/macb.c +++ b/drivers/net/ethernet/cadence/macb.c @@ -981,7 +981,7 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id) struct macb_queue *queue = dev_id; struct macb *bp = queue->bp; struct net_device *dev = bp->dev; - u32 status; + u32 status, ctrl; status = queue_readl(queue, ISR); @@ -1037,6 +1037,15 @@ static irqreturn_t macb_interrupt(int irq, void *dev_id) * add that if/when we get our hands on a full-blown MII PHY. */ + if (status & MACB_BIT(RXUBR)) { + ctrl = macb_readl(bp, NCR); + macb_writel(bp, NCR, ctrl & ~MACB_BIT(RE)); + macb_writel(bp, NCR, ctrl | MACB_BIT(RE)); + + if (bp->caps & MACB_CAPS_ISR_CLEAR_ON_WRITE) + macb_writel(bp, ISR, MACB_BIT(RXUBR)); + } + if (status & MACB_BIT(ISR_ROVR)) { /* We missed at least one packet */ if (macb_is_gem(bp))