mirror of https://gitee.com/openkylin/linux.git
drm/amdgpu: bypass some cleanup work after err_event_athub (v2)
PSP lost connection when err_event_athub occurs. These cleanup work can be skipped in BACO reset. v2: squash in missing include (Alex) Signed-off-by: Le Ma <le.ma@amd.com> Reviewed-by: Hawking Zhang <hawking.zhang@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2271,6 +2271,12 @@ static int amdgpu_device_ip_suspend_phase2(struct amdgpu_device *adev)
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/* displays are handled in phase1 */
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if (adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_DCE)
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continue;
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/* PSP lost connection when err_event_athub occurs */
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if (amdgpu_ras_intr_triggered() &&
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adev->ip_blocks[i].version->type == AMD_IP_BLOCK_TYPE_PSP) {
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adev->ip_blocks[i].status.hw = false;
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continue;
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}
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/* XXX handle errors */
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r = adev->ip_blocks[i].version->funcs->suspend(adev);
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/* XXX handle errors */
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@ -34,6 +34,8 @@
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#include "psp_v11_0.h"
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#include "psp_v12_0.h"
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#include "amdgpu_ras.h"
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static void psp_set_funcs(struct amdgpu_device *adev);
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static int psp_early_init(void *handle)
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@ -167,6 +169,13 @@ psp_cmd_submit_buf(struct psp_context *psp,
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while (*((unsigned int *)psp->fence_buf) != index) {
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if (--timeout == 0)
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break;
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/*
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* Shouldn't wait for timeout when err_event_athub occurs,
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* because gpu reset thread triggered and lock resource should
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* be released for psp resume sequence.
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*/
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if (amdgpu_ras_intr_triggered())
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break;
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msleep(1);
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amdgpu_asic_invalidate_hdp(psp->adev, NULL);
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}
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@ -558,6 +558,7 @@ int amdgpu_ras_feature_enable(struct amdgpu_device *adev,
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if (!(!!enable ^ !!amdgpu_ras_is_feature_enabled(adev, head)))
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return 0;
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if (!amdgpu_ras_intr_triggered()) {
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ret = psp_ras_enable_features(&adev->psp, &info, enable);
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if (ret) {
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DRM_ERROR("RAS ERROR: %s %s feature failed ret %d\n",
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@ -568,6 +569,7 @@ int amdgpu_ras_feature_enable(struct amdgpu_device *adev,
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return -EAGAIN;
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return -EINVAL;
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}
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}
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/* setup the obj */
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__amdgpu_ras_feature_enable(adev, head, enable);
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@ -3736,6 +3736,8 @@ static int gfx_v9_0_hw_fini(void *handle)
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amdgpu_irq_put(adev, &adev->gfx.priv_reg_irq, 0);
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amdgpu_irq_put(adev, &adev->gfx.priv_inst_irq, 0);
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/* DF freeze and kcq disable will fail */
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if (!amdgpu_ras_intr_triggered())
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/* disable KCQ to avoid CPC touch memory not valid anymore */
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gfx_v9_0_kcq_disable(adev);
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