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ASoC: cs4265: Fix setting dai format for Left/Right Justified 

The settings in current code does not match the datasheet, fix it.

DAC Control - Address 03h

DAC Digital Interface Format (Bits 5:4)
        DAC_DIF1 DAC_DIF0 Description
        0        0        Left Justified, up to 24-bit data (default)
        0        1        I²S, up to 24-bit data
        1        0        Right-Justified, 16-bit Data
        1        1        Right-Justified, 24-bit Data

Transmitter Control 2 - Address 12h

Transmitter Digital Interface Format (Bits 7:6)
        Tx_DIF1 Tx_DIF0 Description Format Figure
        0       0       Left Justified, up to 24-bit data (default)
        0       1       I²S, up to 24-bit data
        1       0       Right-Justified, 16-bit Data
        1       1       Right-Justified, 24-bit Data

Signed-off-by: Axel Lin <axel.lin@ingics.com>
Signed-off-by: Mark Brown <broonie@kernel.org>
This commit is contained in:
Axel Lin 2015-07-19 12:09:16 +08:00 committed by Mark Brown
parent bc0195aad0
commit bffc449688
1 changed files with 5 additions and 5 deletions
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10
sound/soc/codecs/cs4265.c
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@ -457,14 +457,14 @@ static int cs4265_pcm_hw_params(struct snd_pcm_substream *substream,
case SND_SOC_DAIFMT_RIGHT_J:
if (params_width(params) == 16) {
snd_soc_update_bits(codec, CS4265_DAC_CTL,
CS4265_DAC_CTL_DIF, (1 << 5));
CS4265_DAC_CTL_DIF, (2 << 4));
snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,
CS4265_SPDIF_CTL2_DIF, (1 << 7));
CS4265_SPDIF_CTL2_DIF, (2 << 6));
} else {
snd_soc_update_bits(codec, CS4265_DAC_CTL,
CS4265_DAC_CTL_DIF, (3 << 5));
CS4265_DAC_CTL_DIF, (3 << 4));
snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,
CS4265_SPDIF_CTL2_DIF, (1 << 7));
CS4265_SPDIF_CTL2_DIF, (3 << 6));
}
break;
case SND_SOC_DAIFMT_LEFT_J:
@ -473,7 +473,7 @@ static int cs4265_pcm_hw_params(struct snd_pcm_substream *substream,
snd_soc_update_bits(codec, CS4265_ADC_CTL,
CS4265_ADC_DIF, 0);
snd_soc_update_bits(codec, CS4265_SPDIF_CTL2,
CS4265_SPDIF_CTL2_DIF, (1 << 6));
CS4265_SPDIF_CTL2_DIF, 0);
break;
default: