mirror of https://gitee.com/openkylin/linux.git
drm/radeon: add initial r500 support.
This contains all the command buffer processing for the r500 cards. It doesn't yet contain vblank support. Signed-off-by: Dave Airlie <airlied@redhat.com>
This commit is contained in:
Dave Airlie
parent
5b92c4045e
commit
c0beb2a723
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@ -189,18 +189,12 @@ void r300_init_reg_flags(struct drm_device *dev)
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ADD_RANGE(R300_RE_CULL_CNTL, 1);
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ADD_RANGE(0x42C0, 2);
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ADD_RANGE(R300_RS_CNTL_0, 2);
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ADD_RANGE(R300_RS_INTERP_0, 8);
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ADD_RANGE(R300_RS_ROUTE_0, 8);
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ADD_RANGE(0x43A4, 2);
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ADD_RANGE(0x43E8, 1);
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ADD_RANGE(R300_PFS_CNTL_0, 3);
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ADD_RANGE(R300_PFS_NODE_0, 4);
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ADD_RANGE(R300_PFS_TEXI_0, 64);
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ADD_RANGE(0x46A4, 5);
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ADD_RANGE(R300_PFS_INSTR0_0, 64);
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ADD_RANGE(R300_PFS_INSTR1_0, 64);
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ADD_RANGE(R300_PFS_INSTR2_0, 64);
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ADD_RANGE(R300_PFS_INSTR3_0, 64);
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ADD_RANGE(R300_RE_FOG_STATE, 1);
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ADD_RANGE(R300_FOG_COLOR_R, 3);
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ADD_RANGE(R300_PP_ALPHA_TEST, 2);
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@ -241,7 +235,25 @@ void r300_init_reg_flags(struct drm_device *dev)
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ADD_RANGE(R300_VAP_INPUT_ROUTE_1_0, 8);
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if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) {
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ADD_RANGE(0x4074, 16);
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ADD_RANGE(R500_VAP_INDEX_OFFSET, 1);
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ADD_RANGE(R500_US_CONFIG, 2);
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ADD_RANGE(R500_US_CODE_ADDR, 3);
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ADD_RANGE(R500_US_FC_CTRL, 1);
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ADD_RANGE(R500_RS_IP_0, 16);
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ADD_RANGE(R500_RS_INST_0, 16);
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ADD_RANGE(R500_RB3D_COLOR_CLEAR_VALUE_AR, 2);
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ADD_RANGE(R500_RB3D_CONSTANT_COLOR_AR, 2);
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} else {
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ADD_RANGE(R300_PFS_CNTL_0, 3);
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ADD_RANGE(R300_PFS_NODE_0, 4);
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ADD_RANGE(R300_PFS_TEXI_0, 64);
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ADD_RANGE(R300_PFS_INSTR0_0, 64);
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ADD_RANGE(R300_PFS_INSTR1_0, 64);
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ADD_RANGE(R300_PFS_INSTR2_0, 64);
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ADD_RANGE(R300_PFS_INSTR3_0, 64);
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ADD_RANGE(R300_RS_INTERP_0, 8);
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ADD_RANGE(R300_RS_ROUTE_0, 8);
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}
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}
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@ -828,6 +840,54 @@ static int r300_scratch(drm_radeon_private_t *dev_priv,
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return 0;
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}
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/**
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* Uploads user-supplied vertex program instructions or parameters onto
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* the graphics card.
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* Called by r300_do_cp_cmdbuf.
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*/
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static inline int r300_emit_r500fp(drm_radeon_private_t *dev_priv,
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drm_radeon_kcmd_buffer_t *cmdbuf,
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drm_r300_cmd_header_t header)
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{
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int sz;
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int addr;
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int type;
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int clamp;
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int stride;
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RING_LOCALS;
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sz = header.r500fp.count;
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/* address is 9 bits 0 - 8, bit 1 of flags is part of address */
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addr = ((header.r500fp.adrhi_flags & 1) << 8) | header.r500fp.adrlo;
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type = !!(header.r500fp.adrhi_flags & R500FP_CONSTANT_TYPE);
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clamp = !!(header.r500fp.adrhi_flags & R500FP_CONSTANT_CLAMP);
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addr |= (type << 16);
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addr |= (clamp << 17);
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stride = type ? 4 : 6;
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DRM_DEBUG("r500fp %d %d type: %d\n", sz, addr, type);
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if (!sz)
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return 0;
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if (sz * stride * 4 > cmdbuf->bufsz)
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return -EINVAL;
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BEGIN_RING(3 + sz * stride);
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OUT_RING_REG(R500_GA_US_VECTOR_INDEX, addr);
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OUT_RING(CP_PACKET0_TABLE(R500_GA_US_VECTOR_DATA, sz * stride - 1));
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OUT_RING_TABLE((int *)cmdbuf->buf, sz * stride);
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ADVANCE_RING();
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cmdbuf->buf += sz * stride * 4;
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cmdbuf->bufsz -= sz * stride * 4;
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return 0;
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}
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/**
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* Parses and validates a user-supplied command buffer and emits appropriate
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* commands on the DMA ring buffer.
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@ -963,6 +1023,19 @@ int r300_do_cp_cmdbuf(struct drm_device *dev,
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}
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break;
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case R300_CMD_R500FP:
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if ((dev_priv->flags & RADEON_FAMILY_MASK) < CHIP_RV515) {
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DRM_ERROR("Calling r500 command on r300 card\n");
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ret = -EINVAL;
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goto cleanup;
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}
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DRM_DEBUG("R300_CMD_R500FP\n");
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ret = r300_emit_r500fp(dev_priv, cmdbuf, header);
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if (ret) {
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DRM_ERROR("r300_emit_r500fp failed\n");
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goto cleanup;
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}
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break;
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default:
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DRM_ERROR("bad cmd_type %i at %p\n",
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header.header.cmd_type,
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@ -1623,4 +1623,20 @@ USE OR OTHER DEALINGS IN THE SOFTWARE.
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*/
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#define R300_CP_CMD_BITBLT_MULTI 0xC0009B00
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#define R500_VAP_INDEX_OFFSET 0x208c
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#define R500_GA_US_VECTOR_INDEX 0x4250
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#define R500_GA_US_VECTOR_DATA 0x4254
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#define R500_RS_IP_0 0x4074
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#define R500_RS_INST_0 0x4320
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#define R500_US_CONFIG 0x4600
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#define R500_US_FC_CTRL 0x4624
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#define R500_US_CODE_ADDR 0x4630
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#define R500_RB3D_COLOR_CLEAR_VALUE_AR 0x46c0
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#define R500_RB3D_CONSTANT_COLOR_AR 0x4ef8
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#endif /* _R300_REG_H */
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@ -240,6 +240,7 @@ typedef union {
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# define R300_NEW_WAIT_2D_2D_CLEAN_3D_3D_CLEAN 0x8
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#define R300_CMD_SCRATCH 8
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#define R300_CMD_R500FP 9
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typedef union {
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unsigned int u;
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@ -268,6 +269,9 @@ typedef union {
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struct {
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unsigned char cmd_type, reg, n_bufs, flags;
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} scratch;
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struct {
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unsigned char cmd_type, count, adrlo, adrhi_flags;
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} r500fp;
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} drm_r300_cmd_header_t;
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#define RADEON_FRONT 0x1
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@ -278,6 +282,9 @@ typedef union {
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#define RADEON_USE_HIERZ 0x40000000
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#define RADEON_USE_COMP_ZBUF 0x20000000
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#define R500FP_CONSTANT_TYPE (1 << 1)
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#define R500FP_CONSTANT_CLAMP (1 << 2)
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/* Primitive types
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*/
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#define RADEON_POINTS 0x1
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@ -38,7 +38,7 @@
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#define DRIVER_NAME "radeon"
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#define DRIVER_DESC "ATI Radeon"
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#define DRIVER_DATE "20060524"
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#define DRIVER_DATE "20080528"
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/* Interface history:
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*
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@ -98,9 +98,10 @@
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* 1.26- Add support for variable size PCI(E) gart aperture
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* 1.27- Add support for IGP GART
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* 1.28- Add support for VBL on CRTC2
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* 1.29- R500 3D cmd buffer support
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*/
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#define DRIVER_MAJOR 1
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#define DRIVER_MINOR 28
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#define DRIVER_MINOR 29
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#define DRIVER_PATCHLEVEL 0
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/*
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@ -294,6 +295,7 @@ typedef struct drm_radeon_private {
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int vblank_crtc;
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uint32_t irq_enable_reg;
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int irq_enabled;
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uint32_t r500_disp_irq_reg;
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struct radeon_surface surfaces[RADEON_MAX_SURFACES];
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struct radeon_virt_surface virt_surfaces[2 * RADEON_MAX_SURFACES];
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@ -1103,6 +1105,31 @@ extern int r300_do_cp_cmdbuf(struct drm_device * dev,
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#define R200_VAP_PVS_CNTL_1 0x22D0
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#define R500_D1CRTC_STATUS 0x609c
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#define R500_D2CRTC_STATUS 0x689c
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#define R500_CRTC_V_BLANK (1<<0)
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#define R500_D1CRTC_FRAME_COUNT 0x60a4
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#define R500_D2CRTC_FRAME_COUNT 0x68a4
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#define R500_D1MODE_V_COUNTER 0x6530
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#define R500_D2MODE_V_COUNTER 0x6d30
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#define R500_D1MODE_VBLANK_STATUS 0x6534
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#define R500_D2MODE_VBLANK_STATUS 0x6d34
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#define R500_VBLANK_OCCURED (1<<0)
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#define R500_VBLANK_ACK (1<<4)
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#define R500_VBLANK_STAT (1<<12)
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#define R500_VBLANK_INT (1<<16)
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#define R500_DxMODE_INT_MASK 0x6540
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#define R500_D1MODE_INT_MASK (1<<0)
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#define R500_D2MODE_INT_MASK (1<<8)
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#define R500_DISP_INTERRUPT_STATUS 0x7edc
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#define R500_D1_VBLANK_INTERRUPT (1 << 4)
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#define R500_D2_VBLANK_INTERRUPT (1 << 5)
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/* Constants */
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#define RADEON_MAX_USEC_TIMEOUT 100000 /* 100 ms */
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