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ARM: dts: exynos: Add audio power domain to Exynos5250 

Audio power domain includes following hardware modules: Pin controller
for GPZ bank, AudioSS clock controller and three Exynos I2S controller.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
This commit is contained in:
Marek Szyprowski 2017-12-08 15:53:55 +01:00 committed by Krzysztof Kozlowski
parent 9fbb4c0963
commit c0d40bb3ac
1 changed files with 12 additions and 0 deletions
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12
arch/arm/boot/dts/exynos5250.dtsi
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@ -136,6 +136,13 @@ pd_disp1: power-domain@100440A0 {
clock-names = "oscclk", "clk0", "clk1";
};
pd_mau: power-domain@100440C0 {
compatible = "samsung,exynos4210-pd";
reg = <0x100440C0 0x20>;
#power-domain-cells = <0>;
label = "MAU";
};
clock: clock-controller@10010000 {
compatible = "samsung,exynos5250-clock";
reg = <0x10010000 0x30000>;
@ -149,6 +156,7 @@ clock_audss: audss-clock-controller@3810000 {
clocks = <&clock CLK_FIN_PLL>, <&clock CLK_FOUT_EPLL>,
<&clock CLK_SCLK_AUDIO0>, <&clock CLK_DIV_PCM0>;
clock-names = "pll_ref", "pll_in", "sclk_audio", "sclk_pcm_in";
power-domains = <&pd_mau>;
};
timer {
@ -223,6 +231,7 @@ pinctrl_3: pinctrl@3860000 {
compatible = "samsung,exynos5250-pinctrl";
reg = <0x03860000 0x1000>;
interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
power-domains = <&pd_mau>;
};
pmu_system_controller: system-controller@10040000 {
@ -486,6 +495,7 @@ &pdma0 9
samsung,idma-addr = <0x03000000>;
pinctrl-names = "default";
pinctrl-0 = <&i2s0_bus>;
power-domains = <&pd_mau>;
};
i2s1: i2s@12D60000 {
@ -499,6 +509,7 @@ i2s1: i2s@12D60000 {
clock-names = "iis", "i2s_opclk0";
pinctrl-names = "default";
pinctrl-0 = <&i2s1_bus>;
power-domains = <&pd_mau>;
};
i2s2: i2s@12D70000 {
@ -512,6 +523,7 @@ i2s2: i2s@12D70000 {
clock-names = "iis", "i2s_opclk0";
pinctrl-names = "default";
pinctrl-0 = <&i2s2_bus>;
power-domains = <&pd_mau>;
};
usb_dwc3 {