mirror of https://gitee.com/openkylin/linux.git
cfi_cmdset_0001: factorize code to wait for flash status
This allows for much better abstraction and separation of the XIP and non-XIP cases with their own specific implementations. This fixes the case where a timeout was tripped on in the XIP case by the code that was meant for the non-XIP case only. This also makes for a nice code reduction. Signed-off-by: Nicolas Pitre <nico@cam.org> CC: "Alexey, Korolev" <alexey.korolev@intel.com> Signed-off-by: David Woodhouse <dwmw2@infradead.org>
This commit is contained in:
Nicolas Pitre
David Woodhouse
parent
6e7a6809c5
commit
c172471b78
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@ -399,7 +399,7 @@ struct mtd_info *cfi_cmdset_0001(struct map_info *map, int primary)
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for (i=0; i< cfi->numchips; i++) {
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cfi->chips[i].word_write_time = 1<<cfi->cfiq->WordWriteTimeoutTyp;
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cfi->chips[i].buffer_write_time = 1<<cfi->cfiq->BufWriteTimeoutTyp;
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cfi->chips[i].erase_time = 1<<cfi->cfiq->BlockEraseTimeoutTyp;
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cfi->chips[i].erase_time = 1000<<cfi->cfiq->BlockEraseTimeoutTyp;
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cfi->chips[i].ref_point_counter = 0;
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init_waitqueue_head(&(cfi->chips[i].wq));
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}
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@ -894,26 +894,33 @@ static void __xipram xip_enable(struct map_info *map, struct flchip *chip,
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/*
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* When a delay is required for the flash operation to complete, the
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* xip_udelay() function is polling for both the given timeout and pending
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* (but still masked) hardware interrupts. Whenever there is an interrupt
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* pending then the flash erase or write operation is suspended, array mode
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* restored and interrupts unmasked. Task scheduling might also happen at that
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* point. The CPU eventually returns from the interrupt or the call to
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* schedule() and the suspended flash operation is resumed for the remaining
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* of the delay period.
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* xip_wait_for_operation() function is polling for both the given timeout
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* and pending (but still masked) hardware interrupts. Whenever there is an
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* interrupt pending then the flash erase or write operation is suspended,
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* array mode restored and interrupts unmasked. Task scheduling might also
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* happen at that point. The CPU eventually returns from the interrupt or
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* the call to schedule() and the suspended flash operation is resumed for
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* the remaining of the delay period.
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*
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* Warning: this function _will_ fool interrupt latency tracing tools.
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*/
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static void __xipram xip_udelay(struct map_info *map, struct flchip *chip,
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unsigned long adr, int usec)
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static int __xipram xip_wait_for_operation(
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struct map_info *map, struct flchip *chip,
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unsigned long adr, int *chip_op_time )
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{
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struct cfi_private *cfi = map->fldrv_priv;
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struct cfi_pri_intelext *cfip = cfi->cmdset_priv;
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map_word status, OK = CMD(0x80);
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unsigned long suspended, start = xip_currtime();
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unsigned long usec, suspended, start, done;
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flstate_t oldstate, newstate;
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start = xip_currtime();
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usec = *chip_op_time * 8;
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if (usec == 0)
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usec = 500000;
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done = 0;
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do {
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cpu_relax();
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if (xip_irqpending() && cfip &&
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@ -930,9 +937,9 @@ static void __xipram xip_udelay(struct map_info *map, struct flchip *chip,
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* we resume the whole thing at once). Yes, it
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* can happen!
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*/
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usec -= done;
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map_write(map, CMD(0xb0), adr);
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map_write(map, CMD(0x70), adr);
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usec -= xip_elapsed_since(start);
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suspended = xip_currtime();
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do {
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if (xip_elapsed_since(suspended) > 100000) {
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@ -942,7 +949,7 @@ static void __xipram xip_udelay(struct map_info *map, struct flchip *chip,
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* This is a critical error but there
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* is not much we can do here.
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*/
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return;
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return -EIO;
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}
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status = map_read(map, adr);
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} while (!map_word_andequal(map, status, OK, OK));
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@ -1002,65 +1009,107 @@ static void __xipram xip_udelay(struct map_info *map, struct flchip *chip,
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xip_cpu_idle();
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}
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status = map_read(map, adr);
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done = xip_elapsed_since(start);
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} while (!map_word_andequal(map, status, OK, OK)
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&& xip_elapsed_since(start) < usec);
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}
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&& done < usec);
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#define UDELAY(map, chip, adr, usec) xip_udelay(map, chip, adr, usec)
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return (done >= usec) ? -ETIME : 0;
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}
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/*
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* The INVALIDATE_CACHED_RANGE() macro is normally used in parallel while
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* the flash is actively programming or erasing since we have to poll for
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* the operation to complete anyway. We can't do that in a generic way with
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* a XIP setup so do it before the actual flash operation in this case
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* and stub it out from INVALIDATE_CACHE_UDELAY.
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* and stub it out from INVAL_CACHE_AND_WAIT.
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*/
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#define XIP_INVAL_CACHED_RANGE(map, from, size) \
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INVALIDATE_CACHED_RANGE(map, from, size)
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#define INVALIDATE_CACHE_UDELAY(map, chip, cmd_adr, adr, len, usec) \
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UDELAY(map, chip, cmd_adr, usec)
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/*
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* Extra notes:
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*
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* Activating this XIP support changes the way the code works a bit. For
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* example the code to suspend the current process when concurrent access
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* happens is never executed because xip_udelay() will always return with the
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* same chip state as it was entered with. This is why there is no care for
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* the presence of add_wait_queue() or schedule() calls from within a couple
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* xip_disable()'d areas of code, like in do_erase_oneblock for example.
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* The queueing and scheduling are always happening within xip_udelay().
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*
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* Similarly, get_chip() and put_chip() just happen to always be executed
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* with chip->state set to FL_READY (or FL_XIP_WHILE_*) where flash state
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* is in array mode, therefore never executing many cases therein and not
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* causing any problem with XIP.
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*/
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#define INVAL_CACHE_AND_WAIT(map, chip, cmd_adr, inval_adr, inval_len, p_usec) \
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xip_wait_for_operation(map, chip, cmd_adr, p_usec)
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#else
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#define xip_disable(map, chip, adr)
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#define xip_enable(map, chip, adr)
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#define XIP_INVAL_CACHED_RANGE(x...)
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#define INVAL_CACHE_AND_WAIT inval_cache_and_wait_for_operation
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#define UDELAY(map, chip, adr, usec) \
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do { \
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spin_unlock(chip->mutex); \
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cfi_udelay(usec); \
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spin_lock(chip->mutex); \
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} while (0)
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static int inval_cache_and_wait_for_operation(
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struct map_info *map, struct flchip *chip,
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unsigned long cmd_adr, unsigned long inval_adr, int inval_len,
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int *chip_op_time )
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{
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struct cfi_private *cfi = map->fldrv_priv;
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map_word status, status_OK = CMD(0x80);
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int z, chip_state = chip->state;
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unsigned long timeo;
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#define INVALIDATE_CACHE_UDELAY(map, chip, cmd_adr, adr, len, usec) \
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do { \
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spin_unlock(chip->mutex); \
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INVALIDATE_CACHED_RANGE(map, adr, len); \
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cfi_udelay(usec); \
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spin_lock(chip->mutex); \
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} while (0)
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spin_unlock(chip->mutex);
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if (inval_len)
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INVALIDATE_CACHED_RANGE(map, inval_adr, inval_len);
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if (*chip_op_time)
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cfi_udelay(*chip_op_time);
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spin_lock(chip->mutex);
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timeo = *chip_op_time * 8 * HZ / 1000000;
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if (timeo < HZ/2)
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timeo = HZ/2;
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timeo += jiffies;
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z = 0;
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for (;;) {
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if (chip->state != chip_state) {
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/* Someone's suspended the operation: sleep */
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DECLARE_WAITQUEUE(wait, current);
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set_current_state(TASK_UNINTERRUPTIBLE);
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add_wait_queue(&chip->wq, &wait);
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spin_unlock(chip->mutex);
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schedule();
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remove_wait_queue(&chip->wq, &wait);
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timeo = jiffies + (HZ / 2); /* FIXME */
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spin_lock(chip->mutex);
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continue;
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}
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status = map_read(map, cmd_adr);
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if (map_word_andequal(map, status, status_OK, status_OK))
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break;
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/* OK Still waiting */
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if (time_after(jiffies, timeo)) {
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map_write(map, CMD(0x70), cmd_adr);
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chip->state = FL_STATUS;
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return -ETIME;
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}
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/* Latency issues. Drop the lock, wait a while and retry */
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z++;
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spin_unlock(chip->mutex);
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cfi_udelay(1);
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spin_lock(chip->mutex);
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}
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if (!z) {
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if (!--(*chip_op_time))
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*chip_op_time = 1;
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} else if (z > 1)
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++(*chip_op_time);
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/* Done and happy. */
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chip->state = FL_STATUS;
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return 0;
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}
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#endif
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#define WAIT_TIMEOUT(map, chip, adr, udelay) \
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({ int __udelay = (udelay); \
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INVAL_CACHE_AND_WAIT(map, chip, adr, 0, 0, &__udelay); })
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static int do_point_onechip (struct map_info *map, struct flchip *chip, loff_t adr, size_t len)
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{
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unsigned long cmd_addr;
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@ -1250,14 +1299,11 @@ static int __xipram do_write_oneword(struct map_info *map, struct flchip *chip,
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unsigned long adr, map_word datum, int mode)
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{
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struct cfi_private *cfi = map->fldrv_priv;
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map_word status, status_OK, write_cmd;
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unsigned long timeo;
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int z, ret=0;
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map_word status, write_cmd;
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int ret=0;
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adr += chip->start;
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/* Let's determine those according to the interleave only once */
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status_OK = CMD(0x80);
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switch (mode) {
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case FL_WRITING:
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write_cmd = (cfi->cfiq->P_ID != 0x0200) ? CMD(0x40) : CMD(0x41);
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@ -1283,57 +1329,17 @@ static int __xipram do_write_oneword(struct map_info *map, struct flchip *chip,
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map_write(map, datum, adr);
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chip->state = mode;
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INVALIDATE_CACHE_UDELAY(map, chip, adr,
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adr, map_bankwidth(map),
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chip->word_write_time);
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timeo = jiffies + (HZ/2);
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z = 0;
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for (;;) {
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if (chip->state != mode) {
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/* Someone's suspended the write. Sleep */
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DECLARE_WAITQUEUE(wait, current);
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set_current_state(TASK_UNINTERRUPTIBLE);
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add_wait_queue(&chip->wq, &wait);
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spin_unlock(chip->mutex);
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schedule();
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remove_wait_queue(&chip->wq, &wait);
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timeo = jiffies + (HZ / 2); /* FIXME */
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spin_lock(chip->mutex);
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continue;
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}
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status = map_read(map, adr);
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if (map_word_andequal(map, status, status_OK, status_OK))
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break;
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/* OK Still waiting */
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if (time_after(jiffies, timeo)) {
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map_write(map, CMD(0x70), adr);
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chip->state = FL_STATUS;
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xip_enable(map, chip, adr);
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printk(KERN_ERR "%s: word write error (status timeout)\n", map->name);
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ret = -EIO;
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goto out;
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}
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/* Latency issues. Drop the lock, wait a while and retry */
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z++;
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UDELAY(map, chip, adr, 1);
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ret = INVAL_CACHE_AND_WAIT(map, chip, adr,
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adr, map_bankwidth(map),
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&chip->word_write_time);
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if (ret) {
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xip_enable(map, chip, adr);
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printk(KERN_ERR "%s: word write error (status timeout)\n", map->name);
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goto out;
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}
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if (!z) {
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chip->word_write_time--;
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if (!chip->word_write_time)
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chip->word_write_time = 1;
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}
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if (z > 1)
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chip->word_write_time++;
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/* Done and happy. */
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chip->state = FL_STATUS;
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/* check for errors */
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status = map_read(map, adr);
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if (map_word_bitsset(map, status, CMD(0x1a))) {
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unsigned long chipstatus = MERGESTATUS(status);
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@ -1450,9 +1456,9 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
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unsigned long *pvec_seek, int len)
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{
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struct cfi_private *cfi = map->fldrv_priv;
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map_word status, status_OK, write_cmd, datum;
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unsigned long cmd_adr, timeo;
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int wbufsize, z, ret=0, word_gap, words;
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map_word status, write_cmd, datum;
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unsigned long cmd_adr;
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int ret, wbufsize, word_gap, words;
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const struct kvec *vec;
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unsigned long vec_seek;
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@ -1461,7 +1467,6 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
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cmd_adr = adr & ~(wbufsize-1);
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/* Let's determine this according to the interleave only once */
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status_OK = CMD(0x80);
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write_cmd = (cfi->cfiq->P_ID != 0x0200) ? CMD(0xe8) : CMD(0xe9);
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spin_lock(chip->mutex);
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@ -1493,32 +1498,20 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
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}
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chip->state = FL_WRITING_TO_BUFFER;
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z = 0;
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for (;;) {
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map_write(map, write_cmd, cmd_adr);
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map_write(map, write_cmd, cmd_adr);
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ret = WAIT_TIMEOUT(map, chip, cmd_adr, 0);
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if (ret) {
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/* Argh. Not ready for write to buffer */
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map_word Xstatus = map_read(map, cmd_adr);
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map_write(map, CMD(0x70), cmd_adr);
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chip->state = FL_STATUS;
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status = map_read(map, cmd_adr);
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if (map_word_andequal(map, status, status_OK, status_OK))
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break;
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UDELAY(map, chip, cmd_adr, 1);
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if (++z > 20) {
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/* Argh. Not ready for write to buffer */
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map_word Xstatus;
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map_write(map, CMD(0x70), cmd_adr);
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chip->state = FL_STATUS;
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Xstatus = map_read(map, cmd_adr);
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/* Odd. Clear status bits */
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map_write(map, CMD(0x50), cmd_adr);
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map_write(map, CMD(0x70), cmd_adr);
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xip_enable(map, chip, cmd_adr);
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printk(KERN_ERR "%s: Chip not ready for buffer write. status = %lx, Xstatus = %lx\n",
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map->name, status.x[0], Xstatus.x[0]);
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ret = -EIO;
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goto out;
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}
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map_write(map, CMD(0x50), cmd_adr);
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map_write(map, CMD(0x70), cmd_adr);
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xip_enable(map, chip, cmd_adr);
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printk(KERN_ERR "%s: Chip not ready for buffer write. Xstatus = %lx, status = %lx\n",
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map->name, Xstatus.x[0], status.x[0]);
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goto out;
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}
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/* Figure out the number of words to write */
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@ -1573,56 +1566,19 @@ static int __xipram do_write_buffer(struct map_info *map, struct flchip *chip,
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map_write(map, CMD(0xd0), cmd_adr);
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chip->state = FL_WRITING;
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INVALIDATE_CACHE_UDELAY(map, chip, cmd_adr,
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adr, len,
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chip->buffer_write_time);
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timeo = jiffies + (HZ/2);
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z = 0;
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for (;;) {
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if (chip->state != FL_WRITING) {
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/* Someone's suspended the write. Sleep */
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DECLARE_WAITQUEUE(wait, current);
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set_current_state(TASK_UNINTERRUPTIBLE);
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add_wait_queue(&chip->wq, &wait);
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spin_unlock(chip->mutex);
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schedule();
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remove_wait_queue(&chip->wq, &wait);
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timeo = jiffies + (HZ / 2); /* FIXME */
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spin_lock(chip->mutex);
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continue;
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}
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status = map_read(map, cmd_adr);
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if (map_word_andequal(map, status, status_OK, status_OK))
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break;
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/* OK Still waiting */
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if (time_after(jiffies, timeo)) {
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map_write(map, CMD(0x70), cmd_adr);
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chip->state = FL_STATUS;
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xip_enable(map, chip, cmd_adr);
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printk(KERN_ERR "%s: buffer write error (status timeout)\n", map->name);
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ret = -EIO;
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goto out;
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}
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/* Latency issues. Drop the lock, wait a while and retry */
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z++;
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UDELAY(map, chip, cmd_adr, 1);
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ret = INVAL_CACHE_AND_WAIT(map, chip, cmd_adr,
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adr, len,
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&chip->buffer_write_time);
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if (ret) {
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map_write(map, CMD(0x70), cmd_adr);
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chip->state = FL_STATUS;
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xip_enable(map, chip, cmd_adr);
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printk(KERN_ERR "%s: buffer write error (status timeout)\n", map->name);
|
||||
goto out;
|
||||
}
|
||||
if (!z) {
|
||||
chip->buffer_write_time--;
|
||||
if (!chip->buffer_write_time)
|
||||
chip->buffer_write_time = 1;
|
||||
}
|
||||
if (z > 1)
|
||||
chip->buffer_write_time++;
|
||||
|
||||
/* Done and happy. */
|
||||
chip->state = FL_STATUS;
|
||||
|
||||
/* check for errors */
|
||||
status = map_read(map, cmd_adr);
|
||||
if (map_word_bitsset(map, status, CMD(0x1a))) {
|
||||
unsigned long chipstatus = MERGESTATUS(status);
|
||||
|
||||
|
|
@ -1718,17 +1674,12 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
|
|||
unsigned long adr, int len, void *thunk)
|
||||
{
|
||||
struct cfi_private *cfi = map->fldrv_priv;
|
||||
map_word status, status_OK;
|
||||
unsigned long timeo;
|
||||
map_word status;
|
||||
int retries = 3;
|
||||
DECLARE_WAITQUEUE(wait, current);
|
||||
int ret = 0;
|
||||
int ret;
|
||||
|
||||
adr += chip->start;
|
||||
|
||||
/* Let's determine this according to the interleave only once */
|
||||
status_OK = CMD(0x80);
|
||||
|
||||
retry:
|
||||
spin_lock(chip->mutex);
|
||||
ret = get_chip(map, chip, adr, FL_ERASING);
|
||||
|
|
@ -1750,48 +1701,15 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
|
|||
chip->state = FL_ERASING;
|
||||
chip->erase_suspended = 0;
|
||||
|
||||
INVALIDATE_CACHE_UDELAY(map, chip, adr,
|
||||
adr, len,
|
||||
chip->erase_time*1000/2);
|
||||
|
||||
/* FIXME. Use a timer to check this, and return immediately. */
|
||||
/* Once the state machine's known to be working I'll do that */
|
||||
|
||||
timeo = jiffies + (HZ*20);
|
||||
for (;;) {
|
||||
if (chip->state != FL_ERASING) {
|
||||
/* Someone's suspended the erase. Sleep */
|
||||
set_current_state(TASK_UNINTERRUPTIBLE);
|
||||
add_wait_queue(&chip->wq, &wait);
|
||||
spin_unlock(chip->mutex);
|
||||
schedule();
|
||||
remove_wait_queue(&chip->wq, &wait);
|
||||
spin_lock(chip->mutex);
|
||||
continue;
|
||||
}
|
||||
if (chip->erase_suspended) {
|
||||
/* This erase was suspended and resumed.
|
||||
Adjust the timeout */
|
||||
timeo = jiffies + (HZ*20); /* FIXME */
|
||||
chip->erase_suspended = 0;
|
||||
}
|
||||
|
||||
status = map_read(map, adr);
|
||||
if (map_word_andequal(map, status, status_OK, status_OK))
|
||||
break;
|
||||
|
||||
/* OK Still waiting */
|
||||
if (time_after(jiffies, timeo)) {
|
||||
map_write(map, CMD(0x70), adr);
|
||||
chip->state = FL_STATUS;
|
||||
xip_enable(map, chip, adr);
|
||||
printk(KERN_ERR "%s: block erase error: (status timeout)\n", map->name);
|
||||
ret = -EIO;
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* Latency issues. Drop the lock, wait a while and retry */
|
||||
UDELAY(map, chip, adr, 1000000/HZ);
|
||||
ret = INVAL_CACHE_AND_WAIT(map, chip, adr,
|
||||
adr, len,
|
||||
&chip->erase_time);
|
||||
if (ret) {
|
||||
map_write(map, CMD(0x70), adr);
|
||||
chip->state = FL_STATUS;
|
||||
xip_enable(map, chip, adr);
|
||||
printk(KERN_ERR "%s: block erase error: (status timeout)\n", map->name);
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* We've broken this before. It doesn't hurt to be safe */
|
||||
|
|
@ -1820,7 +1738,6 @@ static int __xipram do_erase_oneblock(struct map_info *map, struct flchip *chip,
|
|||
ret = -EIO;
|
||||
} else if (chipstatus & 0x20 && retries--) {
|
||||
printk(KERN_DEBUG "block erase failed at 0x%08lx: status 0x%lx. Retrying...\n", adr, chipstatus);
|
||||
timeo = jiffies + HZ;
|
||||
put_chip(map, chip, adr);
|
||||
spin_unlock(chip->mutex);
|
||||
goto retry;
|
||||
|
|
@ -1926,15 +1843,11 @@ static int __xipram do_xxlock_oneblock(struct map_info *map, struct flchip *chip
|
|||
{
|
||||
struct cfi_private *cfi = map->fldrv_priv;
|
||||
struct cfi_pri_intelext *extp = cfi->cmdset_priv;
|
||||
map_word status, status_OK;
|
||||
unsigned long timeo = jiffies + HZ;
|
||||
int udelay;
|
||||
int ret;
|
||||
|
||||
adr += chip->start;
|
||||
|
||||
/* Let's determine this according to the interleave only once */
|
||||
status_OK = CMD(0x80);
|
||||
|
||||
spin_lock(chip->mutex);
|
||||
ret = get_chip(map, chip, adr, FL_LOCKING);
|
||||
if (ret) {
|
||||
|
|
@ -1959,41 +1872,21 @@ static int __xipram do_xxlock_oneblock(struct map_info *map, struct flchip *chip
|
|||
* If Instant Individual Block Locking supported then no need
|
||||
* to delay.
|
||||
*/
|
||||
udelay = (!extp || !(extp->FeatureSupport & (1 << 5))) ? 1000000/HZ : 0;
|
||||
|
||||
if (!extp || !(extp->FeatureSupport & (1 << 5)))
|
||||
UDELAY(map, chip, adr, 1000000/HZ);
|
||||
|
||||
/* FIXME. Use a timer to check this, and return immediately. */
|
||||
/* Once the state machine's known to be working I'll do that */
|
||||
|
||||
timeo = jiffies + (HZ*20);
|
||||
for (;;) {
|
||||
|
||||
status = map_read(map, adr);
|
||||
if (map_word_andequal(map, status, status_OK, status_OK))
|
||||
break;
|
||||
|
||||
/* OK Still waiting */
|
||||
if (time_after(jiffies, timeo)) {
|
||||
map_write(map, CMD(0x70), adr);
|
||||
chip->state = FL_STATUS;
|
||||
xip_enable(map, chip, adr);
|
||||
printk(KERN_ERR "%s: block unlock error: (status timeout)\n", map->name);
|
||||
put_chip(map, chip, adr);
|
||||
spin_unlock(chip->mutex);
|
||||
return -EIO;
|
||||
}
|
||||
|
||||
/* Latency issues. Drop the lock, wait a while and retry */
|
||||
UDELAY(map, chip, adr, 1);
|
||||
ret = WAIT_TIMEOUT(map, chip, adr, udelay);
|
||||
if (ret) {
|
||||
map_write(map, CMD(0x70), adr);
|
||||
chip->state = FL_STATUS;
|
||||
xip_enable(map, chip, adr);
|
||||
printk(KERN_ERR "%s: block unlock error: (status timeout)\n", map->name);
|
||||
goto out;
|
||||
}
|
||||
|
||||
/* Done and happy. */
|
||||
chip->state = FL_STATUS;
|
||||
xip_enable(map, chip, adr);
|
||||
put_chip(map, chip, adr);
|
||||
out: put_chip(map, chip, adr);
|
||||
spin_unlock(chip->mutex);
|
||||
return 0;
|
||||
return ret;
|
||||
}
|
||||
|
||||
static int cfi_intelext_lock(struct mtd_info *mtd, loff_t ofs, size_t len)
|
||||
|
|
|
|||
Loading…
Reference in New Issue