mirror of https://gitee.com/openkylin/linux.git
Merge branch 'sh/evt2irq-migration' into sh-latest
Conflicts: arch/sh/kernel/cpu/sh3/setup-sh770x.c arch/sh/kernel/cpu/sh3/setup-sh7710.c arch/sh/kernel/cpu/sh3/setup-sh7720.c arch/sh/kernel/cpu/sh4/setup-sh7750.c arch/sh/kernel/cpu/sh4a/setup-sh7343.c arch/sh/kernel/cpu/sh4a/setup-sh7366.c arch/sh/kernel/cpu/sh4a/setup-sh7722.c arch/sh/kernel/cpu/sh4a/setup-sh7723.c arch/sh/kernel/cpu/sh4a/setup-sh7724.c arch/sh/kernel/cpu/sh4a/setup-sh7757.c arch/sh/kernel/cpu/sh4a/setup-sh7763.c arch/sh/kernel/cpu/sh4a/setup-sh7770.c arch/sh/kernel/cpu/sh4a/setup-sh7785.c arch/sh/kernel/cpu/sh4a/setup-sh7786.c Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
commit
c1dbccc3c7
|
@ -539,3 +539,13 @@ When: 3.6
|
|||
Why: setitimer is not returning -EFAULT if user pointer is NULL. This
|
||||
violates the spec.
|
||||
Who: Sasikantha Babu <sasikanth.v19@gmail.com>
|
||||
|
||||
----------------------------
|
||||
|
||||
What: V4L2_CID_HCENTER, V4L2_CID_VCENTER V4L2 controls
|
||||
When: 3.7
|
||||
Why: The V4L2_CID_VCENTER, V4L2_CID_HCENTER controls have been deprecated
|
||||
for about 4 years and they are not used by any mainline driver.
|
||||
There are newer controls (V4L2_CID_PAN*, V4L2_CID_TILT*) that provide
|
||||
similar functionality.
|
||||
Who: Sylwester Nawrocki <sylvester.nawrocki@gmail.com>
|
||||
|
|
|
@ -1968,7 +1968,9 @@ S: Maintained
|
|||
F: drivers/net/ethernet/ti/cpmac.c
|
||||
|
||||
CPU FREQUENCY DRIVERS
|
||||
M: Rafael J. Wysocki <rjw@sisk.pl>
|
||||
L: cpufreq@vger.kernel.org
|
||||
L: linux-pm@vger.kernel.org
|
||||
S: Maintained
|
||||
F: drivers/cpufreq/
|
||||
F: include/linux/cpufreq.h
|
||||
|
@ -4034,6 +4036,7 @@ F: Documentation/scsi/53c700.txt
|
|||
F: drivers/scsi/53c700*
|
||||
|
||||
LED SUBSYSTEM
|
||||
M: Bryan Wu <bryan.wu@canonical.com>
|
||||
M: Richard Purdie <rpurdie@rpsys.net>
|
||||
S: Maintained
|
||||
F: drivers/leds/
|
||||
|
|
2
Makefile
2
Makefile
|
@ -1,7 +1,7 @@
|
|||
VERSION = 3
|
||||
PATCHLEVEL = 4
|
||||
SUBLEVEL = 0
|
||||
EXTRAVERSION = -rc6
|
||||
EXTRAVERSION = -rc7
|
||||
NAME = Saber-toothed Squirrel
|
||||
|
||||
# *DOCUMENTATION*
|
||||
|
|
|
@ -232,6 +232,9 @@ config MACH_ARMLEX4210
|
|||
config MACH_UNIVERSAL_C210
|
||||
bool "Mobile UNIVERSAL_C210 Board"
|
||||
select CPU_EXYNOS4210
|
||||
select S5P_HRT
|
||||
select CLKSRC_MMIO
|
||||
select HAVE_SCHED_CLOCK
|
||||
select S5P_GPIO_INT
|
||||
select S5P_DEV_FIMC0
|
||||
select S5P_DEV_FIMC1
|
||||
|
|
|
@ -678,7 +678,7 @@ static struct clk exynos5_clk_pdma1 = {
|
|||
.name = "dma",
|
||||
.devname = "dma-pl330.1",
|
||||
.enable = exynos5_clk_ip_fsys_ctrl,
|
||||
.ctrlbit = (1 << 1),
|
||||
.ctrlbit = (1 << 2),
|
||||
};
|
||||
|
||||
static struct clk exynos5_clk_mdma1 = {
|
||||
|
|
|
@ -40,6 +40,7 @@
|
|||
#include <plat/pd.h>
|
||||
#include <plat/regs-fb-v4.h>
|
||||
#include <plat/fimc-core.h>
|
||||
#include <plat/s5p-time.h>
|
||||
#include <plat/camport.h>
|
||||
#include <plat/mipi_csis.h>
|
||||
|
||||
|
@ -1063,6 +1064,7 @@ static void __init universal_map_io(void)
|
|||
exynos_init_io(NULL, 0);
|
||||
s3c24xx_init_clocks(24000000);
|
||||
s3c24xx_init_uarts(universal_uartcfgs, ARRAY_SIZE(universal_uartcfgs));
|
||||
s5p_set_timer_source(S5P_PWM2, S5P_PWM4);
|
||||
}
|
||||
|
||||
static void s5p_tv_setup(void)
|
||||
|
@ -1113,7 +1115,7 @@ MACHINE_START(UNIVERSAL_C210, "UNIVERSAL_C210")
|
|||
.map_io = universal_map_io,
|
||||
.handle_irq = gic_handle_irq,
|
||||
.init_machine = universal_machine_init,
|
||||
.timer = &exynos4_timer,
|
||||
.timer = &s5p_timer,
|
||||
.reserve = &universal_reserve,
|
||||
.restart = exynos4_restart,
|
||||
MACHINE_END
|
||||
|
|
|
@ -42,7 +42,8 @@ sirfsoc_alloc_gc(void __iomem *base, unsigned int irq_start, unsigned int num)
|
|||
static __init void sirfsoc_irq_init(void)
|
||||
{
|
||||
sirfsoc_alloc_gc(sirfsoc_intc_base, 0, 32);
|
||||
sirfsoc_alloc_gc(sirfsoc_intc_base + 4, 32, SIRFSOC_INTENAL_IRQ_END - 32);
|
||||
sirfsoc_alloc_gc(sirfsoc_intc_base + 4, 32,
|
||||
SIRFSOC_INTENAL_IRQ_END + 1 - 32);
|
||||
|
||||
writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_LEVEL0);
|
||||
writel_relaxed(0, sirfsoc_intc_base + SIRFSOC_INT_RISC_LEVEL1);
|
||||
|
@ -68,7 +69,8 @@ void __init sirfsoc_of_irq_init(void)
|
|||
if (!sirfsoc_intc_base)
|
||||
panic("unable to map intc cpu registers\n");
|
||||
|
||||
irq_domain_add_legacy(np, 32, 0, 0, &irq_domain_simple_ops, NULL);
|
||||
irq_domain_add_legacy(np, SIRFSOC_INTENAL_IRQ_END + 1, 0, 0,
|
||||
&irq_domain_simple_ops, NULL);
|
||||
|
||||
of_node_put(np);
|
||||
|
||||
|
|
|
@ -365,23 +365,13 @@ static struct platform_device mipidsi0_device = {
|
|||
};
|
||||
|
||||
/* SDHI0 */
|
||||
static irqreturn_t ag5evm_sdhi0_gpio_cd(int irq, void *arg)
|
||||
{
|
||||
struct device *dev = arg;
|
||||
struct sh_mobile_sdhi_info *info = dev->platform_data;
|
||||
struct tmio_mmc_data *pdata = info->pdata;
|
||||
|
||||
tmio_mmc_cd_wakeup(pdata);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static struct sh_mobile_sdhi_info sdhi0_info = {
|
||||
.dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
|
||||
.dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
|
||||
.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT,
|
||||
.tmio_flags = TMIO_MMC_HAS_IDLE_WAIT | TMIO_MMC_USE_GPIO_CD,
|
||||
.tmio_caps = MMC_CAP_SD_HIGHSPEED,
|
||||
.tmio_ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
|
||||
.cd_gpio = GPIO_PORT251,
|
||||
};
|
||||
|
||||
static struct resource sdhi0_resources[] = {
|
||||
|
@ -557,7 +547,6 @@ static void __init ag5evm_init(void)
|
|||
lcd_backlight_reset();
|
||||
|
||||
/* enable SDHI0 on CN15 [SD I/F] */
|
||||
gpio_request(GPIO_FN_SDHICD0, NULL);
|
||||
gpio_request(GPIO_FN_SDHIWP0, NULL);
|
||||
gpio_request(GPIO_FN_SDHICMD0, NULL);
|
||||
gpio_request(GPIO_FN_SDHICLK0, NULL);
|
||||
|
@ -566,13 +555,6 @@ static void __init ag5evm_init(void)
|
|||
gpio_request(GPIO_FN_SDHID0_1, NULL);
|
||||
gpio_request(GPIO_FN_SDHID0_0, NULL);
|
||||
|
||||
if (!request_irq(intcs_evt2irq(0x3c0), ag5evm_sdhi0_gpio_cd,
|
||||
IRQF_TRIGGER_FALLING | IRQF_TRIGGER_RISING,
|
||||
"sdhi0 cd", &sdhi0_device.dev))
|
||||
sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD;
|
||||
else
|
||||
pr_warn("Unable to setup SDHI0 GPIO IRQ\n");
|
||||
|
||||
/* enable SDHI1 on CN4 [WLAN I/F] */
|
||||
gpio_request(GPIO_FN_SDHICLK1, NULL);
|
||||
gpio_request(GPIO_FN_SDHICMD1_PU, NULL);
|
||||
|
|
|
@ -1011,21 +1011,12 @@ static int slot_cn7_get_cd(struct platform_device *pdev)
|
|||
}
|
||||
|
||||
/* SDHI0 */
|
||||
static irqreturn_t mackerel_sdhi0_gpio_cd(int irq, void *arg)
|
||||
{
|
||||
struct device *dev = arg;
|
||||
struct sh_mobile_sdhi_info *info = dev->platform_data;
|
||||
struct tmio_mmc_data *pdata = info->pdata;
|
||||
|
||||
tmio_mmc_cd_wakeup(pdata);
|
||||
|
||||
return IRQ_HANDLED;
|
||||
}
|
||||
|
||||
static struct sh_mobile_sdhi_info sdhi0_info = {
|
||||
.dma_slave_tx = SHDMA_SLAVE_SDHI0_TX,
|
||||
.dma_slave_rx = SHDMA_SLAVE_SDHI0_RX,
|
||||
.tmio_flags = TMIO_MMC_USE_GPIO_CD,
|
||||
.tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ,
|
||||
.cd_gpio = GPIO_PORT172,
|
||||
};
|
||||
|
||||
static struct resource sdhi0_resources[] = {
|
||||
|
@ -1384,7 +1375,6 @@ static void __init mackerel_init(void)
|
|||
{
|
||||
u32 srcr4;
|
||||
struct clk *clk;
|
||||
int ret;
|
||||
|
||||
/* External clock source */
|
||||
clk_set_rate(&sh7372_dv_clki_clk, 27000000);
|
||||
|
@ -1481,7 +1471,6 @@ static void __init mackerel_init(void)
|
|||
irq_set_irq_type(IRQ21, IRQ_TYPE_LEVEL_HIGH);
|
||||
|
||||
/* enable SDHI0 */
|
||||
gpio_request(GPIO_FN_SDHICD0, NULL);
|
||||
gpio_request(GPIO_FN_SDHIWP0, NULL);
|
||||
gpio_request(GPIO_FN_SDHICMD0, NULL);
|
||||
gpio_request(GPIO_FN_SDHICLK0, NULL);
|
||||
|
@ -1490,13 +1479,6 @@ static void __init mackerel_init(void)
|
|||
gpio_request(GPIO_FN_SDHID0_1, NULL);
|
||||
gpio_request(GPIO_FN_SDHID0_0, NULL);
|
||||
|
||||
ret = request_irq(evt2irq(0x3340), mackerel_sdhi0_gpio_cd,
|
||||
IRQF_TRIGGER_FALLING, "sdhi0 cd", &sdhi0_device.dev);
|
||||
if (!ret)
|
||||
sdhi0_info.tmio_flags |= TMIO_MMC_HAS_COLD_CD;
|
||||
else
|
||||
pr_err("Cannot get IRQ #%d: %d\n", evt2irq(0x3340), ret);
|
||||
|
||||
#if !defined(CONFIG_MMC_SH_MMCIF) && !defined(CONFIG_MMC_SH_MMCIF_MODULE)
|
||||
/* enable SDHI1 */
|
||||
gpio_request(GPIO_FN_SDHICMD1, NULL);
|
||||
|
|
|
@ -16,6 +16,59 @@
|
|||
|
||||
__CPUINIT
|
||||
|
||||
/* Cache invalidation nicked from arch/arm/mach-imx/head-v7.S, thanks!
|
||||
*
|
||||
* The secondary kernel init calls v7_flush_dcache_all before it enables
|
||||
* the L1; however, the L1 comes out of reset in an undefined state, so
|
||||
* the clean + invalidate performed by v7_flush_dcache_all causes a bunch
|
||||
* of cache lines with uninitialized data and uninitialized tags to get
|
||||
* written out to memory, which does really unpleasant things to the main
|
||||
* processor. We fix this by performing an invalidate, rather than a
|
||||
* clean + invalidate, before jumping into the kernel.
|
||||
*
|
||||
* This funciton is cloned from arch/arm/mach-tegra/headsmp.S, and needs
|
||||
* to be called for both secondary cores startup and primary core resume
|
||||
* procedures. Ideally, it should be moved into arch/arm/mm/cache-v7.S.
|
||||
*/
|
||||
ENTRY(v7_invalidate_l1)
|
||||
mov r0, #0
|
||||
mcr p15, 0, r0, c7, c5, 0 @ invalidate I cache
|
||||
mcr p15, 2, r0, c0, c0, 0
|
||||
mrc p15, 1, r0, c0, c0, 0
|
||||
|
||||
ldr r1, =0x7fff
|
||||
and r2, r1, r0, lsr #13
|
||||
|
||||
ldr r1, =0x3ff
|
||||
|
||||
and r3, r1, r0, lsr #3 @ NumWays - 1
|
||||
add r2, r2, #1 @ NumSets
|
||||
|
||||
and r0, r0, #0x7
|
||||
add r0, r0, #4 @ SetShift
|
||||
|
||||
clz r1, r3 @ WayShift
|
||||
add r4, r3, #1 @ NumWays
|
||||
1: sub r2, r2, #1 @ NumSets--
|
||||
mov r3, r4 @ Temp = NumWays
|
||||
2: subs r3, r3, #1 @ Temp--
|
||||
mov r5, r3, lsl r1
|
||||
mov r6, r2, lsl r0
|
||||
orr r5, r5, r6 @ Reg = (Temp<<WayShift)|(NumSets<<SetShift)
|
||||
mcr p15, 0, r5, c7, c6, 2
|
||||
bgt 2b
|
||||
cmp r2, #0
|
||||
bgt 1b
|
||||
dsb
|
||||
isb
|
||||
mov pc, lr
|
||||
ENDPROC(v7_invalidate_l1)
|
||||
|
||||
ENTRY(shmobile_invalidate_start)
|
||||
bl v7_invalidate_l1
|
||||
b secondary_startup
|
||||
ENDPROC(shmobile_invalidate_start)
|
||||
|
||||
/*
|
||||
* Reset vector for secondary CPUs.
|
||||
* This will be mapped at address 0 by SBAR register.
|
||||
|
@ -24,4 +77,5 @@
|
|||
.align 12
|
||||
ENTRY(shmobile_secondary_vector)
|
||||
ldr pc, 1f
|
||||
1: .long secondary_startup - PAGE_OFFSET + PLAT_PHYS_OFFSET
|
||||
1: .long shmobile_invalidate_start - PAGE_OFFSET + PLAT_PHYS_OFFSET
|
||||
ENDPROC(shmobile_secondary_vector)
|
||||
|
|
|
@ -4,7 +4,6 @@
|
|||
extern void shmobile_earlytimer_init(void);
|
||||
extern struct sys_timer shmobile_timer;
|
||||
struct twd_local_timer;
|
||||
void shmobile_twd_init(struct twd_local_timer *twd_local_timer);
|
||||
extern void shmobile_setup_console(void);
|
||||
extern void shmobile_secondary_vector(void);
|
||||
extern int shmobile_platform_cpu_kill(unsigned int cpu);
|
||||
|
@ -82,5 +81,6 @@ extern int r8a7779_platform_cpu_kill(unsigned int cpu);
|
|||
extern void r8a7779_secondary_init(unsigned int cpu);
|
||||
extern int r8a7779_boot_secondary(unsigned int cpu);
|
||||
extern void r8a7779_smp_prepare_cpus(void);
|
||||
extern void r8a7779_register_twd(void);
|
||||
|
||||
#endif /* __ARCH_MACH_COMMON_H */
|
||||
|
|
|
@ -262,10 +262,14 @@ void __init r8a7779_add_standard_devices(void)
|
|||
ARRAY_SIZE(r8a7779_late_devices));
|
||||
}
|
||||
|
||||
/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
|
||||
void __init __weak r8a7779_register_twd(void) { }
|
||||
|
||||
static void __init r8a7779_earlytimer_init(void)
|
||||
{
|
||||
r8a7779_clock_init();
|
||||
shmobile_earlytimer_init();
|
||||
r8a7779_register_twd();
|
||||
}
|
||||
|
||||
void __init r8a7779_add_early_devices(void)
|
||||
|
|
|
@ -688,10 +688,14 @@ void __init sh73a0_add_standard_devices(void)
|
|||
ARRAY_SIZE(sh73a0_late_devices));
|
||||
}
|
||||
|
||||
/* do nothing for !CONFIG_SMP or !CONFIG_HAVE_TWD */
|
||||
void __init __weak sh73a0_register_twd(void) { }
|
||||
|
||||
static void __init sh73a0_earlytimer_init(void)
|
||||
{
|
||||
sh73a0_clock_init();
|
||||
shmobile_earlytimer_init();
|
||||
sh73a0_register_twd();
|
||||
}
|
||||
|
||||
void __init sh73a0_add_early_devices(void)
|
||||
|
|
|
@ -64,8 +64,15 @@ static void __iomem *scu_base_addr(void)
|
|||
static DEFINE_SPINLOCK(scu_lock);
|
||||
static unsigned long tmp;
|
||||
|
||||
#ifdef CONFIG_HAVE_ARM_TWD
|
||||
static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);
|
||||
|
||||
void __init r8a7779_register_twd(void)
|
||||
{
|
||||
twd_local_timer_register(&twd_local_timer);
|
||||
}
|
||||
#endif
|
||||
|
||||
static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
|
||||
{
|
||||
void __iomem *scu_base = scu_base_addr();
|
||||
|
@ -84,7 +91,6 @@ unsigned int __init r8a7779_get_core_count(void)
|
|||
{
|
||||
void __iomem *scu_base = scu_base_addr();
|
||||
|
||||
shmobile_twd_init(&twd_local_timer);
|
||||
return scu_get_core_count(scu_base);
|
||||
}
|
||||
|
||||
|
|
|
@ -42,7 +42,13 @@ static void __iomem *scu_base_addr(void)
|
|||
static DEFINE_SPINLOCK(scu_lock);
|
||||
static unsigned long tmp;
|
||||
|
||||
#ifdef CONFIG_HAVE_ARM_TWD
|
||||
static DEFINE_TWD_LOCAL_TIMER(twd_local_timer, 0xf0000600, 29);
|
||||
void __init sh73a0_register_twd(void)
|
||||
{
|
||||
twd_local_timer_register(&twd_local_timer);
|
||||
}
|
||||
#endif
|
||||
|
||||
static void modify_scu_cpu_psr(unsigned long set, unsigned long clr)
|
||||
{
|
||||
|
@ -62,7 +68,6 @@ unsigned int __init sh73a0_get_core_count(void)
|
|||
{
|
||||
void __iomem *scu_base = scu_base_addr();
|
||||
|
||||
shmobile_twd_init(&twd_local_timer);
|
||||
return scu_get_core_count(scu_base);
|
||||
}
|
||||
|
||||
|
|
|
@ -46,15 +46,6 @@ static void __init shmobile_timer_init(void)
|
|||
{
|
||||
}
|
||||
|
||||
void __init shmobile_twd_init(struct twd_local_timer *twd_local_timer)
|
||||
{
|
||||
#ifdef CONFIG_HAVE_ARM_TWD
|
||||
int err = twd_local_timer_register(twd_local_timer);
|
||||
if (err)
|
||||
pr_err("twd_local_timer_register failed %d\n", err);
|
||||
#endif
|
||||
}
|
||||
|
||||
struct sys_timer shmobile_timer = {
|
||||
.init = shmobile_timer_init,
|
||||
};
|
||||
|
|
|
@ -53,10 +53,10 @@ static void flowctrl_update(u8 offset, u32 value)
|
|||
|
||||
void flowctrl_write_cpu_csr(unsigned int cpuid, u32 value)
|
||||
{
|
||||
return flowctrl_update(flowctrl_offset_halt_cpu[cpuid], value);
|
||||
return flowctrl_update(flowctrl_offset_cpu_csr[cpuid], value);
|
||||
}
|
||||
|
||||
void flowctrl_write_cpu_halt(unsigned int cpuid, u32 value)
|
||||
{
|
||||
return flowctrl_update(flowctrl_offset_cpu_csr[cpuid], value);
|
||||
return flowctrl_update(flowctrl_offset_halt_cpu[cpuid], value);
|
||||
}
|
||||
|
|
|
@ -247,7 +247,9 @@ __do_page_fault(struct mm_struct *mm, unsigned long addr, unsigned int fsr,
|
|||
return handle_mm_fault(mm, vma, addr & PAGE_MASK, flags);
|
||||
|
||||
check_stack:
|
||||
if (vma->vm_flags & VM_GROWSDOWN && !expand_stack(vma, addr))
|
||||
/* Don't allow expansion below FIRST_USER_ADDRESS */
|
||||
if (vma->vm_flags & VM_GROWSDOWN &&
|
||||
addr >= FIRST_USER_ADDRESS && !expand_stack(vma, addr))
|
||||
goto good_area;
|
||||
out:
|
||||
return fault;
|
||||
|
|
|
@ -489,7 +489,8 @@ static void __init build_mem_type_table(void)
|
|||
*/
|
||||
for (i = 0; i < ARRAY_SIZE(mem_types); i++) {
|
||||
mem_types[i].prot_pte |= PTE_EXT_AF;
|
||||
mem_types[i].prot_sect |= PMD_SECT_AF;
|
||||
if (mem_types[i].prot_sect)
|
||||
mem_types[i].prot_sect |= PMD_SECT_AF;
|
||||
}
|
||||
kern_pgprot |= PTE_EXT_AF;
|
||||
vecs_pgprot |= PTE_EXT_AF;
|
||||
|
|
|
@ -11,6 +11,7 @@
|
|||
#include <linux/types.h>
|
||||
#include <linux/cpu.h>
|
||||
#include <linux/cpu_pm.h>
|
||||
#include <linux/hardirq.h>
|
||||
#include <linux/kernel.h>
|
||||
#include <linux/notifier.h>
|
||||
#include <linux/signal.h>
|
||||
|
@ -432,7 +433,10 @@ void VFP_bounce(u32 trigger, u32 fpexc, struct pt_regs *regs)
|
|||
|
||||
static void vfp_enable(void *unused)
|
||||
{
|
||||
u32 access = get_copro_access();
|
||||
u32 access;
|
||||
|
||||
BUG_ON(preemptible());
|
||||
access = get_copro_access();
|
||||
|
||||
/*
|
||||
* Enable full access to VFP (cp10 and cp11)
|
||||
|
@ -573,12 +577,6 @@ int vfp_preserve_user_clear_hwstate(struct user_vfp __user *ufp,
|
|||
* entry.
|
||||
*/
|
||||
hwstate->fpscr &= ~(FPSCR_LENGTH_MASK | FPSCR_STRIDE_MASK);
|
||||
|
||||
/*
|
||||
* Disable VFP in the hwstate so that we can detect if it gets
|
||||
* used.
|
||||
*/
|
||||
hwstate->fpexc &= ~FPEXC_EN;
|
||||
return 0;
|
||||
}
|
||||
|
||||
|
@ -591,12 +589,8 @@ int vfp_restore_user_hwstate(struct user_vfp __user *ufp,
|
|||
unsigned long fpexc;
|
||||
int err = 0;
|
||||
|
||||
/*
|
||||
* If VFP has been used, then disable it to avoid corrupting
|
||||
* the new thread state.
|
||||
*/
|
||||
if (hwstate->fpexc & FPEXC_EN)
|
||||
vfp_flush_hwstate(thread);
|
||||
/* Disable VFP to avoid corrupting the new thread state. */
|
||||
vfp_flush_hwstate(thread);
|
||||
|
||||
/*
|
||||
* Copy the floating point registers. There can be unused
|
||||
|
@ -657,7 +651,7 @@ static int __init vfp_init(void)
|
|||
unsigned int cpu_arch = cpu_architecture();
|
||||
|
||||
if (cpu_arch >= CPU_ARCH_ARMv6)
|
||||
vfp_enable(NULL);
|
||||
on_each_cpu(vfp_enable, NULL, 1);
|
||||
|
||||
/*
|
||||
* First check that there is a VFP that we can use.
|
||||
|
@ -678,8 +672,6 @@ static int __init vfp_init(void)
|
|||
} else {
|
||||
hotcpu_notifier(vfp_hotplug, 0);
|
||||
|
||||
smp_call_function(vfp_enable, NULL, 1);
|
||||
|
||||
VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; /* Extract the architecture version */
|
||||
printk("implementor %02x architecture %d part %02x variant %x rev %x\n",
|
||||
(vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT,
|
||||
|
|
|
@ -22,7 +22,7 @@
|
|||
|
||||
/***************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SPI_COLDFIRE_QSPI
|
||||
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
|
||||
|
||||
static void __init m520x_qspi_init(void)
|
||||
{
|
||||
|
@ -35,7 +35,7 @@ static void __init m520x_qspi_init(void)
|
|||
writew(par, MCF_GPIO_PAR_UART);
|
||||
}
|
||||
|
||||
#endif /* CONFIG_SPI_COLDFIRE_QSPI */
|
||||
#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
|
||||
|
||||
/***************************************************************************/
|
||||
|
||||
|
@ -79,7 +79,7 @@ void __init config_BSP(char *commandp, int size)
|
|||
mach_sched_init = hw_timer_init;
|
||||
m520x_uarts_init();
|
||||
m520x_fec_init();
|
||||
#ifdef CONFIG_SPI_COLDFIRE_QSPI
|
||||
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
|
||||
m520x_qspi_init();
|
||||
#endif
|
||||
}
|
||||
|
|
|
@ -22,7 +22,7 @@
|
|||
|
||||
/***************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SPI_COLDFIRE_QSPI
|
||||
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
|
||||
|
||||
static void __init m523x_qspi_init(void)
|
||||
{
|
||||
|
@ -36,7 +36,7 @@ static void __init m523x_qspi_init(void)
|
|||
writew(par, MCFGPIO_PAR_TIMER);
|
||||
}
|
||||
|
||||
#endif /* CONFIG_SPI_COLDFIRE_QSPI */
|
||||
#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
|
||||
|
||||
/***************************************************************************/
|
||||
|
||||
|
@ -58,7 +58,7 @@ void __init config_BSP(char *commandp, int size)
|
|||
{
|
||||
mach_sched_init = hw_timer_init;
|
||||
m523x_fec_init();
|
||||
#ifdef CONFIG_SPI_COLDFIRE_QSPI
|
||||
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
|
||||
m523x_qspi_init();
|
||||
#endif
|
||||
}
|
||||
|
|
|
@ -51,7 +51,7 @@ static struct platform_device *m5249_devices[] __initdata = {
|
|||
|
||||
/***************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SPI_COLDFIRE_QSPI
|
||||
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
|
||||
|
||||
static void __init m5249_qspi_init(void)
|
||||
{
|
||||
|
@ -61,7 +61,7 @@ static void __init m5249_qspi_init(void)
|
|||
mcf_mapirq2imr(MCF_IRQ_QSPI, MCFINTC_QSPI);
|
||||
}
|
||||
|
||||
#endif /* CONFIG_SPI_COLDFIRE_QSPI */
|
||||
#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
|
||||
|
||||
/***************************************************************************/
|
||||
|
||||
|
@ -90,7 +90,7 @@ void __init config_BSP(char *commandp, int size)
|
|||
#ifdef CONFIG_M5249C3
|
||||
m5249_smc91x_init();
|
||||
#endif
|
||||
#ifdef CONFIG_SPI_COLDFIRE_QSPI
|
||||
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
|
||||
m5249_qspi_init();
|
||||
#endif
|
||||
}
|
||||
|
|
|
@ -23,7 +23,7 @@
|
|||
|
||||
/***************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SPI_COLDFIRE_QSPI
|
||||
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
|
||||
|
||||
static void __init m527x_qspi_init(void)
|
||||
{
|
||||
|
@ -42,7 +42,7 @@ static void __init m527x_qspi_init(void)
|
|||
#endif
|
||||
}
|
||||
|
||||
#endif /* CONFIG_SPI_COLDFIRE_QSPI */
|
||||
#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
|
||||
|
||||
/***************************************************************************/
|
||||
|
||||
|
@ -90,7 +90,7 @@ void __init config_BSP(char *commandp, int size)
|
|||
mach_sched_init = hw_timer_init;
|
||||
m527x_uarts_init();
|
||||
m527x_fec_init();
|
||||
#ifdef CONFIG_SPI_COLDFIRE_QSPI
|
||||
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
|
||||
m527x_qspi_init();
|
||||
#endif
|
||||
}
|
||||
|
|
|
@ -24,7 +24,7 @@
|
|||
|
||||
/***************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SPI_COLDFIRE_QSPI
|
||||
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
|
||||
|
||||
static void __init m528x_qspi_init(void)
|
||||
{
|
||||
|
@ -32,7 +32,7 @@ static void __init m528x_qspi_init(void)
|
|||
__raw_writeb(0x07, MCFGPIO_PQSPAR);
|
||||
}
|
||||
|
||||
#endif /* CONFIG_SPI_COLDFIRE_QSPI */
|
||||
#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
|
||||
|
||||
/***************************************************************************/
|
||||
|
||||
|
@ -98,7 +98,7 @@ void __init config_BSP(char *commandp, int size)
|
|||
mach_sched_init = hw_timer_init;
|
||||
m528x_uarts_init();
|
||||
m528x_fec_init();
|
||||
#ifdef CONFIG_SPI_COLDFIRE_QSPI
|
||||
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
|
||||
m528x_qspi_init();
|
||||
#endif
|
||||
}
|
||||
|
|
|
@ -30,7 +30,7 @@
|
|||
|
||||
/***************************************************************************/
|
||||
|
||||
#ifdef CONFIG_SPI_COLDFIRE_QSPI
|
||||
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
|
||||
|
||||
static void __init m532x_qspi_init(void)
|
||||
{
|
||||
|
@ -38,7 +38,7 @@ static void __init m532x_qspi_init(void)
|
|||
writew(0x01f0, MCF_GPIO_PAR_QSPI);
|
||||
}
|
||||
|
||||
#endif /* CONFIG_SPI_COLDFIRE_QSPI */
|
||||
#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
|
||||
|
||||
/***************************************************************************/
|
||||
|
||||
|
@ -77,7 +77,7 @@ void __init config_BSP(char *commandp, int size)
|
|||
mach_sched_init = hw_timer_init;
|
||||
m532x_uarts_init();
|
||||
m532x_fec_init();
|
||||
#ifdef CONFIG_SPI_COLDFIRE_QSPI
|
||||
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
|
||||
m532x_qspi_init();
|
||||
#endif
|
||||
|
||||
|
|
|
@ -121,7 +121,7 @@ static struct platform_device mcf_fec1 = {
|
|||
#endif /* MCFFEC_BASE1 */
|
||||
#endif /* CONFIG_FEC */
|
||||
|
||||
#ifdef CONFIG_SPI_COLDFIRE_QSPI
|
||||
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
|
||||
/*
|
||||
* The ColdFire QSPI module is an SPI protocol hardware block used
|
||||
* on a number of different ColdFire CPUs.
|
||||
|
@ -274,7 +274,7 @@ static struct platform_device mcf_qspi = {
|
|||
.resource = mcf_qspi_resources,
|
||||
.dev.platform_data = &mcf_qspi_data,
|
||||
};
|
||||
#endif /* CONFIG_SPI_COLDFIRE_QSPI */
|
||||
#endif /* IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI) */
|
||||
|
||||
static struct platform_device *mcf_devices[] __initdata = {
|
||||
&mcf_uart,
|
||||
|
@ -284,7 +284,7 @@ static struct platform_device *mcf_devices[] __initdata = {
|
|||
&mcf_fec1,
|
||||
#endif
|
||||
#endif
|
||||
#ifdef CONFIG_SPI_COLDFIRE_QSPI
|
||||
#if IS_ENABLED(CONFIG_SPI_COLDFIRE_QSPI)
|
||||
&mcf_qspi,
|
||||
#endif
|
||||
};
|
||||
|
|
|
@ -24,6 +24,7 @@
|
|||
#include <linux/sched.h>
|
||||
#include <linux/profile.h>
|
||||
#include <linux/smp.h>
|
||||
#include <linux/cpu.h>
|
||||
#include <asm/tlbflush.h>
|
||||
#include <asm/bitops.h>
|
||||
#include <asm/processor.h>
|
||||
|
@ -38,7 +39,6 @@
|
|||
#include "internal.h"
|
||||
|
||||
#ifdef CONFIG_HOTPLUG_CPU
|
||||
#include <linux/cpu.h>
|
||||
#include <asm/cacheflush.h>
|
||||
|
||||
static unsigned long sleep_mode[NR_CPUS];
|
||||
|
@ -874,10 +874,13 @@ static void __init smp_online(void)
|
|||
|
||||
cpu = smp_processor_id();
|
||||
|
||||
local_irq_enable();
|
||||
notify_cpu_starting(cpu);
|
||||
|
||||
ipi_call_lock();
|
||||
set_cpu_online(cpu, true);
|
||||
smp_wmb();
|
||||
ipi_call_unlock();
|
||||
|
||||
local_irq_enable();
|
||||
}
|
||||
|
||||
/**
|
||||
|
|
|
@ -2,7 +2,6 @@
|
|||
#define _PARISC_HARDWARE_H
|
||||
|
||||
#include <linux/mod_devicetable.h>
|
||||
#include <asm/pdc.h>
|
||||
|
||||
#define HWTYPE_ANY_ID PA_HWTYPE_ANY_ID
|
||||
#define HVERSION_ANY_ID PA_HVERSION_ANY_ID
|
||||
|
@ -95,12 +94,14 @@ struct bc_module {
|
|||
#define HPHW_MC 15
|
||||
#define HPHW_FAULTY 31
|
||||
|
||||
struct parisc_device_id;
|
||||
|
||||
/* hardware.c: */
|
||||
extern const char *parisc_hardware_description(struct parisc_device_id *id);
|
||||
extern enum cpu_type parisc_get_cpu_type(unsigned long hversion);
|
||||
|
||||
struct pci_dev;
|
||||
struct hardware_path;
|
||||
|
||||
/* drivers.c: */
|
||||
extern struct parisc_device *alloc_pa_dev(unsigned long hpa,
|
||||
|
|
|
@ -160,5 +160,11 @@ extern int npmem_ranges;
|
|||
|
||||
#include <asm-generic/memory_model.h>
|
||||
#include <asm-generic/getorder.h>
|
||||
#include <asm/pdc.h>
|
||||
|
||||
#define PAGE0 ((struct zeropage *)__PAGE_OFFSET)
|
||||
|
||||
/* DEFINITION OF THE ZERO-PAGE (PAG0) */
|
||||
/* based on work by Jason Eckhardt (jason@equator.com) */
|
||||
|
||||
#endif /* _PARISC_PAGE_H */
|
||||
|
|
|
@ -343,8 +343,6 @@
|
|||
|
||||
#ifdef __KERNEL__
|
||||
|
||||
#include <asm/page.h> /* for __PAGE_OFFSET */
|
||||
|
||||
extern int pdc_type;
|
||||
|
||||
/* Values for pdc_type */
|
||||
|
@ -677,11 +675,6 @@ static inline char * os_id_to_string(u16 os_id) {
|
|||
|
||||
#endif /* __KERNEL__ */
|
||||
|
||||
#define PAGE0 ((struct zeropage *)__PAGE_OFFSET)
|
||||
|
||||
/* DEFINITION OF THE ZERO-PAGE (PAG0) */
|
||||
/* based on work by Jason Eckhardt (jason@equator.com) */
|
||||
|
||||
/* flags of the device_path */
|
||||
#define PF_AUTOBOOT 0x80
|
||||
#define PF_AUTOSEARCH 0x40
|
||||
|
|
|
@ -44,6 +44,8 @@ struct vm_area_struct;
|
|||
|
||||
#endif /* !__ASSEMBLY__ */
|
||||
|
||||
#include <asm/page.h>
|
||||
|
||||
#define pte_ERROR(e) \
|
||||
printk("%s:%d: bad pte %08lx.\n", __FILE__, __LINE__, pte_val(e))
|
||||
#define pmd_ERROR(e) \
|
||||
|
|
|
@ -1,6 +1,8 @@
|
|||
#ifndef __ASM_SPINLOCK_H
|
||||
#define __ASM_SPINLOCK_H
|
||||
|
||||
#include <asm/barrier.h>
|
||||
#include <asm/ldcw.h>
|
||||
#include <asm/processor.h>
|
||||
#include <asm/spinlock_types.h>
|
||||
|
||||
|
|
|
@ -50,6 +50,7 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/major.h>
|
||||
#include <linux/tty.h>
|
||||
#include <asm/page.h> /* for PAGE0 */
|
||||
#include <asm/pdc.h> /* for iodc_call() proto and friends */
|
||||
|
||||
static DEFINE_SPINLOCK(pdc_console_lock);
|
||||
|
|
|
@ -31,6 +31,7 @@
|
|||
#include <linux/delay.h>
|
||||
#include <linux/bitops.h>
|
||||
#include <linux/ftrace.h>
|
||||
#include <linux/cpu.h>
|
||||
|
||||
#include <linux/atomic.h>
|
||||
#include <asm/current.h>
|
||||
|
@ -296,7 +297,12 @@ smp_cpu_init(int cpunum)
|
|||
printk(KERN_CRIT "CPU#%d already initialized!\n", cpunum);
|
||||
machine_halt();
|
||||
}
|
||||
|
||||
notify_cpu_starting(cpunum);
|
||||
|
||||
ipi_call_lock();
|
||||
set_cpu_online(cpunum, true);
|
||||
ipi_call_unlock();
|
||||
|
||||
/* Initialise the idle task for this CPU */
|
||||
atomic_inc(&init_mm.mm_count);
|
||||
|
|
|
@ -29,6 +29,7 @@
|
|||
#include <asm/uaccess.h>
|
||||
#include <asm/io.h>
|
||||
#include <asm/irq.h>
|
||||
#include <asm/page.h>
|
||||
#include <asm/param.h>
|
||||
#include <asm/pdc.h>
|
||||
#include <asm/led.h>
|
||||
|
|
|
@ -81,12 +81,13 @@ struct kvmppc_vcpu_book3s {
|
|||
u64 sdr1;
|
||||
u64 hior;
|
||||
u64 msr_mask;
|
||||
u64 vsid_next;
|
||||
#ifdef CONFIG_PPC_BOOK3S_32
|
||||
u32 vsid_pool[VSID_POOL_SIZE];
|
||||
u32 vsid_next;
|
||||
#else
|
||||
u64 vsid_first;
|
||||
u64 vsid_max;
|
||||
u64 proto_vsid_first;
|
||||
u64 proto_vsid_max;
|
||||
u64 proto_vsid_next;
|
||||
#endif
|
||||
int context_id[SID_CONTEXTS];
|
||||
|
||||
|
|
|
@ -588,23 +588,19 @@ _GLOBAL(ret_from_except_lite)
|
|||
fast_exc_return_irq:
|
||||
restore:
|
||||
/*
|
||||
* This is the main kernel exit path, we first check if we
|
||||
* have to change our interrupt state.
|
||||
* This is the main kernel exit path. First we check if we
|
||||
* are about to re-enable interrupts
|
||||
*/
|
||||
ld r5,SOFTE(r1)
|
||||
lbz r6,PACASOFTIRQEN(r13)
|
||||
cmpwi cr1,r5,0
|
||||
cmpw cr0,r5,r6
|
||||
beq cr0,4f
|
||||
cmpwi cr0,r5,0
|
||||
beq restore_irq_off
|
||||
|
||||
/* We do, handle disable first, which is easy */
|
||||
bne cr1,3f;
|
||||
li r0,0
|
||||
stb r0,PACASOFTIRQEN(r13);
|
||||
TRACE_DISABLE_INTS
|
||||
b 4f
|
||||
/* We are enabling, were we already enabled ? Yes, just return */
|
||||
cmpwi cr0,r6,1
|
||||
beq cr0,do_restore
|
||||
|
||||
3: /*
|
||||
/*
|
||||
* We are about to soft-enable interrupts (we are hard disabled
|
||||
* at this point). We check if there's anything that needs to
|
||||
* be replayed first.
|
||||
|
@ -626,7 +622,7 @@ restore_no_replay:
|
|||
/*
|
||||
* Final return path. BookE is handled in a different file
|
||||
*/
|
||||
4:
|
||||
do_restore:
|
||||
#ifdef CONFIG_PPC_BOOK3E
|
||||
b .exception_return_book3e
|
||||
#else
|
||||
|
@ -699,6 +695,25 @@ fast_exception_return:
|
|||
|
||||
#endif /* CONFIG_PPC_BOOK3E */
|
||||
|
||||
/*
|
||||
* We are returning to a context with interrupts soft disabled.
|
||||
*
|
||||
* However, we may also about to hard enable, so we need to
|
||||
* make sure that in this case, we also clear PACA_IRQ_HARD_DIS
|
||||
* or that bit can get out of sync and bad things will happen
|
||||
*/
|
||||
restore_irq_off:
|
||||
ld r3,_MSR(r1)
|
||||
lbz r7,PACAIRQHAPPENED(r13)
|
||||
andi. r0,r3,MSR_EE
|
||||
beq 1f
|
||||
rlwinm r7,r7,0,~PACA_IRQ_HARD_DIS
|
||||
stb r7,PACAIRQHAPPENED(r13)
|
||||
1: li r0,0
|
||||
stb r0,PACASOFTIRQEN(r13);
|
||||
TRACE_DISABLE_INTS
|
||||
b do_restore
|
||||
|
||||
/*
|
||||
* Something did happen, check if a re-emit is needed
|
||||
* (this also clears paca->irq_happened)
|
||||
|
@ -748,6 +763,9 @@ restore_check_irq_replay:
|
|||
#endif /* CONFIG_PPC_BOOK3E */
|
||||
1: b .ret_from_except /* What else to do here ? */
|
||||
|
||||
|
||||
|
||||
3:
|
||||
do_work:
|
||||
#ifdef CONFIG_PREEMPT
|
||||
andi. r0,r3,MSR_PR /* Returning to user mode? */
|
||||
|
|
|
@ -229,6 +229,19 @@ notrace void arch_local_irq_restore(unsigned long en)
|
|||
*/
|
||||
if (unlikely(irq_happened != PACA_IRQ_HARD_DIS))
|
||||
__hard_irq_disable();
|
||||
#ifdef CONFIG_TRACE_IRQFLAG
|
||||
else {
|
||||
/*
|
||||
* We should already be hard disabled here. We had bugs
|
||||
* where that wasn't the case so let's dbl check it and
|
||||
* warn if we are wrong. Only do that when IRQ tracing
|
||||
* is enabled as mfmsr() can be costly.
|
||||
*/
|
||||
if (WARN_ON(mfmsr() & MSR_EE))
|
||||
__hard_irq_disable();
|
||||
}
|
||||
#endif /* CONFIG_TRACE_IRQFLAG */
|
||||
|
||||
set_soft_enabled(0);
|
||||
|
||||
/*
|
||||
|
|
|
@ -194,14 +194,14 @@ static struct kvmppc_sid_map *create_sid_map(struct kvm_vcpu *vcpu, u64 gvsid)
|
|||
backwards_map = !backwards_map;
|
||||
|
||||
/* Uh-oh ... out of mappings. Let's flush! */
|
||||
if (vcpu_book3s->vsid_next == vcpu_book3s->vsid_max) {
|
||||
vcpu_book3s->vsid_next = vcpu_book3s->vsid_first;
|
||||
if (vcpu_book3s->proto_vsid_next == vcpu_book3s->proto_vsid_max) {
|
||||
vcpu_book3s->proto_vsid_next = vcpu_book3s->proto_vsid_first;
|
||||
memset(vcpu_book3s->sid_map, 0,
|
||||
sizeof(struct kvmppc_sid_map) * SID_MAP_NUM);
|
||||
kvmppc_mmu_pte_flush(vcpu, 0, 0);
|
||||
kvmppc_mmu_flush_segments(vcpu);
|
||||
}
|
||||
map->host_vsid = vcpu_book3s->vsid_next++;
|
||||
map->host_vsid = vsid_scramble(vcpu_book3s->proto_vsid_next++, 256M);
|
||||
|
||||
map->guest_vsid = gvsid;
|
||||
map->valid = true;
|
||||
|
@ -319,9 +319,10 @@ int kvmppc_mmu_init(struct kvm_vcpu *vcpu)
|
|||
return -1;
|
||||
vcpu3s->context_id[0] = err;
|
||||
|
||||
vcpu3s->vsid_max = ((vcpu3s->context_id[0] + 1) << USER_ESID_BITS) - 1;
|
||||
vcpu3s->vsid_first = vcpu3s->context_id[0] << USER_ESID_BITS;
|
||||
vcpu3s->vsid_next = vcpu3s->vsid_first;
|
||||
vcpu3s->proto_vsid_max = ((vcpu3s->context_id[0] + 1)
|
||||
<< USER_ESID_BITS) - 1;
|
||||
vcpu3s->proto_vsid_first = vcpu3s->context_id[0] << USER_ESID_BITS;
|
||||
vcpu3s->proto_vsid_next = vcpu3s->proto_vsid_first;
|
||||
|
||||
kvmppc_mmu_hpte_init(vcpu);
|
||||
|
||||
|
|
|
@ -463,6 +463,7 @@ long kvmppc_h_bulk_remove(struct kvm_vcpu *vcpu)
|
|||
/* insert R and C bits from PTE */
|
||||
rcbits = rev->guest_rpte & (HPTE_R_R|HPTE_R_C);
|
||||
args[j] |= rcbits << (56 - 5);
|
||||
hp[0] = 0;
|
||||
continue;
|
||||
}
|
||||
|
||||
|
|
|
@ -197,7 +197,8 @@ kvmppc_interrupt:
|
|||
/* Save guest PC and MSR */
|
||||
#ifdef CONFIG_PPC64
|
||||
BEGIN_FTR_SECTION
|
||||
andi. r0,r12,0x2
|
||||
andi. r0, r12, 0x2
|
||||
cmpwi cr1, r0, 0
|
||||
beq 1f
|
||||
mfspr r3,SPRN_HSRR0
|
||||
mfspr r4,SPRN_HSRR1
|
||||
|
@ -250,6 +251,12 @@ END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
|
|||
beq ld_last_prev_inst
|
||||
cmpwi r12, BOOK3S_INTERRUPT_ALIGNMENT
|
||||
beq- ld_last_inst
|
||||
#ifdef CONFIG_PPC64
|
||||
BEGIN_FTR_SECTION
|
||||
cmpwi r12, BOOK3S_INTERRUPT_H_EMUL_ASSIST
|
||||
beq- ld_last_inst
|
||||
END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
|
||||
#endif
|
||||
|
||||
b no_ld_last_inst
|
||||
|
||||
|
@ -316,23 +323,17 @@ no_dcbz32_off:
|
|||
* Having set up SRR0/1 with the address where we want
|
||||
* to continue with relocation on (potentially in module
|
||||
* space), we either just go straight there with rfi[d],
|
||||
* or we jump to an interrupt handler with bctr if there
|
||||
* is an interrupt to be handled first. In the latter
|
||||
* case, the rfi[d] at the end of the interrupt handler
|
||||
* will get us back to where we want to continue.
|
||||
* or we jump to an interrupt handler if there is an
|
||||
* interrupt to be handled first. In the latter case,
|
||||
* the rfi[d] at the end of the interrupt handler will
|
||||
* get us back to where we want to continue.
|
||||
*/
|
||||
|
||||
cmpwi r12, BOOK3S_INTERRUPT_EXTERNAL
|
||||
beq 1f
|
||||
cmpwi r12, BOOK3S_INTERRUPT_DECREMENTER
|
||||
beq 1f
|
||||
cmpwi r12, BOOK3S_INTERRUPT_PERFMON
|
||||
1: mtctr r12
|
||||
|
||||
/* Register usage at this point:
|
||||
*
|
||||
* R1 = host R1
|
||||
* R2 = host R2
|
||||
* R10 = raw exit handler id
|
||||
* R12 = exit handler id
|
||||
* R13 = shadow vcpu (32-bit) or PACA (64-bit)
|
||||
* SVCPU.* = guest *
|
||||
|
@ -342,12 +343,25 @@ no_dcbz32_off:
|
|||
PPC_LL r6, HSTATE_HOST_MSR(r13)
|
||||
PPC_LL r8, HSTATE_VMHANDLER(r13)
|
||||
|
||||
/* Restore host msr -> SRR1 */
|
||||
#ifdef CONFIG_PPC64
|
||||
BEGIN_FTR_SECTION
|
||||
beq cr1, 1f
|
||||
mtspr SPRN_HSRR1, r6
|
||||
mtspr SPRN_HSRR0, r8
|
||||
END_FTR_SECTION_IFSET(CPU_FTR_HVMODE)
|
||||
#endif
|
||||
1: /* Restore host msr -> SRR1 */
|
||||
mtsrr1 r6
|
||||
/* Load highmem handler address */
|
||||
mtsrr0 r8
|
||||
|
||||
/* RFI into the highmem handler, or jump to interrupt handler */
|
||||
beqctr
|
||||
cmpwi r12, BOOK3S_INTERRUPT_EXTERNAL
|
||||
beqa BOOK3S_INTERRUPT_EXTERNAL
|
||||
cmpwi r12, BOOK3S_INTERRUPT_DECREMENTER
|
||||
beqa BOOK3S_INTERRUPT_DECREMENTER
|
||||
cmpwi r12, BOOK3S_INTERRUPT_PERFMON
|
||||
beqa BOOK3S_INTERRUPT_PERFMON
|
||||
|
||||
RFI
|
||||
kvmppc_handler_trampoline_exit_end:
|
||||
|
|
|
@ -13,6 +13,7 @@
|
|||
#include <linux/platform_device.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/smc91x.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <asm/machvec.h>
|
||||
#include <asm/sizes.h>
|
||||
|
||||
|
@ -20,7 +21,7 @@
|
|||
#define SMC_IO_OFFSET 0x300
|
||||
#define SMC_IOADDR (SMC_IOBASE + SMC_IO_OFFSET)
|
||||
|
||||
#define ETHERNET_IRQ 0x09
|
||||
#define ETHERNET_IRQ evt2irq(0x320)
|
||||
|
||||
static void __init sh_edosk7705_init_irq(void)
|
||||
{
|
||||
|
|
|
@ -23,6 +23,7 @@
|
|||
#include <linux/platform_device.h>
|
||||
#include <linux/smc91x.h>
|
||||
#include <linux/interrupt.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <linux/i2c.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <asm/machvec.h>
|
||||
|
@ -40,8 +41,6 @@
|
|||
#define SMC_IO_OFFSET 0x300
|
||||
#define SMC_IOADDR (SMC_IOBASE + SMC_IO_OFFSET)
|
||||
|
||||
#define ETHERNET_IRQ 5
|
||||
|
||||
/* NOR flash */
|
||||
static struct mtd_partition edosk7760_nor_flash_partitions[] = {
|
||||
{
|
||||
|
@ -99,8 +98,8 @@ static struct resource sh7760_i2c1_res[] = {
|
|||
.end = SH7760_I2C1_MMIOEND,
|
||||
.flags = IORESOURCE_MEM,
|
||||
},{
|
||||
.start = SH7760_I2C1_IRQ,
|
||||
.end = SH7760_I2C1_IRQ,
|
||||
.start = evt2irq(0x9e0),
|
||||
.end = evt2irq(0x9e0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -122,8 +121,8 @@ static struct resource sh7760_i2c0_res[] = {
|
|||
.end = SH7760_I2C0_MMIOEND,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}, {
|
||||
.start = SH7760_I2C0_IRQ,
|
||||
.end = SH7760_I2C0_IRQ,
|
||||
.start = evt2irq(0x9c0),
|
||||
.end = evt2irq(0x9c0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -150,8 +149,8 @@ static struct resource smc91x_res[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = ETHERNET_IRQ,
|
||||
.end = ETHERNET_IRQ,
|
||||
.start = evt2irq(0x2a0),
|
||||
.end = evt2irq(0x2a0),
|
||||
.flags = IORESOURCE_IRQ ,
|
||||
}
|
||||
};
|
||||
|
|
|
@ -14,6 +14,7 @@
|
|||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/sh_eth.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <asm/machvec.h>
|
||||
#include <asm/sizes.h>
|
||||
|
||||
|
@ -71,7 +72,7 @@ static struct resource sh_eth_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
}, {
|
||||
|
||||
.start = 57, /* irq number */
|
||||
.start = evt2irq(0x920), /* irq number */
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -19,6 +19,7 @@
|
|||
#include <linux/mtd/partitions.h>
|
||||
#include <linux/mtd/physmap.h>
|
||||
#include <linux/mtd/map.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <mach/magicpanelr2.h>
|
||||
#include <asm/heartbeat.h>
|
||||
#include <cpu/sh7720.h>
|
||||
|
@ -245,8 +246,8 @@ static struct resource smsc911x_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 35,
|
||||
.end = 35,
|
||||
.start = evt2irq(0x660),
|
||||
.end = evt2irq(0x660),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -358,17 +359,17 @@ static void __init init_mpr2_IRQ(void)
|
|||
{
|
||||
plat_irq_setup_pins(IRQ_MODE_IRQ); /* install handlers for IRQ0-5 */
|
||||
|
||||
irq_set_irq_type(32, IRQ_TYPE_LEVEL_LOW); /* IRQ0 CAN1 */
|
||||
irq_set_irq_type(33, IRQ_TYPE_LEVEL_LOW); /* IRQ1 CAN2 */
|
||||
irq_set_irq_type(34, IRQ_TYPE_LEVEL_LOW); /* IRQ2 CAN3 */
|
||||
irq_set_irq_type(35, IRQ_TYPE_LEVEL_LOW); /* IRQ3 SMSC9115 */
|
||||
irq_set_irq_type(36, IRQ_TYPE_EDGE_RISING); /* IRQ4 touchscreen */
|
||||
irq_set_irq_type(37, IRQ_TYPE_EDGE_FALLING); /* IRQ5 touchscreen */
|
||||
irq_set_irq_type(evt2irq(0x600), IRQ_TYPE_LEVEL_LOW); /* IRQ0 CAN1 */
|
||||
irq_set_irq_type(evt2irq(0x620), IRQ_TYPE_LEVEL_LOW); /* IRQ1 CAN2 */
|
||||
irq_set_irq_type(evt2irq(0x640), IRQ_TYPE_LEVEL_LOW); /* IRQ2 CAN3 */
|
||||
irq_set_irq_type(evt2irq(0x660), IRQ_TYPE_LEVEL_LOW); /* IRQ3 SMSC9115 */
|
||||
irq_set_irq_type(evt2irq(0x680), IRQ_TYPE_EDGE_RISING); /* IRQ4 touchscreen */
|
||||
irq_set_irq_type(evt2irq(0x6a0), IRQ_TYPE_EDGE_FALLING); /* IRQ5 touchscreen */
|
||||
|
||||
intc_set_priority(32, 13); /* IRQ0 CAN1 */
|
||||
intc_set_priority(33, 13); /* IRQ0 CAN2 */
|
||||
intc_set_priority(34, 13); /* IRQ0 CAN3 */
|
||||
intc_set_priority(35, 6); /* IRQ3 SMSC9115 */
|
||||
intc_set_priority(evt2irq(0x600), 13); /* IRQ0 CAN1 */
|
||||
intc_set_priority(evt2irq(0x620), 13); /* IRQ0 CAN2 */
|
||||
intc_set_priority(evt2irq(0x640), 13); /* IRQ0 CAN3 */
|
||||
intc_set_priority(evt2irq(0x660), 6); /* IRQ3 SMSC9115 */
|
||||
}
|
||||
|
||||
/*
|
||||
|
|
|
@ -19,6 +19,7 @@
|
|||
#include <linux/mmc/sh_mmcif.h>
|
||||
#include <linux/mmc/sh_mobile_sdhi.h>
|
||||
#include <linux/sh_eth.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <linux/usb/renesas_usbhs.h>
|
||||
#include <cpu/sh7757.h>
|
||||
#include <asm/heartbeat.h>
|
||||
|
@ -65,8 +66,8 @@ static struct resource sh_eth0_resources[] = {
|
|||
.end = 0xfef001ff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}, {
|
||||
.start = 84,
|
||||
.end = 84,
|
||||
.start = evt2irq(0xc80),
|
||||
.end = evt2irq(0xc80),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -94,8 +95,8 @@ static struct resource sh_eth1_resources[] = {
|
|||
.end = 0xfef009ff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}, {
|
||||
.start = 84,
|
||||
.end = 84,
|
||||
.start = evt2irq(0xc80),
|
||||
.end = evt2irq(0xc80),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -139,8 +140,8 @@ static struct resource sh_eth_giga0_resources[] = {
|
|||
.end = 0xfee01fff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}, {
|
||||
.start = 315,
|
||||
.end = 315,
|
||||
.start = evt2irq(0x2960),
|
||||
.end = evt2irq(0x2960),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -174,8 +175,8 @@ static struct resource sh_eth_giga1_resources[] = {
|
|||
.end = 0xfee01fff,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}, {
|
||||
.start = 316,
|
||||
.end = 316,
|
||||
.start = evt2irq(0x2980),
|
||||
.end = evt2irq(0x2980),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -206,11 +207,11 @@ static struct resource sh_mmcif_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 211,
|
||||
.start = evt2irq(0x1c60),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
[2] = {
|
||||
.start = 212,
|
||||
.start = evt2irq(0x1c80),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -248,7 +249,7 @@ static struct resource sdhi_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 20,
|
||||
.start = evt2irq(0x480),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -284,8 +285,8 @@ static struct resource usb0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 50,
|
||||
.end = 50,
|
||||
.start = evt2irq(0x840),
|
||||
.end = evt2irq(0x840),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -20,6 +20,7 @@
|
|||
#include <linux/i2c-pca-platform.h>
|
||||
#include <linux/i2c-algo-pca.h>
|
||||
#include <linux/usb/r8a66597.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/clk.h>
|
||||
|
@ -105,8 +106,8 @@ static struct resource r8a66597_usb_host_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 2,
|
||||
.end = 2,
|
||||
.start = evt2irq(0x240),
|
||||
.end = evt2irq(0x240),
|
||||
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
|
||||
},
|
||||
};
|
||||
|
@ -135,7 +136,7 @@ static struct resource sm501_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[2] = {
|
||||
.start = 10,
|
||||
.start = evt2irq(0x340),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -223,8 +224,8 @@ static struct resource i2c_proto_resources[] = {
|
|||
.flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
|
||||
},
|
||||
[1] = {
|
||||
.start = 12,
|
||||
.end = 12,
|
||||
.start = evt2irq(0x380),
|
||||
.end = evt2irq(0x380),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -236,8 +237,8 @@ static struct resource i2c_resources[] = {
|
|||
.flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
|
||||
},
|
||||
[1] = {
|
||||
.start = 12,
|
||||
.end = 12,
|
||||
.start = evt2irq(0x380),
|
||||
.end = evt2irq(0x380),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -20,6 +20,7 @@
|
|||
#include <linux/gpio.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <mach/urquell.h>
|
||||
#include <cpu/sh7786.h>
|
||||
#include <asm/heartbeat.h>
|
||||
|
@ -78,7 +79,7 @@ static struct resource smc91x_eth_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 11,
|
||||
.start = evt2irq(0x360),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -23,6 +23,7 @@
|
|||
#include <linux/smsc911x.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/videodev2.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <media/ov772x.h>
|
||||
#include <media/soc_camera.h>
|
||||
#include <media/soc_camera_platform.h>
|
||||
|
@ -47,8 +48,8 @@ static struct resource smsc9118_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 35,
|
||||
.end = 35,
|
||||
.start = evt2irq(0x660),
|
||||
.end = evt2irq(0x660),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
}
|
||||
};
|
||||
|
@ -236,7 +237,7 @@ static struct resource lcdc_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 28,
|
||||
.start = evt2irq(0x580),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -404,7 +405,7 @@ static struct resource ceu_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 52,
|
||||
.start = evt2irq(0x880),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
[2] = {
|
||||
|
@ -430,7 +431,7 @@ static struct resource sdhi0_cn3_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 100,
|
||||
.start = evt2irq(0xe80),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -457,7 +458,7 @@ static struct resource sdhi1_cn7_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 23,
|
||||
.start = evt2irq(0x4e0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -29,6 +29,7 @@
|
|||
#include <linux/input.h>
|
||||
#include <linux/input/sh_keysc.h>
|
||||
#include <linux/sh_eth.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <linux/videodev2.h>
|
||||
#include <video/sh_mobile_lcdc.h>
|
||||
#include <sound/sh_fsi.h>
|
||||
|
@ -137,7 +138,7 @@ static struct resource sh_eth_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 91,
|
||||
.start = evt2irq(0xd60),
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
|
||||
},
|
||||
};
|
||||
|
@ -178,8 +179,8 @@ static struct resource usb0_host_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 65,
|
||||
.end = 65,
|
||||
.start = evt2irq(0xa20),
|
||||
.end = evt2irq(0xa20),
|
||||
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
|
||||
},
|
||||
};
|
||||
|
@ -214,8 +215,8 @@ static struct resource usb1_common_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 66,
|
||||
.end = 66,
|
||||
.start = evt2irq(0xa40),
|
||||
.end = evt2irq(0xa40),
|
||||
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
|
||||
},
|
||||
};
|
||||
|
@ -261,8 +262,8 @@ static struct resource usbhs_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 66,
|
||||
.end = 66,
|
||||
.start = evt2irq(0xa40),
|
||||
.end = evt2irq(0xa40),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -348,7 +349,7 @@ static struct resource lcdc_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 106,
|
||||
.start = evt2irq(0xf40),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -375,7 +376,7 @@ static struct resource ceu0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 52,
|
||||
.start = evt2irq(0x880),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
[2] = {
|
||||
|
@ -406,7 +407,7 @@ static struct resource ceu1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 63,
|
||||
.start = evt2irq(0x9e0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
[2] = {
|
||||
|
@ -437,7 +438,7 @@ static struct i2c_board_info i2c1_devices[] = {
|
|||
},
|
||||
{
|
||||
I2C_BOARD_INFO("lis3lv02d", 0x1c),
|
||||
.irq = 33,
|
||||
.irq = evt2irq(0x620),
|
||||
}
|
||||
};
|
||||
|
||||
|
@ -463,7 +464,7 @@ static struct resource keysc_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 79,
|
||||
.start = evt2irq(0xbe0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -479,7 +480,8 @@ static struct platform_device keysc_device = {
|
|||
};
|
||||
|
||||
/* TouchScreen */
|
||||
#define IRQ0 32
|
||||
#define IRQ0 evt2irq(0x600)
|
||||
|
||||
static int ts_get_pendown_state(void)
|
||||
{
|
||||
int val = 0;
|
||||
|
@ -544,7 +546,7 @@ static struct resource sdhi0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 100,
|
||||
.start = evt2irq(0xe80),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -588,7 +590,7 @@ static struct resource sdhi1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 23,
|
||||
.start = evt2irq(0x4e0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -653,7 +655,7 @@ static struct resource msiof0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 84,
|
||||
.start = evt2irq(0xc80),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -794,7 +796,7 @@ static struct resource fsi_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 108,
|
||||
.start = evt2irq(0xf80),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -818,7 +820,7 @@ static struct resource irda_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 20,
|
||||
.start = evt2irq(0x480),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -855,7 +857,7 @@ static struct resource sh_vou_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 55,
|
||||
.start = evt2irq(0x8e0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -891,12 +893,12 @@ static struct resource sh_mmcif_resources[] = {
|
|||
},
|
||||
[1] = {
|
||||
/* MMC2I */
|
||||
.start = 29,
|
||||
.start = evt2irq(0x5a0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
[2] = {
|
||||
/* MMC3I */
|
||||
.start = 30,
|
||||
.start = evt2irq(0x5c0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -13,6 +13,7 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/platform_device.h>
|
||||
#include <linux/irq.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <sound/sh_dac_audio.h>
|
||||
#include <asm/hd64461.h>
|
||||
#include <asm/io.h>
|
||||
|
@ -35,7 +36,7 @@ static struct resource cf_ide_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[2] = {
|
||||
.start = 77,
|
||||
.start = evt2irq(0xba0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -23,6 +23,7 @@
|
|||
#include <linux/i2c.h>
|
||||
#include <linux/usb/r8a66597.h>
|
||||
#include <linux/videodev2.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <media/rj54n1cb0c.h>
|
||||
#include <media/soc_camera.h>
|
||||
#include <media/sh_mobile_ceu.h>
|
||||
|
@ -110,7 +111,7 @@ static struct resource kfr2r09_sh_keysc_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 79,
|
||||
.start = evt2irq(0xbe0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -175,7 +176,7 @@ static struct resource kfr2r09_sh_lcdc_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 106,
|
||||
.start = evt2irq(0xf40),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -200,8 +201,8 @@ static struct resource kfr2r09_usb0_gadget_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 65,
|
||||
.end = 65,
|
||||
.start = evtirq(0xa20),
|
||||
.end = evtirq(0xa20),
|
||||
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
|
||||
},
|
||||
};
|
||||
|
@ -230,8 +231,8 @@ static struct resource kfr2r09_ceu_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 52,
|
||||
.end = 52,
|
||||
.start = evt2irq(0x880),
|
||||
.end = evt2irq(0x880),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
[2] = {
|
||||
|
@ -348,7 +349,7 @@ static struct resource kfr2r09_sh_sdhi0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 100,
|
||||
.start = evt2irq(0xe80),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -22,6 +22,7 @@
|
|||
#include <linux/clk.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/videodev2.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <video/sh_mobile_lcdc.h>
|
||||
#include <media/sh_mobile_ceu.h>
|
||||
#include <media/ov772x.h>
|
||||
|
@ -54,7 +55,7 @@ static struct resource smc91x_eth_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 32, /* IRQ0 */
|
||||
.start = evt2irq(0x600), /* IRQ0 */
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
|
||||
},
|
||||
};
|
||||
|
@ -88,7 +89,7 @@ static struct resource sh_keysc_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 79,
|
||||
.start = evt2irq(0xbe0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -285,7 +286,7 @@ static struct resource migor_lcdc_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 28,
|
||||
.start = evt2irq(0x580),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -368,7 +369,7 @@ static struct resource migor_ceu_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 52,
|
||||
.start = evt2irq(0x880),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
[2] = {
|
||||
|
@ -394,7 +395,7 @@ static struct resource sdhi_cn9_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 100,
|
||||
.start = evt2irq(0xe80),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -420,7 +421,7 @@ static struct i2c_board_info migor_i2c_devices[] = {
|
|||
},
|
||||
{
|
||||
I2C_BOARD_INFO("migor_ts", 0x51),
|
||||
.irq = 38, /* IRQ6 */
|
||||
.irq = evt2irq(0x6c0), /* IRQ6 */
|
||||
},
|
||||
{
|
||||
I2C_BOARD_INFO("wm8978", 0x1a),
|
||||
|
|
|
@ -16,6 +16,7 @@
|
|||
#include <linux/input.h>
|
||||
#include <linux/input/sh_keysc.h>
|
||||
#include <linux/smc91x.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <mach-se/mach/se7722.h>
|
||||
#include <mach-se/mach/mrshpc.h>
|
||||
#include <asm/machvec.h>
|
||||
|
@ -114,7 +115,7 @@ static struct resource sh_keysc_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 79,
|
||||
.start = evt2irq(0xbe0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -24,6 +24,7 @@
|
|||
#include <linux/input/sh_keysc.h>
|
||||
#include <linux/usb/r8a66597.h>
|
||||
#include <linux/sh_eth.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <linux/videodev2.h>
|
||||
#include <video/sh_mobile_lcdc.h>
|
||||
#include <media/sh_mobile_ceu.h>
|
||||
|
@ -197,7 +198,7 @@ static struct resource lcdc_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 106,
|
||||
.start = evt2irq(0xf40),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -224,7 +225,7 @@ static struct resource ceu0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 52,
|
||||
.start = evt2irq(0x880),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
[2] = {
|
||||
|
@ -255,7 +256,7 @@ static struct resource ceu1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 63,
|
||||
.start = evt2irq(0x9e0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
[2] = {
|
||||
|
@ -289,7 +290,7 @@ static struct resource fsi_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 108,
|
||||
.start = evt2irq(0xf80),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -343,7 +344,7 @@ static struct resource keysc_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 79,
|
||||
.start = evt2irq(0xbe0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -366,7 +367,7 @@ static struct resource sh_eth_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 91,
|
||||
.start = evt2irq(0xd60),
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
|
||||
},
|
||||
};
|
||||
|
@ -397,8 +398,8 @@ static struct resource sh7724_usb0_host_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 65,
|
||||
.end = 65,
|
||||
.start = evt2irq(0xa20),
|
||||
.end = evt2irq(0xa20),
|
||||
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
|
||||
},
|
||||
};
|
||||
|
@ -426,8 +427,8 @@ static struct resource sh7724_usb1_gadget_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 66,
|
||||
.end = 66,
|
||||
.start = evt2irq(0xa40),
|
||||
.end = evt2irq(0xa40),
|
||||
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
|
||||
},
|
||||
};
|
||||
|
@ -452,7 +453,7 @@ static struct resource sdhi0_cn7_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 100,
|
||||
.start = evt2irq(0xe80),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -481,7 +482,7 @@ static struct resource sdhi1_cn8_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 23,
|
||||
.start = evt2irq(0x4e0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -511,7 +512,7 @@ static struct resource irda_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 20,
|
||||
.start = evt2irq(0x480),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -549,7 +550,7 @@ static struct resource sh_vou_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 55,
|
||||
.start = evt2irq(0x8e0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -595,6 +596,7 @@ static struct i2c_board_info i2c0_devices[] = {
|
|||
#define EEPROM_DATA 0xBA20600C
|
||||
#define EEPROM_STAT 0xBA206010
|
||||
#define EEPROM_STRT 0xBA206014
|
||||
|
||||
static int __init sh_eth_is_eeprom_ready(void)
|
||||
{
|
||||
int t = 10000;
|
||||
|
@ -651,7 +653,6 @@ extern char ms7724se_sdram_enter_end;
|
|||
extern char ms7724se_sdram_leave_start;
|
||||
extern char ms7724se_sdram_leave_end;
|
||||
|
||||
|
||||
static int __init arch_setup(void)
|
||||
{
|
||||
/* enable I2C device */
|
||||
|
|
|
@ -18,6 +18,7 @@
|
|||
#include <linux/fb.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/sh_eth.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <mach/sh7763rdp.h>
|
||||
#include <asm/sh7760fb.h>
|
||||
|
||||
|
@ -67,7 +68,7 @@ static struct platform_device sh7763rdp_nor_flash_device = {
|
|||
* SH-Ether
|
||||
*
|
||||
* SH Ether of SH7763 has multi IRQ handling.
|
||||
* (57,58,59 -> 57)
|
||||
* (0x920,0x940,0x960 -> 0x920)
|
||||
*/
|
||||
static struct resource sh_eth_resources[] = {
|
||||
{
|
||||
|
@ -79,7 +80,7 @@ static struct resource sh_eth_resources[] = {
|
|||
.end = 0xFEE01FFF,
|
||||
.flags = IORESOURCE_MEM,
|
||||
}, {
|
||||
.start = 57, /* irq number */
|
||||
.start = evt2irq(0x920), /* irq number */
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -14,6 +14,7 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/delay.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include "pci-sh4.h"
|
||||
|
||||
#define PCIMCR_MRSET_OFF 0xBFFFFFFF
|
||||
|
@ -27,7 +28,7 @@ int pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
|
|||
* slot2: pin1-4 = irq7,8,5,6
|
||||
* slot3: pin1-4 = irq8,5,6,7
|
||||
*/
|
||||
int irq = ((slot + pin - 1) & 0x3) + 5;
|
||||
int irq = ((slot + pin - 1) & 0x3) + evt2irq(0x2a0);
|
||||
|
||||
if ((slot | (pin - 1)) > 0x3) {
|
||||
printk(KERN_WARNING "PCI: Bad IRQ mapping request for slot %d pin %c\n",
|
||||
|
|
|
@ -12,13 +12,10 @@
|
|||
*/
|
||||
#include <linux/pci.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include "pci-sh4.h"
|
||||
|
||||
static char irq_tab[] __initdata = {
|
||||
65, 66, 67, 68,
|
||||
};
|
||||
|
||||
int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
|
||||
{
|
||||
return irq_tab[slot];
|
||||
return evt2irq(0xa20) + slot;
|
||||
}
|
||||
|
|
|
@ -13,18 +13,28 @@
|
|||
*/
|
||||
#include <linux/pci.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include "pci-sh4.h"
|
||||
|
||||
#define IRQ_INTA evt2irq(0xa20)
|
||||
#define IRQ_INTB evt2irq(0xa40)
|
||||
#define IRQ_INTC evt2irq(0xa60)
|
||||
#define IRQ_INTD evt2irq(0xa80)
|
||||
|
||||
/* IDSEL [16][17][18][19][20][21][22][23][24][25][26][27][28][29][30][31] */
|
||||
static char sdk7780_irq_tab[4][16] __initdata = {
|
||||
/* INTA */
|
||||
{ 65, 68, 67, 68, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
|
||||
{ IRQ_INTA, IRQ_INTD, IRQ_INTC, IRQ_INTD, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1, -1, -1 },
|
||||
/* INTB */
|
||||
{ 66, 65, -1, 65, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
|
||||
{ IRQ_INTB, IRQ_INTA, -1, IRQ_INTA, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1 },
|
||||
/* INTC */
|
||||
{ 67, 66, -1, 66, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
|
||||
{ IRQ_INTC, IRQ_INTB, -1, IRQ_INTB, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1, -1 },
|
||||
/* INTD */
|
||||
{ 68, 67, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1 },
|
||||
{ IRQ_INTD, IRQ_INTC, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
|
||||
-1, -1, -1 },
|
||||
};
|
||||
|
||||
int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
|
||||
|
|
|
@ -4,13 +4,14 @@
|
|||
#include <linux/delay.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include "pci-sh4.h"
|
||||
|
||||
int __init pcibios_map_platform_irq(const struct pci_dev *, u8 slot, u8 pin)
|
||||
{
|
||||
switch (slot) {
|
||||
case 0: return 13;
|
||||
case 1: return 13; /* AMD Ethernet controller */
|
||||
case 0: return evt2irq(0x3a0);
|
||||
case 1: return evt2irq(0x3a0); /* AMD Ethernet controller */
|
||||
case 2: return -1;
|
||||
case 3: return -1;
|
||||
case 4: return -1;
|
||||
|
|
|
@ -2,6 +2,7 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/types.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/sh_intc.h>
|
||||
|
||||
int __init pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
||||
{
|
||||
|
@ -9,21 +10,21 @@ int __init pcibios_map_platform_irq(const struct pci_dev *dev, u8 slot, u8 pin)
|
|||
|
||||
if (dev->bus->number == 0) {
|
||||
switch (slot) {
|
||||
case 4: return 5; /* eth0 */
|
||||
case 8: return 5; /* eth1 */
|
||||
case 6: return 2; /* PCI bridge */
|
||||
case 4: return evt2irq(0x2a0); /* eth0 */
|
||||
case 8: return evt2irq(0x2a0); /* eth1 */
|
||||
case 6: return evt2irq(0x240); /* PCI bridge */
|
||||
default:
|
||||
printk(KERN_ERR "PCI: Bad IRQ mapping request "
|
||||
"for slot %d\n", slot);
|
||||
return 2;
|
||||
return evt2irq(0x240);
|
||||
}
|
||||
} else {
|
||||
switch (pin) {
|
||||
case 0: irq = 2; break;
|
||||
case 1: irq = 2; break;
|
||||
case 2: irq = 2; break;
|
||||
case 3: irq = 2; break;
|
||||
case 4: irq = 2; break;
|
||||
case 0: irq = evt2irq(0x240); break;
|
||||
case 1: irq = evt2irq(0x240); break;
|
||||
case 2: irq = evt2irq(0x240); break;
|
||||
case 3: irq = evt2irq(0x240); break;
|
||||
case 4: irq = evt2irq(0x240); break;
|
||||
default: irq = -1; break;
|
||||
}
|
||||
}
|
||||
|
|
|
@ -16,6 +16,7 @@
|
|||
#include <linux/types.h>
|
||||
#include <linux/init.h>
|
||||
#include <linux/pci.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include "pci-sh4.h"
|
||||
|
||||
int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
|
||||
|
@ -24,11 +25,11 @@ int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
|
|||
|
||||
switch (slot) {
|
||||
case 8: /* the PCI bridge */ break;
|
||||
case 11: irq = 8; break; /* USB */
|
||||
case 12: irq = 11; break; /* PCMCIA */
|
||||
case 13: irq = 5; break; /* eth0 */
|
||||
case 14: irq = 8; break; /* eth1 */
|
||||
case 15: irq = 11; break; /* safenet (unused) */
|
||||
case 11: irq = evt2irq(0x300); break; /* USB */
|
||||
case 12: irq = evt2irq(0x360); break; /* PCMCIA */
|
||||
case 13: irq = evt2irq(0x2a0); break; /* eth0 */
|
||||
case 14: irq = evt2irq(0x300); break; /* eth1 */
|
||||
case 15: irq = evt2irq(0x360); break; /* safenet (unused) */
|
||||
}
|
||||
|
||||
printk("PCI: Mapping SnapGear IRQ for slot %d, pin %c to irq %d\n",
|
||||
|
|
|
@ -18,6 +18,7 @@
|
|||
#include <linux/slab.h>
|
||||
#include <linux/clk.h>
|
||||
#include <linux/sh_clk.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include "pcie-sh7786.h"
|
||||
#include <asm/sizes.h>
|
||||
|
||||
|
@ -468,7 +469,7 @@ static int __init pcie_init(struct sh7786_pcie_port *port)
|
|||
|
||||
int __init pcibios_map_platform_irq(const struct pci_dev *pdev, u8 slot, u8 pin)
|
||||
{
|
||||
return 71;
|
||||
return evt2irq(0xae0);
|
||||
}
|
||||
|
||||
static int __init sh7786_pcie_core_init(void)
|
||||
|
|
|
@ -9,11 +9,9 @@
|
|||
|
||||
#define SH7760_I2C0_MMIO 0xFE140000
|
||||
#define SH7760_I2C0_MMIOEND 0xFE14003B
|
||||
#define SH7760_I2C0_IRQ 62
|
||||
|
||||
#define SH7760_I2C1_MMIO 0xFE150000
|
||||
#define SH7760_I2C1_MMIOEND 0xFE15003B
|
||||
#define SH7760_I2C1_IRQ 63
|
||||
|
||||
struct sh7760_i2c_platdata {
|
||||
unsigned int speed_khz;
|
||||
|
|
|
@ -1,6 +1,8 @@
|
|||
#ifndef __ASM_CPU_SH3_DMA_H
|
||||
#define __ASM_CPU_SH3_DMA_H
|
||||
|
||||
#include <linux/sh_intc.h>
|
||||
|
||||
#if defined(CONFIG_CPU_SUBTYPE_SH7720) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7721) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7710) || \
|
||||
|
@ -10,8 +12,8 @@
|
|||
#define SH_DMAC_BASE0 0xa4000020
|
||||
#endif
|
||||
|
||||
#define DMTE0_IRQ 48
|
||||
#define DMTE4_IRQ 76
|
||||
#define DMTE0_IRQ evt2irq(0x800)
|
||||
#define DMTE4_IRQ evt2irq(0xb80)
|
||||
|
||||
/* Definitions for the SuperH DMAC */
|
||||
#define TM_BURST 0x00000020
|
||||
|
|
|
@ -1,75 +1,77 @@
|
|||
#ifndef __ASM_SH_CPU_SH4_DMA_SH7780_H
|
||||
#define __ASM_SH_CPU_SH4_DMA_SH7780_H
|
||||
|
||||
#include <linux/sh_intc.h>
|
||||
|
||||
#if defined(CONFIG_CPU_SUBTYPE_SH7343) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7730)
|
||||
#define DMTE0_IRQ 48
|
||||
#define DMTE4_IRQ 76
|
||||
#define DMAE0_IRQ 78 /* DMA Error IRQ*/
|
||||
#define DMTE0_IRQ evt2irq(0x800)
|
||||
#define DMTE4_IRQ evt2irq(0xb80)
|
||||
#define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/
|
||||
#define SH_DMAC_BASE0 0xFE008020
|
||||
#define SH_DMARS_BASE0 0xFE009000
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7722)
|
||||
#define DMTE0_IRQ 48
|
||||
#define DMTE4_IRQ 76
|
||||
#define DMAE0_IRQ 78 /* DMA Error IRQ*/
|
||||
#define DMTE0_IRQ evt2irq(0x800)
|
||||
#define DMTE4_IRQ evt2irq(0xb80)
|
||||
#define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/
|
||||
#define SH_DMAC_BASE0 0xFE008020
|
||||
#define SH_DMARS_BASE0 0xFE009000
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7763) || \
|
||||
defined(CONFIG_CPU_SUBTYPE_SH7764)
|
||||
#define DMTE0_IRQ 34
|
||||
#define DMTE4_IRQ 44
|
||||
#define DMAE0_IRQ 38
|
||||
#define DMTE0_IRQ evt2irq(0x640)
|
||||
#define DMTE4_IRQ evt2irq(0x780)
|
||||
#define DMAE0_IRQ evt2irq(0x6c0)
|
||||
#define SH_DMAC_BASE0 0xFF608020
|
||||
#define SH_DMARS_BASE0 0xFF609000
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7723)
|
||||
#define DMTE0_IRQ 48 /* DMAC0A*/
|
||||
#define DMTE4_IRQ 76 /* DMAC0B */
|
||||
#define DMTE6_IRQ 40
|
||||
#define DMTE8_IRQ 42 /* DMAC1A */
|
||||
#define DMTE9_IRQ 43
|
||||
#define DMTE10_IRQ 72 /* DMAC1B */
|
||||
#define DMTE11_IRQ 73
|
||||
#define DMAE0_IRQ 78 /* DMA Error IRQ*/
|
||||
#define DMAE1_IRQ 74 /* DMA Error IRQ*/
|
||||
#define DMTE0_IRQ evt2irq(0x800) /* DMAC0A*/
|
||||
#define DMTE4_IRQ evt2irq(0xb80) /* DMAC0B */
|
||||
#define DMTE6_IRQ evt2irq(0x700)
|
||||
#define DMTE8_IRQ evt2irq(0x740) /* DMAC1A */
|
||||
#define DMTE9_IRQ evt2irq(0x760)
|
||||
#define DMTE10_IRQ evt2irq(0xb00) /* DMAC1B */
|
||||
#define DMTE11_IRQ evt2irq(0xb20)
|
||||
#define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/
|
||||
#define DMAE1_IRQ evt2irq(0xb40) /* DMA Error IRQ*/
|
||||
#define SH_DMAC_BASE0 0xFE008020
|
||||
#define SH_DMAC_BASE1 0xFDC08020
|
||||
#define SH_DMARS_BASE0 0xFDC09000
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7724)
|
||||
#define DMTE0_IRQ 48 /* DMAC0A*/
|
||||
#define DMTE4_IRQ 76 /* DMAC0B */
|
||||
#define DMTE6_IRQ 40
|
||||
#define DMTE8_IRQ 42 /* DMAC1A */
|
||||
#define DMTE9_IRQ 43
|
||||
#define DMTE10_IRQ 72 /* DMAC1B */
|
||||
#define DMTE11_IRQ 73
|
||||
#define DMAE0_IRQ 78 /* DMA Error IRQ*/
|
||||
#define DMAE1_IRQ 74 /* DMA Error IRQ*/
|
||||
#define DMTE0_IRQ evt2irq(0x800) /* DMAC0A*/
|
||||
#define DMTE4_IRQ evt2irq(0xb80) /* DMAC0B */
|
||||
#define DMTE6_IRQ evt2irq(0x700)
|
||||
#define DMTE8_IRQ evt2irq(0x740) /* DMAC1A */
|
||||
#define DMTE9_IRQ evt2irq(0x760)
|
||||
#define DMTE10_IRQ evt2irq(0xb00) /* DMAC1B */
|
||||
#define DMTE11_IRQ evt2irq(0xb20)
|
||||
#define DMAE0_IRQ evt2irq(0xbc0) /* DMA Error IRQ*/
|
||||
#define DMAE1_IRQ evt2irq(0xb40) /* DMA Error IRQ*/
|
||||
#define SH_DMAC_BASE0 0xFE008020
|
||||
#define SH_DMAC_BASE1 0xFDC08020
|
||||
#define SH_DMARS_BASE0 0xFE009000
|
||||
#define SH_DMARS_BASE1 0xFDC09000
|
||||
#elif defined(CONFIG_CPU_SUBTYPE_SH7780)
|
||||
#define DMTE0_IRQ 34
|
||||
#define DMTE4_IRQ 44
|
||||
#define DMTE6_IRQ 46
|
||||
#define DMTE8_IRQ 92
|
||||
#define DMTE9_IRQ 93
|
||||
#define DMTE10_IRQ 94
|
||||
#define DMTE11_IRQ 95
|
||||
#define DMAE0_IRQ 38 /* DMA Error IRQ */
|
||||
#define DMTE0_IRQ evt2irq(0x640)
|
||||
#define DMTE4_IRQ evt2irq(0x780)
|
||||
#define DMTE6_IRQ evt2irq(0x7c0)
|
||||
#define DMTE8_IRQ evt2irq(0xd80)
|
||||
#define DMTE9_IRQ evt2irq(0xda0)
|
||||
#define DMTE10_IRQ evt2irq(0xdc0)
|
||||
#define DMTE11_IRQ evt2irq(0xde0)
|
||||
#define DMAE0_IRQ evt2irq(0x6c0) /* DMA Error IRQ */
|
||||
#define SH_DMAC_BASE0 0xFC808020
|
||||
#define SH_DMAC_BASE1 0xFC818020
|
||||
#define SH_DMARS_BASE0 0xFC809000
|
||||
#else /* SH7785 */
|
||||
#define DMTE0_IRQ 33
|
||||
#define DMTE4_IRQ 37
|
||||
#define DMTE6_IRQ 52
|
||||
#define DMTE8_IRQ 54
|
||||
#define DMTE9_IRQ 55
|
||||
#define DMTE10_IRQ 56
|
||||
#define DMTE11_IRQ 57
|
||||
#define DMAE0_IRQ 39 /* DMA Error IRQ0 */
|
||||
#define DMAE1_IRQ 58 /* DMA Error IRQ1 */
|
||||
#define DMTE0_IRQ evt2irq(0x620)
|
||||
#define DMTE4_IRQ evt2irq(0x6a0)
|
||||
#define DMTE6_IRQ evt2irq(0x880)
|
||||
#define DMTE8_IRQ evt2irq(0x8c0)
|
||||
#define DMTE9_IRQ evt2irq(0x8e0)
|
||||
#define DMTE10_IRQ evt2irq(0x900)
|
||||
#define DMTE11_IRQ evt2irq(0x920)
|
||||
#define DMAE0_IRQ evt2irq(0x6e0) /* DMA Error IRQ0 */
|
||||
#define DMAE1_IRQ evt2irq(0x940) /* DMA Error IRQ1 */
|
||||
#define SH_DMAC_BASE0 0xFC808020
|
||||
#define SH_DMAC_BASE1 0xFCC08020
|
||||
#define SH_DMARS_BASE0 0xFC809000
|
||||
|
|
|
@ -8,13 +8,16 @@
|
|||
#include <cpu/dma-sh4a.h>
|
||||
|
||||
#else /* CONFIG_CPU_SH4A */
|
||||
|
||||
#include <linux/sh_intc.h>
|
||||
|
||||
/*
|
||||
* SH7750/SH7751/SH7760
|
||||
*/
|
||||
#define DMTE0_IRQ 34
|
||||
#define DMTE4_IRQ 44
|
||||
#define DMTE6_IRQ 46
|
||||
#define DMAE0_IRQ 38
|
||||
#define DMTE0_IRQ evt2irq(0x640)
|
||||
#define DMTE4_IRQ evt2irq(0x780)
|
||||
#define DMTE6_IRQ evt2irq(0x7c0)
|
||||
#define DMAE0_IRQ evt2irq(0x6c0)
|
||||
|
||||
#define SH_DMAC_BASE0 0xffa00000
|
||||
#define SH_DMAC_BASE1 0xffa00070
|
||||
|
|
|
@ -9,10 +9,11 @@
|
|||
* for more details.
|
||||
*
|
||||
*/
|
||||
#include <linux/sh_intc.h>
|
||||
|
||||
#define HP680_BTN_IRQ 32 /* IRQ0_IRQ */
|
||||
#define HP680_TS_IRQ 35 /* IRQ3_IRQ */
|
||||
#define HP680_HD64461_IRQ 36 /* IRQ4_IRQ */
|
||||
#define HP680_BTN_IRQ evt2irq(0x600) /* IRQ0_IRQ */
|
||||
#define HP680_TS_IRQ evt2irq(0x660) /* IRQ3_IRQ */
|
||||
#define HP680_HD64461_IRQ evt2irq(0x680) /* IRQ4_IRQ */
|
||||
|
||||
#define DAC_LCD_BRIGHTNESS 0
|
||||
#define DAC_SPEAKER_VOLUME 1
|
||||
|
|
|
@ -11,13 +11,14 @@
|
|||
* for more details.
|
||||
*
|
||||
*/
|
||||
#include <linux/sh_intc.h>
|
||||
|
||||
#define IRQ_CF1 9 /* CF1 */
|
||||
#define IRQ_CF0 10 /* CF0 */
|
||||
#define IRQ_INTD 11 /* INTD */
|
||||
#define IRQ_ETH1 12 /* Ether1 */
|
||||
#define IRQ_ETH0 13 /* Ether0 */
|
||||
#define IRQ_INTA 14 /* INTA */
|
||||
#define IRQ_CF1 evt2irq(0x320) /* CF1 */
|
||||
#define IRQ_CF0 evt2irq(0x340) /* CF0 */
|
||||
#define IRQ_INTD evt2irq(0x360) /* INTD */
|
||||
#define IRQ_ETH1 evt2irq(0x380) /* Ether1 */
|
||||
#define IRQ_ETH0 evt2irq(0x3a0) /* Ether0 */
|
||||
#define IRQ_INTA evt2irq(0x3c0) /* INTA */
|
||||
|
||||
void init_lboxre2_IRQ(void);
|
||||
|
||||
|
|
|
@ -11,6 +11,7 @@
|
|||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
#include <linux/sh_intc.h>
|
||||
#include <asm/addrspace.h>
|
||||
|
||||
/* Box specific addresses. */
|
||||
|
@ -67,9 +68,9 @@
|
|||
|
||||
#define SDK7780_NR_IRL 15
|
||||
/* IDE/ATA interrupt */
|
||||
#define IRQ_CFCARD 14
|
||||
#define IRQ_CFCARD evt2irq(0x3c0)
|
||||
/* SMC interrupt */
|
||||
#define IRQ_ETHERNET 6
|
||||
#define IRQ_ETHERNET evt2irq(0x2c0)
|
||||
|
||||
|
||||
/* arch/sh/boards/renesas/sdk7780/irq.c */
|
||||
|
|
|
@ -4,14 +4,16 @@
|
|||
#ifndef _ASM_SH_TITAN_H
|
||||
#define _ASM_SH_TITAN_H
|
||||
|
||||
#include <linux/sh_intc.h>
|
||||
|
||||
#define __IO_PREFIX titan
|
||||
#include <asm/io_generic.h>
|
||||
|
||||
/* IRQ assignments */
|
||||
#define TITAN_IRQ_WAN 2 /* eth0 (WAN) */
|
||||
#define TITAN_IRQ_LAN 5 /* eth1 (LAN) */
|
||||
#define TITAN_IRQ_MPCIA 8 /* mPCI A */
|
||||
#define TITAN_IRQ_MPCIB 11 /* mPCI B */
|
||||
#define TITAN_IRQ_USB 11 /* USB */
|
||||
#define TITAN_IRQ_WAN evt2irq(0x240) /* eth0 (WAN) */
|
||||
#define TITAN_IRQ_LAN evt2irq(0x2a0) /* eth1 (LAN) */
|
||||
#define TITAN_IRQ_MPCIA evt2irq(0x300) /* mPCI A */
|
||||
#define TITAN_IRQ_MPCIB evt2irq(0x360) /* mPCI B */
|
||||
#define TITAN_IRQ_USB evt2irq(0x360) /* USB */
|
||||
|
||||
#endif /* __ASM_SH_TITAN_H */
|
||||
|
|
|
@ -8,6 +8,7 @@
|
|||
*
|
||||
* IO-DATA LANDISK support
|
||||
*/
|
||||
#include <linux/sh_intc.h>
|
||||
|
||||
/* Box specific addresses. */
|
||||
|
||||
|
@ -25,15 +26,15 @@
|
|||
#define PA_PIDE_OFFSET 0x40 /* CF IDE Offset */
|
||||
#define PA_SIDE_OFFSET 0x40 /* HDD IDE Offset */
|
||||
|
||||
#define IRQ_PCIINTA 5 /* PCI INTA IRQ */
|
||||
#define IRQ_PCIINTB 6 /* PCI INTB IRQ */
|
||||
#define IRQ_PCIINTC 7 /* PCI INTC IRQ */
|
||||
#define IRQ_PCIINTD 8 /* PCI INTD IRQ */
|
||||
#define IRQ_ATA 9 /* ATA IRQ */
|
||||
#define IRQ_FATA 10 /* FATA IRQ */
|
||||
#define IRQ_POWER 11 /* Power Switch IRQ */
|
||||
#define IRQ_BUTTON 12 /* USL-5P Button IRQ */
|
||||
#define IRQ_FAULT 13 /* USL-5P Fault IRQ */
|
||||
#define IRQ_PCIINTA evt2irq(0x2a0) /* PCI INTA IRQ */
|
||||
#define IRQ_PCIINTB evt2irq(0x2c0) /* PCI INTB IRQ */
|
||||
#define IRQ_PCIINTC evt2irq(0x2e0) /* PCI INTC IRQ */
|
||||
#define IRQ_PCIINTD evt2irq(0x300) /* PCI INTD IRQ */
|
||||
#define IRQ_ATA evt2irq(0x320) /* ATA IRQ */
|
||||
#define IRQ_FATA evt2irq(0x340) /* FATA IRQ */
|
||||
#define IRQ_POWER evt2irq(0x360) /* Power Switch IRQ */
|
||||
#define IRQ_BUTTON evt2irq(0x380) /* USL-5P Button IRQ */
|
||||
#define IRQ_FAULT evt2irq(0x3a0) /* USL-5P Fault IRQ */
|
||||
|
||||
void init_landisk_IRQ(void);
|
||||
|
||||
|
|
|
@ -8,6 +8,7 @@
|
|||
*
|
||||
* Hitachi SolutionEngine support
|
||||
*/
|
||||
#include <linux/sh_intc.h>
|
||||
|
||||
/* Box specific addresses. */
|
||||
|
||||
|
@ -82,16 +83,16 @@
|
|||
#define INTC_IPRD 0xa4000018UL
|
||||
#define INTC_IPRE 0xa400001aUL
|
||||
|
||||
#define IRQ0_IRQ 32
|
||||
#define IRQ1_IRQ 33
|
||||
#define IRQ0_IRQ evt2irq(0x600)
|
||||
#define IRQ1_IRQ evt2irq(0x620)
|
||||
#endif
|
||||
|
||||
#if defined(CONFIG_CPU_SUBTYPE_SH7705)
|
||||
#define IRQ_STNIC 12
|
||||
#define IRQ_CFCARD 14
|
||||
#define IRQ_STNIC evt2irq(0x380)
|
||||
#define IRQ_CFCARD evt2irq(0x3c0)
|
||||
#else
|
||||
#define IRQ_STNIC 10
|
||||
#define IRQ_CFCARD 7
|
||||
#define IRQ_STNIC evt2irq(0x340)
|
||||
#define IRQ_CFCARD evt2irq(0x2e0)
|
||||
#endif
|
||||
|
||||
/* SH Ether support (SH7710/SH7712) */
|
||||
|
@ -105,9 +106,9 @@
|
|||
# define PHY_ID 0x01
|
||||
#endif
|
||||
/* Ether IRQ */
|
||||
#define SH_ETH0_IRQ 80
|
||||
#define SH_ETH1_IRQ 81
|
||||
#define SH_TSU_IRQ 82
|
||||
#define SH_ETH0_IRQ evt2irq(0xc00)
|
||||
#define SH_ETH1_IRQ evt2irq(0xc20)
|
||||
#define SH_TSU_IRQ evt2irq(0xc40)
|
||||
|
||||
void init_se_IRQ(void);
|
||||
|
||||
|
|
|
@ -8,6 +8,7 @@
|
|||
*
|
||||
* SH-Mobile SolutionEngine 7343 support
|
||||
*/
|
||||
#include <linux/sh_intc.h>
|
||||
|
||||
/* Box specific addresses. */
|
||||
|
||||
|
@ -118,10 +119,10 @@
|
|||
#define FPGA_IN 0xb1400000
|
||||
#define FPGA_OUT 0xb1400002
|
||||
|
||||
#define IRQ0_IRQ 32
|
||||
#define IRQ1_IRQ 33
|
||||
#define IRQ4_IRQ 36
|
||||
#define IRQ5_IRQ 37
|
||||
#define IRQ0_IRQ evt2irq(0x600)
|
||||
#define IRQ1_IRQ evt2irq(0x620)
|
||||
#define IRQ4_IRQ evt2irq(0x680)
|
||||
#define IRQ5_IRQ evt2irq(0x6a0)
|
||||
|
||||
#define SE7343_FPGA_IRQ_MRSHPC0 0
|
||||
#define SE7343_FPGA_IRQ_MRSHPC1 1
|
||||
|
|
|
@ -11,6 +11,8 @@
|
|||
|
||||
#ifndef __ASM_SH_SE7721_H
|
||||
#define __ASM_SH_SE7721_H
|
||||
|
||||
#include <linux/sh_intc.h>
|
||||
#include <asm/addrspace.h>
|
||||
|
||||
/* Box specific addresses. */
|
||||
|
@ -49,9 +51,9 @@
|
|||
#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
|
||||
|
||||
#define PA_LED 0xB6800000 /* 8bit LED */
|
||||
#define PA_FPGA 0xB7000000 /* FPGA base address */
|
||||
#define PA_FPGA 0xB7000000 /* FPGA base address */
|
||||
|
||||
#define MRSHPC_IRQ0 10
|
||||
#define MRSHPC_IRQ0 evt2irq(0x340)
|
||||
|
||||
#define FPGA_ILSR1 (PA_FPGA + 0x02)
|
||||
#define FPGA_ILSR2 (PA_FPGA + 0x03)
|
||||
|
|
|
@ -13,6 +13,7 @@
|
|||
* for more details.
|
||||
*
|
||||
*/
|
||||
#include <linux/sh_intc.h>
|
||||
#include <asm/addrspace.h>
|
||||
|
||||
/* Box specific addresses. */
|
||||
|
@ -31,7 +32,7 @@
|
|||
|
||||
#define PA_PERIPHERAL 0xB0000000
|
||||
|
||||
#define PA_PCIC PA_PERIPHERAL /* MR-SHPC-01 PCMCIA */
|
||||
#define PA_PCIC PA_PERIPHERAL /* MR-SHPC-01 PCMCIA */
|
||||
#define PA_MRSHPC (PA_PERIPHERAL + 0x003fffe0) /* MR-SHPC-01 PCMCIA controller */
|
||||
#define PA_MRSHPC_MW1 (PA_PERIPHERAL + 0x00400000) /* MR-SHPC-01 memory window base */
|
||||
#define PA_MRSHPC_MW2 (PA_PERIPHERAL + 0x00500000) /* MR-SHPC-01 attribute window base */
|
||||
|
@ -51,7 +52,7 @@
|
|||
#define MRSHPC_PCIC_INFO (PA_MRSHPC + 30)
|
||||
|
||||
#define PA_LED (PA_PERIPHERAL + 0x00800000) /* 8bit LED */
|
||||
#define PA_FPGA (PA_PERIPHERAL + 0x01800000) /* FPGA base address */
|
||||
#define PA_FPGA (PA_PERIPHERAL + 0x01800000) /* FPGA base address */
|
||||
|
||||
#define PA_LAN (PA_AREA6_IO + 0) /* SMC LAN91C111 */
|
||||
/* GPIO */
|
||||
|
@ -77,8 +78,8 @@
|
|||
#define PORT_HIZCRC 0xA405015CUL
|
||||
|
||||
/* IRQ */
|
||||
#define IRQ0_IRQ 32
|
||||
#define IRQ1_IRQ 33
|
||||
#define IRQ0_IRQ evt2irq(0x600)
|
||||
#define IRQ1_IRQ evt2irq(0x620)
|
||||
|
||||
#define IRQ01_MODE 0xb1800000
|
||||
#define IRQ01_STS 0xb1800004
|
||||
|
|
|
@ -18,6 +18,7 @@
|
|||
* for more details.
|
||||
*
|
||||
*/
|
||||
#include <linux/sh_intc.h>
|
||||
#include <asm/addrspace.h>
|
||||
|
||||
/* SH Eth */
|
||||
|
@ -35,9 +36,9 @@
|
|||
#define IRQ2_MR (0xba200028)
|
||||
|
||||
/* IRQ */
|
||||
#define IRQ0_IRQ 32
|
||||
#define IRQ1_IRQ 33
|
||||
#define IRQ2_IRQ 34
|
||||
#define IRQ0_IRQ evt2irq(0x600)
|
||||
#define IRQ1_IRQ evt2irq(0x620)
|
||||
#define IRQ2_IRQ evt2irq(0x640)
|
||||
|
||||
/* Bits in IRQ012 registers */
|
||||
#define SE7724_FPGA_IRQ_BASE 220
|
||||
|
|
|
@ -11,6 +11,7 @@
|
|||
* Modified for 7751 Solution Engine by
|
||||
* Ian da Silva and Jeremy Siegel, 2001.
|
||||
*/
|
||||
#include <linux/sh_intc.h>
|
||||
|
||||
/* Box specific addresses. */
|
||||
|
||||
|
@ -63,7 +64,7 @@
|
|||
#define BCR_ILCRF (PA_BCR + 10)
|
||||
#define BCR_ILCRG (PA_BCR + 12)
|
||||
|
||||
#define IRQ_79C973 13
|
||||
#define IRQ_79C973 evt2irq(0x3a0)
|
||||
|
||||
void init_7751se_IRQ(void);
|
||||
|
||||
|
|
|
@ -12,6 +12,7 @@
|
|||
* License. See the file "COPYING" in the main directory of this archive
|
||||
* for more details.
|
||||
*/
|
||||
#include <linux/sh_intc.h>
|
||||
#include <asm/addrspace.h>
|
||||
|
||||
/* Box specific addresses. */
|
||||
|
@ -80,13 +81,13 @@
|
|||
#define IRQPOS_PCCPW (0 * 4)
|
||||
|
||||
/* IDE interrupt */
|
||||
#define IRQ_IDE0 67 /* iVDR */
|
||||
#define IRQ_IDE0 evt2irq(0xa60) /* iVDR */
|
||||
|
||||
/* SMC interrupt */
|
||||
#define SMC_IRQ 8
|
||||
#define SMC_IRQ evt2irq(0x300)
|
||||
|
||||
/* SM501 interrupt */
|
||||
#define SM501_IRQ 0
|
||||
#define SM501_IRQ evt2irq(0x200)
|
||||
|
||||
/* interrupt pin */
|
||||
#define IRQPIN_EXTINT1 0 /* IRQ0 pin */
|
||||
|
|
|
@ -14,6 +14,7 @@
|
|||
#include <linux/serial.h>
|
||||
#include <linux/serial_sci.h>
|
||||
#include <linux/sh_timer.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <asm/rtc.h>
|
||||
#include <cpu/serial.h>
|
||||
|
||||
|
@ -114,7 +115,7 @@ static struct resource rtc_resources[] = {
|
|||
.flags = IORESOURCE_IO,
|
||||
},
|
||||
[1] = {
|
||||
.start = 20,
|
||||
.start = evt2irq(0x480),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -146,7 +147,7 @@ static struct resource tmu0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 16,
|
||||
.start = evt2irq(0x400),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -174,7 +175,7 @@ static struct resource tmu1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 17,
|
||||
.start = evt2irq(0x420),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -201,7 +202,7 @@ static struct resource tmu2_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 18,
|
||||
.start = evt2irq(0x440),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -19,6 +19,7 @@
|
|||
#include <linux/serial.h>
|
||||
#include <linux/serial_sci.h>
|
||||
#include <linux/sh_timer.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <cpu/serial.h>
|
||||
|
||||
enum {
|
||||
|
@ -95,7 +96,7 @@ static struct resource rtc_resources[] = {
|
|||
.flags = IORESOURCE_IO,
|
||||
},
|
||||
[1] = {
|
||||
.start = 20,
|
||||
.start = evt2irq(0x480),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -114,7 +115,7 @@ static struct plat_sci_port scif0_platform_data = {
|
|||
.scscr = SCSCR_TE | SCSCR_RE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCI,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x4E0)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x4e0)),
|
||||
.ops = &sh770x_sci_port_ops,
|
||||
.regshift = 1,
|
||||
};
|
||||
|
@ -184,7 +185,7 @@ static struct resource tmu0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 16,
|
||||
.start = evt2irq(0x400),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -212,7 +213,7 @@ static struct resource tmu1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 17,
|
||||
.start = evt2irq(0x420),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -239,7 +240,7 @@ static struct resource tmu2_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 18,
|
||||
.start = evt2irq(0x440),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -14,6 +14,7 @@
|
|||
#include <linux/serial.h>
|
||||
#include <linux/serial_sci.h>
|
||||
#include <linux/sh_timer.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <asm/rtc.h>
|
||||
|
||||
enum {
|
||||
|
@ -77,7 +78,7 @@ static struct resource rtc_resources[] = {
|
|||
.flags = IORESOURCE_IO,
|
||||
},
|
||||
[1] = {
|
||||
.start = 20,
|
||||
.start = evt2irq(0x480),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -121,7 +122,7 @@ static struct plat_sci_port scif1_platform_data = {
|
|||
SCSCR_CKE1 | SCSCR_CKE0,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x900)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x900)),
|
||||
};
|
||||
|
||||
static struct platform_device scif1_device = {
|
||||
|
@ -145,7 +146,7 @@ static struct resource tmu0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 16,
|
||||
.start = evt2irq(0x400),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -173,7 +174,7 @@ static struct resource tmu1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 17,
|
||||
.start = evt2irq(0x420),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -200,7 +201,7 @@ static struct resource tmu2_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 18,
|
||||
.start = evt2irq(0x440),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -19,6 +19,7 @@
|
|||
#include <linux/io.h>
|
||||
#include <linux/serial_sci.h>
|
||||
#include <linux/sh_timer.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <asm/rtc.h>
|
||||
#include <cpu/serial.h>
|
||||
|
||||
|
@ -30,7 +31,7 @@ static struct resource rtc_resources[] = {
|
|||
},
|
||||
[1] = {
|
||||
/* Shared Period/Carry/Alarm IRQ */
|
||||
.start = 20,
|
||||
.start = evt2irq(0x480),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -55,7 +56,7 @@ static struct plat_sci_port scif0_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_4,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xC00)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xc00)),
|
||||
.ops = &sh7720_sci_port_ops,
|
||||
.regtype = SCIx_SH7705_SCIF_REGTYPE,
|
||||
};
|
||||
|
@ -74,7 +75,7 @@ static struct plat_sci_port scif1_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_4,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xC20)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xc20)),
|
||||
.ops = &sh7720_sci_port_ops,
|
||||
.regtype = SCIx_SH7705_SCIF_REGTYPE,
|
||||
};
|
||||
|
@ -94,13 +95,14 @@ static struct resource usb_ohci_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 67,
|
||||
.end = 67,
|
||||
.start = evt2irq(0xa60),
|
||||
.end = evt2irq(0xa60),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static u64 usb_ohci_dma_mask = 0xffffffffUL;
|
||||
|
||||
static struct platform_device usb_ohci_device = {
|
||||
.name = "sh_ohci",
|
||||
.id = -1,
|
||||
|
@ -121,8 +123,8 @@ static struct resource usbf_resources[] = {
|
|||
},
|
||||
[1] = {
|
||||
.name = "sh_udc",
|
||||
.start = 65,
|
||||
.end = 65,
|
||||
.start = evt2irq(0xa20),
|
||||
.end = evt2irq(0xa20),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -152,7 +154,7 @@ static struct resource cmt0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 104,
|
||||
.start = evt2irq(0xf00),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -179,7 +181,7 @@ static struct resource cmt1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 104,
|
||||
.start = evt2irq(0xf00),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -206,7 +208,7 @@ static struct resource cmt2_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 104,
|
||||
.start = evt2irq(0xf00),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -233,7 +235,7 @@ static struct resource cmt3_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 104,
|
||||
.start = evt2irq(0xf00),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -260,7 +262,7 @@ static struct resource cmt4_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 104,
|
||||
.start = evt2irq(0xf00),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -288,7 +290,7 @@ static struct resource tmu0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 16,
|
||||
.start = evt2irq(0x400),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -316,7 +318,7 @@ static struct resource tmu1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 17,
|
||||
.start = evt2irq(0x420),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -343,7 +345,7 @@ static struct resource tmu2_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 18,
|
||||
.start = evt2irq(0x440),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -13,6 +13,7 @@
|
|||
#include <linux/serial.h>
|
||||
#include <linux/serial_sci.h>
|
||||
#include <linux/sh_timer.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
static struct plat_sci_port scif0_platform_data = {
|
||||
|
@ -21,7 +22,10 @@ static struct plat_sci_port scif0_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = { 40, 41, 43, 42 },
|
||||
.irqs = { evt2irq(0x700),
|
||||
evt2irq(0x720),
|
||||
evt2irq(0x760),
|
||||
evt2irq(0x740) },
|
||||
};
|
||||
|
||||
static struct platform_device scif0_device = {
|
||||
|
@ -45,7 +49,7 @@ static struct resource tmu0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 16,
|
||||
.start = evt2irq(0x400),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -73,7 +77,7 @@ static struct resource tmu1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 17,
|
||||
.start = evt2irq(0x420),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -100,7 +104,7 @@ static struct resource tmu2_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 18,
|
||||
.start = evt2irq(0x440),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -13,6 +13,7 @@
|
|||
#include <linux/serial.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/sh_timer.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <linux/serial_sci.h>
|
||||
#include <generated/machtypes.h>
|
||||
|
||||
|
@ -24,7 +25,7 @@ static struct resource rtc_resources[] = {
|
|||
},
|
||||
[1] = {
|
||||
/* Shared Period/Carry/Alarm IRQ */
|
||||
.start = 20,
|
||||
.start = evt2irq(0x480),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -43,7 +44,7 @@ static struct plat_sci_port sci_platform_data = {
|
|||
.scscr = SCSCR_TE | SCSCR_RE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCI,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xE40)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x4e0)),
|
||||
.regshift = 2,
|
||||
};
|
||||
|
||||
|
@ -85,7 +86,7 @@ static struct resource tmu0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 16,
|
||||
.start = evt2irq(0x400),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -113,7 +114,7 @@ static struct resource tmu1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 17,
|
||||
.start = evt2irq(0x420),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -140,7 +141,7 @@ static struct resource tmu2_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 18,
|
||||
.start = evt2irq(0x440),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -172,7 +173,7 @@ static struct resource tmu3_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 72,
|
||||
.start = evt2irq(0xb00),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -199,7 +200,7 @@ static struct resource tmu4_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 76,
|
||||
.start = evt2irq(0xb80),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -11,6 +11,7 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/serial.h>
|
||||
#include <linux/sh_timer.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <linux/serial_sci.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
|
@ -132,7 +133,10 @@ static struct plat_sci_port scif0_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = { 52, 53, 55, 54 },
|
||||
.irqs = { evt2irq(0x880),
|
||||
evt2irq(0x8a0),
|
||||
evt2irq(0x8e0),
|
||||
evt2irq(0x8c0) },
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
|
||||
|
@ -150,7 +154,10 @@ static struct plat_sci_port scif1_platform_data = {
|
|||
.type = PORT_SCIF,
|
||||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.irqs = { 72, 73, 75, 74 },
|
||||
.irqs = { evt2irq(0xb00),
|
||||
evt2irq(0xb20),
|
||||
evt2irq(0xb60),
|
||||
evt2irq(0xb40) },
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
|
||||
|
@ -168,7 +175,10 @@ static struct plat_sci_port scif2_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = { 76, 77, 79, 78 },
|
||||
.irqs = { evt2irq(0xb80),
|
||||
evt2irq(0xba0),
|
||||
evt2irq(0xbe0),
|
||||
evt2irq(0xbc0) },
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
|
||||
|
@ -186,7 +196,9 @@ static struct plat_sci_port scif3_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCI,
|
||||
.irqs = { 80, 81, 82, 0 },
|
||||
.irqs = { evt2irq(0xc00),
|
||||
evt2irq(0xc20),
|
||||
evt2irq(0xc40), },
|
||||
.regshift = 2,
|
||||
};
|
||||
|
||||
|
@ -211,7 +223,7 @@ static struct resource tmu0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 16,
|
||||
.start = evt2irq(0x400),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -239,7 +251,7 @@ static struct resource tmu1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 17,
|
||||
.start = evt2irq(0x420),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -266,7 +278,7 @@ static struct resource tmu2_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 18,
|
||||
.start = evt2irq(0x440),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -13,6 +13,7 @@
|
|||
#include <linux/serial_sci.h>
|
||||
#include <linux/uio_driver.h>
|
||||
#include <linux/sh_timer.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <asm/clock.h>
|
||||
|
||||
/* Serial */
|
||||
|
@ -22,7 +23,7 @@ static struct plat_sci_port scif0_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xC00)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xc00)),
|
||||
};
|
||||
|
||||
static struct platform_device scif0_device = {
|
||||
|
@ -39,7 +40,7 @@ static struct plat_sci_port scif1_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xC20)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xc20)),
|
||||
};
|
||||
|
||||
static struct platform_device scif1_device = {
|
||||
|
@ -56,7 +57,7 @@ static struct plat_sci_port scif2_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xC40)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xc40)),
|
||||
};
|
||||
|
||||
static struct platform_device scif2_device = {
|
||||
|
@ -73,7 +74,7 @@ static struct plat_sci_port scif3_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_CKE1,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xC60)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xc60)),
|
||||
};
|
||||
|
||||
static struct platform_device scif3_device = {
|
||||
|
@ -92,8 +93,8 @@ static struct resource iic0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 96,
|
||||
.end = 99,
|
||||
.start = evt2irq(0xe00),
|
||||
.end = evt2irq(0xe60),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -113,8 +114,8 @@ static struct resource iic1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 44,
|
||||
.end = 47,
|
||||
.start = evt2irq(0x780),
|
||||
.end = evt2irq(0x7e0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -129,7 +130,7 @@ static struct platform_device iic1_device = {
|
|||
static struct uio_info vpu_platform_data = {
|
||||
.name = "VPU4",
|
||||
.version = "0",
|
||||
.irq = 60,
|
||||
.irq = evt2irq(0x980),
|
||||
};
|
||||
|
||||
static struct resource vpu_resources[] = {
|
||||
|
@ -157,7 +158,7 @@ static struct platform_device vpu_device = {
|
|||
static struct uio_info veu_platform_data = {
|
||||
.name = "VEU",
|
||||
.version = "0",
|
||||
.irq = 54,
|
||||
.irq = evt2irq(0x8c0),
|
||||
};
|
||||
|
||||
static struct resource veu_resources[] = {
|
||||
|
@ -185,7 +186,7 @@ static struct platform_device veu_device = {
|
|||
static struct uio_info jpu_platform_data = {
|
||||
.name = "JPU",
|
||||
.version = "0",
|
||||
.irq = 27,
|
||||
.irq = evt2irq(0x560),
|
||||
};
|
||||
|
||||
static struct resource jpu_resources[] = {
|
||||
|
@ -224,7 +225,7 @@ static struct resource cmt_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 104,
|
||||
.start = evt2irq(0xf00),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -252,7 +253,7 @@ static struct resource tmu0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 16,
|
||||
.start = evt2irq(0x400),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -280,7 +281,7 @@ static struct resource tmu1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 17,
|
||||
.start = evt2irq(0x420),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -307,7 +308,7 @@ static struct resource tmu2_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 18,
|
||||
.start = evt2irq(0x440),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -15,6 +15,7 @@
|
|||
#include <linux/serial_sci.h>
|
||||
#include <linux/uio_driver.h>
|
||||
#include <linux/sh_timer.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <linux/usb/r8a66597.h>
|
||||
#include <asm/clock.h>
|
||||
|
||||
|
@ -25,7 +26,7 @@ static struct plat_sci_port scif0_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xC00)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xc00)),
|
||||
};
|
||||
|
||||
static struct platform_device scif0_device = {
|
||||
|
@ -44,8 +45,8 @@ static struct resource iic_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 96,
|
||||
.end = 99,
|
||||
.start = evt2irq(0xe00),
|
||||
.end = evt2irq(0xe60),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -68,8 +69,8 @@ static struct resource usb_host_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 65,
|
||||
.end = 65,
|
||||
.start = evt2irq(0xa20),
|
||||
.end = evt2irq(0xa20),
|
||||
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
|
||||
},
|
||||
};
|
||||
|
@ -89,7 +90,7 @@ static struct platform_device usb_host_device = {
|
|||
static struct uio_info vpu_platform_data = {
|
||||
.name = "VPU5",
|
||||
.version = "0",
|
||||
.irq = 60,
|
||||
.irq = evt2irq(0x980),
|
||||
};
|
||||
|
||||
static struct resource vpu_resources[] = {
|
||||
|
@ -117,7 +118,7 @@ static struct platform_device vpu_device = {
|
|||
static struct uio_info veu0_platform_data = {
|
||||
.name = "VEU",
|
||||
.version = "0",
|
||||
.irq = 54,
|
||||
.irq = evt2irq(0x8c0),
|
||||
};
|
||||
|
||||
static struct resource veu0_resources[] = {
|
||||
|
@ -145,7 +146,7 @@ static struct platform_device veu0_device = {
|
|||
static struct uio_info veu1_platform_data = {
|
||||
.name = "VEU",
|
||||
.version = "0",
|
||||
.irq = 27,
|
||||
.irq = evt2irq(0x560),
|
||||
};
|
||||
|
||||
static struct resource veu1_resources[] = {
|
||||
|
@ -184,7 +185,7 @@ static struct resource cmt_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 104,
|
||||
.start = evt2irq(0xf00),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -240,7 +241,7 @@ static struct resource tmu1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 17,
|
||||
.start = evt2irq(0x420),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -267,7 +268,7 @@ static struct resource tmu2_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 18,
|
||||
.start = evt2irq(0x440),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -13,6 +13,7 @@
|
|||
#include <linux/serial.h>
|
||||
#include <linux/serial_sci.h>
|
||||
#include <linux/sh_timer.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <linux/uio_driver.h>
|
||||
#include <linux/usb/m66592.h>
|
||||
|
||||
|
@ -147,20 +148,20 @@ static struct resource sh7722_dmae_resources[] = {
|
|||
},
|
||||
{
|
||||
.name = "error_irq",
|
||||
.start = 78,
|
||||
.end = 78,
|
||||
.start = evt2irq(0xbc0),
|
||||
.end = evt2irq(0xbc0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels 0-3 */
|
||||
.start = 48,
|
||||
.end = 51,
|
||||
.start = evt2irq(0x800),
|
||||
.end = evt2irq(0x860),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels 4-5 */
|
||||
.start = 76,
|
||||
.end = 77,
|
||||
.start = evt2irq(0xb80),
|
||||
.end = evt2irq(0xba0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -182,7 +183,7 @@ static struct plat_sci_port scif0_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xC00)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xc00)),
|
||||
.ops = &sh7722_sci_port_ops,
|
||||
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
|
||||
};
|
||||
|
@ -201,7 +202,7 @@ static struct plat_sci_port scif1_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xC20)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xc20)),
|
||||
.ops = &sh7722_sci_port_ops,
|
||||
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
|
||||
};
|
||||
|
@ -220,7 +221,7 @@ static struct plat_sci_port scif2_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xC40)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xc40)),
|
||||
.ops = &sh7722_sci_port_ops,
|
||||
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
|
||||
};
|
||||
|
@ -241,17 +242,17 @@ static struct resource rtc_resources[] = {
|
|||
},
|
||||
[1] = {
|
||||
/* Period IRQ */
|
||||
.start = 45,
|
||||
.start = evt2irq(0x7a0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
[2] = {
|
||||
/* Carry IRQ */
|
||||
.start = 46,
|
||||
.start = evt2irq(0x7c0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
[3] = {
|
||||
/* Alarm IRQ */
|
||||
.start = 44,
|
||||
.start = evt2irq(0x780),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -275,8 +276,8 @@ static struct resource usbf_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 65,
|
||||
.end = 65,
|
||||
.start = evt2irq(0xa20),
|
||||
.end = evt2irq(0xa20),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -301,8 +302,8 @@ static struct resource iic_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 96,
|
||||
.end = 99,
|
||||
.start = evt2irq(0xe00),
|
||||
.end = evt2irq(0xe60),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -317,7 +318,7 @@ static struct platform_device iic_device = {
|
|||
static struct uio_info vpu_platform_data = {
|
||||
.name = "VPU4",
|
||||
.version = "0",
|
||||
.irq = 60,
|
||||
.irq = evt2irq(0x980),
|
||||
};
|
||||
|
||||
static struct resource vpu_resources[] = {
|
||||
|
@ -345,7 +346,7 @@ static struct platform_device vpu_device = {
|
|||
static struct uio_info veu_platform_data = {
|
||||
.name = "VEU",
|
||||
.version = "0",
|
||||
.irq = 54,
|
||||
.irq = evt2irq(0x8c0),
|
||||
};
|
||||
|
||||
static struct resource veu_resources[] = {
|
||||
|
@ -373,7 +374,7 @@ static struct platform_device veu_device = {
|
|||
static struct uio_info jpu_platform_data = {
|
||||
.name = "JPU",
|
||||
.version = "0",
|
||||
.irq = 27,
|
||||
.irq = evt2irq(0x560),
|
||||
};
|
||||
|
||||
static struct resource jpu_resources[] = {
|
||||
|
@ -412,7 +413,7 @@ static struct resource cmt_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 104,
|
||||
.start = evt2irq(0xf00),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -440,7 +441,7 @@ static struct resource tmu0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 16,
|
||||
.start = evt2irq(0x400),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -468,7 +469,7 @@ static struct resource tmu1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 17,
|
||||
.start = evt2irq(0x420),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -525,7 +526,7 @@ static struct resource siu_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 108,
|
||||
.start = evt2irq(0xf80),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -15,6 +15,7 @@
|
|||
#include <linux/uio_driver.h>
|
||||
#include <linux/usb/r8a66597.h>
|
||||
#include <linux/sh_timer.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <linux/io.h>
|
||||
#include <asm/clock.h>
|
||||
#include <asm/mmzone.h>
|
||||
|
@ -28,7 +29,7 @@ static struct plat_sci_port scif0_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xC00)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xc00)),
|
||||
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
|
||||
};
|
||||
|
||||
|
@ -47,7 +48,7 @@ static struct plat_sci_port scif1_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xC20)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xc20)),
|
||||
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
|
||||
};
|
||||
|
||||
|
@ -66,7 +67,7 @@ static struct plat_sci_port scif2_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xC40)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xc40)),
|
||||
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
|
||||
};
|
||||
|
||||
|
@ -85,7 +86,7 @@ static struct plat_sci_port scif3_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_3,
|
||||
.type = PORT_SCIFA,
|
||||
.irqs = { 56, 56, 56, 56 },
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x900)),
|
||||
};
|
||||
|
||||
static struct platform_device scif3_device = {
|
||||
|
@ -103,7 +104,7 @@ static struct plat_sci_port scif4_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_3,
|
||||
.type = PORT_SCIFA,
|
||||
.irqs = { 88, 88, 88, 88 },
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xd00)),
|
||||
};
|
||||
|
||||
static struct platform_device scif4_device = {
|
||||
|
@ -121,7 +122,7 @@ static struct plat_sci_port scif5_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_3,
|
||||
.type = PORT_SCIFA,
|
||||
.irqs = { 109, 109, 109, 109 },
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xfa0)),
|
||||
};
|
||||
|
||||
static struct platform_device scif5_device = {
|
||||
|
@ -135,7 +136,7 @@ static struct platform_device scif5_device = {
|
|||
static struct uio_info vpu_platform_data = {
|
||||
.name = "VPU5",
|
||||
.version = "0",
|
||||
.irq = 60,
|
||||
.irq = evt2irq(0x980),
|
||||
};
|
||||
|
||||
static struct resource vpu_resources[] = {
|
||||
|
@ -163,7 +164,7 @@ static struct platform_device vpu_device = {
|
|||
static struct uio_info veu0_platform_data = {
|
||||
.name = "VEU2H",
|
||||
.version = "0",
|
||||
.irq = 54,
|
||||
.irq = evt2irq(0x8c0),
|
||||
};
|
||||
|
||||
static struct resource veu0_resources[] = {
|
||||
|
@ -191,7 +192,7 @@ static struct platform_device veu0_device = {
|
|||
static struct uio_info veu1_platform_data = {
|
||||
.name = "VEU2H",
|
||||
.version = "0",
|
||||
.irq = 27,
|
||||
.irq = evt2irq(0x560),
|
||||
};
|
||||
|
||||
static struct resource veu1_resources[] = {
|
||||
|
@ -230,7 +231,7 @@ static struct resource cmt_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 104,
|
||||
.start = evt2irq(0xf00),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -258,7 +259,7 @@ static struct resource tmu0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 16,
|
||||
.start = evt2irq(0x400),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -286,7 +287,7 @@ static struct resource tmu1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 17,
|
||||
.start = evt2irq(0x420),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -313,7 +314,7 @@ static struct resource tmu2_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 18,
|
||||
.start = evt2irq(0x440),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -340,7 +341,7 @@ static struct resource tmu3_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 57,
|
||||
.start = evt2irq(0x920),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -367,7 +368,7 @@ static struct resource tmu4_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 58,
|
||||
.start = evt2irq(0x940),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -394,7 +395,7 @@ static struct resource tmu5_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 57,
|
||||
.start = evt2irq(0x920),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -417,17 +418,17 @@ static struct resource rtc_resources[] = {
|
|||
},
|
||||
[1] = {
|
||||
/* Period IRQ */
|
||||
.start = 69,
|
||||
.start = evt2irq(0xaa0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
[2] = {
|
||||
/* Carry IRQ */
|
||||
.start = 70,
|
||||
.start = evt2irq(0xac0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
[3] = {
|
||||
/* Alarm IRQ */
|
||||
.start = 68,
|
||||
.start = evt2irq(0xa80),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -450,8 +451,8 @@ static struct resource sh7723_usb_host_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 65,
|
||||
.end = 65,
|
||||
.start = evt2irq(0xa20),
|
||||
.end = evt2irq(0xa20),
|
||||
.flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
|
||||
},
|
||||
};
|
||||
|
@ -476,8 +477,8 @@ static struct resource iic_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 96,
|
||||
.end = 99,
|
||||
.start = evt2irq(0xe00),
|
||||
.end = evt2irq(0xe60),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -20,6 +20,7 @@
|
|||
#include <linux/uio_driver.h>
|
||||
#include <linux/sh_dma.h>
|
||||
#include <linux/sh_timer.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/notifier.h>
|
||||
|
||||
|
@ -215,20 +216,20 @@ static struct resource sh7724_dmae0_resources[] = {
|
|||
},
|
||||
{
|
||||
.name = "error_irq",
|
||||
.start = 78,
|
||||
.end = 78,
|
||||
.start = evt2irq(0xbc0),
|
||||
.end = evt2irq(0xbc0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels 0-3 */
|
||||
.start = 48,
|
||||
.end = 51,
|
||||
.start = evt2irq(0x800),
|
||||
.end = evt2irq(0x860),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels 4-5 */
|
||||
.start = 76,
|
||||
.end = 77,
|
||||
.start = evt2irq(0xb80),
|
||||
.end = evt2irq(0xba0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -249,20 +250,20 @@ static struct resource sh7724_dmae1_resources[] = {
|
|||
},
|
||||
{
|
||||
.name = "error_irq",
|
||||
.start = 74,
|
||||
.end = 74,
|
||||
.start = evt2irq(0xb40),
|
||||
.end = evt2irq(0xb40),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels 0-3 */
|
||||
.start = 40,
|
||||
.end = 43,
|
||||
.start = evt2irq(0x700),
|
||||
.end = evt2irq(0x760),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels 4-5 */
|
||||
.start = 72,
|
||||
.end = 73,
|
||||
.start = evt2irq(0xb00),
|
||||
.end = evt2irq(0xb20),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -295,7 +296,7 @@ static struct plat_sci_port scif0_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xC00)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xc00)),
|
||||
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
|
||||
};
|
||||
|
||||
|
@ -314,7 +315,7 @@ static struct plat_sci_port scif1_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xC20)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xc20)),
|
||||
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
|
||||
};
|
||||
|
||||
|
@ -333,7 +334,7 @@ static struct plat_sci_port scif2_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xC40)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xc40)),
|
||||
.regtype = SCIx_SH4_SCIF_NO_SCSPTR_REGTYPE,
|
||||
};
|
||||
|
||||
|
@ -352,7 +353,7 @@ static struct plat_sci_port scif3_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_3,
|
||||
.type = PORT_SCIFA,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x900)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x900)),
|
||||
};
|
||||
|
||||
static struct platform_device scif3_device = {
|
||||
|
@ -370,7 +371,7 @@ static struct plat_sci_port scif4_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_3,
|
||||
.type = PORT_SCIFA,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xD00)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xd00)),
|
||||
};
|
||||
|
||||
static struct platform_device scif4_device = {
|
||||
|
@ -388,7 +389,7 @@ static struct plat_sci_port scif5_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_3,
|
||||
.type = PORT_SCIFA,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xFA0)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xfa0)),
|
||||
};
|
||||
|
||||
static struct platform_device scif5_device = {
|
||||
|
@ -408,17 +409,17 @@ static struct resource rtc_resources[] = {
|
|||
},
|
||||
[1] = {
|
||||
/* Period IRQ */
|
||||
.start = 69,
|
||||
.start = evt2irq(0xaa0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
[2] = {
|
||||
/* Carry IRQ */
|
||||
.start = 70,
|
||||
.start = evt2irq(0xac0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
[3] = {
|
||||
/* Alarm IRQ */
|
||||
.start = 68,
|
||||
.start = evt2irq(0xa80),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -439,8 +440,8 @@ static struct resource iic0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 96,
|
||||
.end = 99,
|
||||
.start = evt2irq(0xe00),
|
||||
.end = evt2irq(0xe60),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -461,8 +462,8 @@ static struct resource iic1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 92,
|
||||
.end = 95,
|
||||
.start = evt2irq(0xd80),
|
||||
.end = evt2irq(0xde0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -478,7 +479,7 @@ static struct platform_device iic1_device = {
|
|||
static struct uio_info vpu_platform_data = {
|
||||
.name = "VPU5F",
|
||||
.version = "0",
|
||||
.irq = 60,
|
||||
.irq = evt2irq(0x980),
|
||||
};
|
||||
|
||||
static struct resource vpu_resources[] = {
|
||||
|
@ -507,7 +508,7 @@ static struct platform_device vpu_device = {
|
|||
static struct uio_info veu0_platform_data = {
|
||||
.name = "VEU3F0",
|
||||
.version = "0",
|
||||
.irq = 83,
|
||||
.irq = evt2irq(0xc60),
|
||||
};
|
||||
|
||||
static struct resource veu0_resources[] = {
|
||||
|
@ -536,7 +537,7 @@ static struct platform_device veu0_device = {
|
|||
static struct uio_info veu1_platform_data = {
|
||||
.name = "VEU3F1",
|
||||
.version = "0",
|
||||
.irq = 54,
|
||||
.irq = evt2irq(0x8c0),
|
||||
};
|
||||
|
||||
static struct resource veu1_resources[] = {
|
||||
|
@ -633,7 +634,7 @@ static struct resource cmt_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 104,
|
||||
.start = evt2irq(0xf00),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -661,7 +662,7 @@ static struct resource tmu0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 16,
|
||||
.start = evt2irq(0x400),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -689,7 +690,7 @@ static struct resource tmu1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 17,
|
||||
.start = evt2irq(0x420),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -716,7 +717,7 @@ static struct resource tmu2_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 18,
|
||||
.start = evt2irq(0x440),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -744,7 +745,7 @@ static struct resource tmu3_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 57,
|
||||
.start = evt2irq(0x920),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -771,7 +772,7 @@ static struct resource tmu4_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 58,
|
||||
.start = evt2irq(0x940),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -798,7 +799,7 @@ static struct resource tmu5_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 57,
|
||||
.start = evt2irq(0x920),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -817,7 +818,7 @@ static struct platform_device tmu5_device = {
|
|||
static struct uio_info jpu_platform_data = {
|
||||
.name = "JPU",
|
||||
.version = "0",
|
||||
.irq = 27,
|
||||
.irq = evt2irq(0x560),
|
||||
};
|
||||
|
||||
static struct resource jpu_resources[] = {
|
||||
|
@ -846,7 +847,7 @@ static struct platform_device jpu_device = {
|
|||
static struct uio_info spu0_platform_data = {
|
||||
.name = "SPU2DSP0",
|
||||
.version = "0",
|
||||
.irq = 86,
|
||||
.irq = evt2irq(0xcc0),
|
||||
};
|
||||
|
||||
static struct resource spu0_resources[] = {
|
||||
|
@ -875,7 +876,7 @@ static struct platform_device spu0_device = {
|
|||
static struct uio_info spu1_platform_data = {
|
||||
.name = "SPU2DSP1",
|
||||
.version = "0",
|
||||
.irq = 87,
|
||||
.irq = evt2irq(0xce0),
|
||||
};
|
||||
|
||||
static struct resource spu1_resources[] = {
|
||||
|
|
|
@ -18,7 +18,7 @@
|
|||
#include <linux/dma-mapping.h>
|
||||
#include <linux/sh_timer.h>
|
||||
#include <linux/sh_dma.h>
|
||||
|
||||
#include <linux/sh_intc.h>
|
||||
#include <cpu/dma-register.h>
|
||||
#include <cpu/sh7757.h>
|
||||
|
||||
|
@ -45,7 +45,7 @@ static struct plat_sci_port scif3_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xB80)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xb80)),
|
||||
};
|
||||
|
||||
static struct platform_device scif3_device = {
|
||||
|
@ -86,7 +86,7 @@ static struct resource tmu0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 28,
|
||||
.start = evt2irq(0x580),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -114,7 +114,7 @@ static struct resource tmu1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 29,
|
||||
.start = evt2irq(0x5a0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -136,7 +136,7 @@ static struct resource spi0_resources[] = {
|
|||
.flags = IORESOURCE_MEM | IORESOURCE_MEM_32BIT,
|
||||
},
|
||||
[1] = {
|
||||
.start = 86,
|
||||
.start = evt2irq(0xcc0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -466,8 +466,8 @@ static struct resource sh7757_dmae0_resources[] = {
|
|||
},
|
||||
{
|
||||
.name = "error_irq",
|
||||
.start = 34,
|
||||
.end = 34,
|
||||
.start = evt2irq(0x640),
|
||||
.end = evt2irq(0x640),
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
|
||||
},
|
||||
};
|
||||
|
@ -488,56 +488,56 @@ static struct resource sh7757_dmae1_resources[] = {
|
|||
},
|
||||
{
|
||||
.name = "error_irq",
|
||||
.start = 34,
|
||||
.end = 34,
|
||||
.start = evt2irq(0x640),
|
||||
.end = evt2irq(0x640),
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels 4 */
|
||||
.start = 46,
|
||||
.end = 46,
|
||||
.start = evt2irq(0x7c0),
|
||||
.end = evt2irq(0x7c0),
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels 5 */
|
||||
.start = 46,
|
||||
.end = 46,
|
||||
.start = evt2irq(0x7c0),
|
||||
.end = evt2irq(0x7c0),
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels 6 */
|
||||
.start = 88,
|
||||
.end = 88,
|
||||
.start = evt2irq(0xd00),
|
||||
.end = evt2irq(0xd00),
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels 7 */
|
||||
.start = 88,
|
||||
.end = 88,
|
||||
.start = evt2irq(0xd00),
|
||||
.end = evt2irq(0xd00),
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels 8 */
|
||||
.start = 88,
|
||||
.end = 88,
|
||||
.start = evt2irq(0xd00),
|
||||
.end = evt2irq(0xd00),
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels 9 */
|
||||
.start = 88,
|
||||
.end = 88,
|
||||
.start = evt2irq(0xd00),
|
||||
.end = evt2irq(0xd00),
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels 10 */
|
||||
.start = 88,
|
||||
.end = 88,
|
||||
.start = evt2irq(0xd00),
|
||||
.end = evt2irq(0xd00),
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels 11 */
|
||||
.start = 88,
|
||||
.end = 88,
|
||||
.start = evt2irq(0xd00),
|
||||
.end = evt2irq(0xd00),
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
|
||||
},
|
||||
};
|
||||
|
@ -558,20 +558,20 @@ static struct resource sh7757_dmae2_resources[] = {
|
|||
},
|
||||
{
|
||||
.name = "error_irq",
|
||||
.start = 323,
|
||||
.end = 323,
|
||||
.start = evt2irq(0x2a60),
|
||||
.end = evt2irq(0x2a60),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels 12 to 16 */
|
||||
.start = 272,
|
||||
.end = 276,
|
||||
.start = evt2irq(0x2400),
|
||||
.end = evt2irq(0x2480),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
/* IRQ for channel 17 */
|
||||
.start = 279,
|
||||
.end = 279,
|
||||
.start = evt2irq(0x24e0),
|
||||
.end = evt2irq(0x24e0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -592,20 +592,20 @@ static struct resource sh7757_dmae3_resources[] = {
|
|||
},
|
||||
{
|
||||
.name = "error_irq",
|
||||
.start = 324,
|
||||
.end = 324,
|
||||
.start = evt2irq(0x2a80),
|
||||
.end = evt2irq(0x2a80),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
/* IRQ for channels 18 to 22 */
|
||||
.start = 280,
|
||||
.end = 284,
|
||||
.start = evt2irq(0x2500),
|
||||
.end = evt2irq(0x2580),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
{
|
||||
/* IRQ for channel 23 */
|
||||
.start = 288,
|
||||
.end = 288,
|
||||
.start = evt2irq(0x2600),
|
||||
.end = evt2irq(0x2600),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -668,7 +668,7 @@ static struct resource spi1_resources[] = {
|
|||
.flags = IORESOURCE_MEM | IORESOURCE_MEM_8BIT,
|
||||
},
|
||||
{
|
||||
.start = 54,
|
||||
.start = evt2irq(0x8c0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -687,7 +687,7 @@ static struct resource rspi_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
.start = 220,
|
||||
.start = evt2irq(0x1d80),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -706,8 +706,8 @@ static struct resource usb_ehci_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 57,
|
||||
.end = 57,
|
||||
.start = evt2irq(0x920),
|
||||
.end = evt2irq(0x920),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -730,8 +730,8 @@ static struct resource usb_ohci_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 57,
|
||||
.end = 57,
|
||||
.start = evt2irq(0x920),
|
||||
.end = evt2irq(0x920),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -13,6 +13,7 @@
|
|||
#include <linux/init.h>
|
||||
#include <linux/serial.h>
|
||||
#include <linux/sh_timer.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <linux/io.h>
|
||||
#include <linux/serial_sci.h>
|
||||
|
||||
|
@ -40,7 +41,7 @@ static struct plat_sci_port scif1_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xB80)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xb80)),
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
|
||||
|
@ -58,7 +59,7 @@ static struct plat_sci_port scif2_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xF00)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xf00)),
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
|
||||
|
@ -78,7 +79,7 @@ static struct resource rtc_resources[] = {
|
|||
},
|
||||
[1] = {
|
||||
/* Shared Period/Carry/Alarm IRQ */
|
||||
.start = 20,
|
||||
.start = evt2irq(0x480),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -97,13 +98,14 @@ static struct resource usb_ohci_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 83,
|
||||
.end = 83,
|
||||
.start = evt2irq(0xc60),
|
||||
.end = evt2irq(0xc60),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
||||
static u64 usb_ohci_dma_mask = 0xffffffffUL;
|
||||
|
||||
static struct platform_device usb_ohci_device = {
|
||||
.name = "sh_ohci",
|
||||
.id = -1,
|
||||
|
@ -122,8 +124,8 @@ static struct resource usbf_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 84,
|
||||
.end = 84,
|
||||
.start = evt2irq(0xc80),
|
||||
.end = evt2irq(0xc80),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -152,7 +154,7 @@ static struct resource tmu0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 28,
|
||||
.start = evt2irq(0x580),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -180,7 +182,7 @@ static struct resource tmu1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 29,
|
||||
.start = evt2irq(0x5a0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -207,7 +209,7 @@ static struct resource tmu2_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 30,
|
||||
.start = evt2irq(0x5c0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -234,7 +236,7 @@ static struct resource tmu3_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 96,
|
||||
.start = evt2irq(0xe00),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -261,7 +263,7 @@ static struct resource tmu4_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 97,
|
||||
.start = evt2irq(0xe20),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -288,7 +290,7 @@ static struct resource tmu5_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 98,
|
||||
.start = evt2irq(0xe40),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -12,6 +12,7 @@
|
|||
#include <linux/serial.h>
|
||||
#include <linux/serial_sci.h>
|
||||
#include <linux/sh_timer.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <linux/io.h>
|
||||
|
||||
static struct plat_sci_port scif0_platform_data = {
|
||||
|
@ -20,7 +21,7 @@ static struct plat_sci_port scif0_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x9A0)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x9a0)),
|
||||
};
|
||||
|
||||
static struct platform_device scif0_device = {
|
||||
|
@ -37,7 +38,7 @@ static struct plat_sci_port scif1_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x9C0)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x9c0)),
|
||||
};
|
||||
|
||||
static struct platform_device scif1_device = {
|
||||
|
@ -54,7 +55,7 @@ static struct plat_sci_port scif2_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x9E0)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x9e0)),
|
||||
};
|
||||
|
||||
static struct platform_device scif2_device = {
|
||||
|
@ -71,7 +72,7 @@ static struct plat_sci_port scif3_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xA00)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xa00)),
|
||||
};
|
||||
|
||||
static struct platform_device scif3_device = {
|
||||
|
@ -88,7 +89,7 @@ static struct plat_sci_port scif4_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xA20)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xa20)),
|
||||
};
|
||||
|
||||
static struct platform_device scif4_device = {
|
||||
|
@ -105,7 +106,7 @@ static struct plat_sci_port scif5_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xA40)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xa40)),
|
||||
};
|
||||
|
||||
static struct platform_device scif5_device = {
|
||||
|
@ -122,7 +123,7 @@ static struct plat_sci_port scif6_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xA60)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xa60)),
|
||||
};
|
||||
|
||||
static struct platform_device scif6_device = {
|
||||
|
@ -139,7 +140,7 @@ static struct plat_sci_port scif7_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xA80)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xa80)),
|
||||
};
|
||||
|
||||
static struct platform_device scif7_device = {
|
||||
|
@ -156,7 +157,7 @@ static struct plat_sci_port scif8_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xAA0)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xaa0)),
|
||||
};
|
||||
|
||||
static struct platform_device scif8_device = {
|
||||
|
@ -173,7 +174,7 @@ static struct plat_sci_port scif9_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_TOIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xAC0)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xac0)),
|
||||
};
|
||||
|
||||
static struct platform_device scif9_device = {
|
||||
|
@ -197,7 +198,7 @@ static struct resource tmu0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 16,
|
||||
.start = evt2irq(0x400),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -225,7 +226,7 @@ static struct resource tmu1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 17,
|
||||
.start = evt2irq(0x420),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -252,7 +253,7 @@ static struct resource tmu2_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 18,
|
||||
.start = evt2irq(0x440),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -279,7 +280,7 @@ static struct resource tmu3_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 19,
|
||||
.start = evt2irq(0x460),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -306,7 +307,7 @@ static struct resource tmu4_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 20,
|
||||
.start = evt2irq(0x480),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -333,7 +334,7 @@ static struct resource tmu5_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 21,
|
||||
.start = evt2irq(0x4a0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -360,7 +361,7 @@ static struct resource tmu6_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 22,
|
||||
.start = evt2irq(0x4c0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -387,7 +388,7 @@ static struct resource tmu7_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 23,
|
||||
.start = evt2irq(0x4e0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -414,7 +415,7 @@ static struct resource tmu8_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 24,
|
||||
.start = evt2irq(0x500),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -14,6 +14,7 @@
|
|||
#include <linux/serial_sci.h>
|
||||
#include <linux/sh_dma.h>
|
||||
#include <linux/sh_timer.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <cpu/dma-register.h>
|
||||
|
||||
static struct plat_sci_port scif0_platform_data = {
|
||||
|
@ -22,7 +23,7 @@ static struct plat_sci_port scif0_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
|
||||
.scbrr_algo_id = SCBRR_ALGO_1,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = { 40, 40, 40, 40 },
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x700)),
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
|
||||
|
@ -40,7 +41,7 @@ static struct plat_sci_port scif1_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
|
||||
.scbrr_algo_id = SCBRR_ALGO_1,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = { 76, 76, 76, 76 },
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0xb80)),
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
|
||||
|
@ -65,7 +66,7 @@ static struct resource tmu0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 28,
|
||||
.start = evt2irq(0x580),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -93,7 +94,7 @@ static struct resource tmu1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 29,
|
||||
.start = evt2irq(0x5a0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -120,7 +121,7 @@ static struct resource tmu2_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 30,
|
||||
.start = evt2irq(0x5c0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -147,7 +148,7 @@ static struct resource tmu3_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 96,
|
||||
.start = evt2irq(0xe00),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -174,7 +175,7 @@ static struct resource tmu4_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 97,
|
||||
.start = evt2irq(0xe20),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -201,7 +202,7 @@ static struct resource tmu5_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 98,
|
||||
.start = evt2irq(0xe40),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -224,7 +225,7 @@ static struct resource rtc_resources[] = {
|
|||
},
|
||||
[1] = {
|
||||
/* Shared Period/Carry/Alarm IRQ */
|
||||
.start = 20,
|
||||
.start = evt2irq(0x480),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -321,10 +322,13 @@ static struct resource sh7780_dmae0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
/* Real DMA error IRQ is 38, and channel IRQs are 34-37, 44-45 */
|
||||
/*
|
||||
* Real DMA error vector is 0x6c0, and channel
|
||||
* vectors are 0x640-0x6a0, 0x780-0x7a0
|
||||
*/
|
||||
.name = "error_irq",
|
||||
.start = 34,
|
||||
.end = 34,
|
||||
.start = evt2irq(0x640),
|
||||
.end = evt2irq(0x640),
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
|
||||
},
|
||||
};
|
||||
|
@ -338,10 +342,13 @@ static struct resource sh7780_dmae1_resources[] = {
|
|||
},
|
||||
/* DMAC1 has no DMARS */
|
||||
{
|
||||
/* Real DMA error IRQ is 38, and channel IRQs are 46-47, 92-95 */
|
||||
/*
|
||||
* Real DMA error vector is 0x6c0, and channel
|
||||
* vectors are 0x7c0-0x7e0, 0xd80-0xde0
|
||||
*/
|
||||
.name = "error_irq",
|
||||
.start = 46,
|
||||
.end = 46,
|
||||
.start = evt2irq(0x7c0),
|
||||
.end = evt2irq(0x7c0),
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -15,6 +15,7 @@
|
|||
#include <linux/mm.h>
|
||||
#include <linux/sh_dma.h>
|
||||
#include <linux/sh_timer.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <asm/mmzone.h>
|
||||
#include <cpu/dma-register.h>
|
||||
|
||||
|
@ -78,7 +79,7 @@ static struct plat_sci_port scif3_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
|
||||
.scbrr_algo_id = SCBRR_ALGO_1,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x9A0)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x9a0)),
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
|
||||
|
@ -96,7 +97,7 @@ static struct plat_sci_port scif4_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
|
||||
.scbrr_algo_id = SCBRR_ALGO_1,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x9C0)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x9c0)),
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
|
||||
|
@ -114,7 +115,7 @@ static struct plat_sci_port scif5_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
|
||||
.scbrr_algo_id = SCBRR_ALGO_1,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x9E0)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x9e0)),
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
|
||||
|
@ -139,7 +140,7 @@ static struct resource tmu0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 28,
|
||||
.start = evt2irq(0x580),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -167,7 +168,7 @@ static struct resource tmu1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 29,
|
||||
.start = evt2irq(0x5a0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -194,7 +195,7 @@ static struct resource tmu2_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 30,
|
||||
.start = evt2irq(0x5c0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -221,7 +222,7 @@ static struct resource tmu3_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 96,
|
||||
.start = evt2irq(0xe00),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -248,7 +249,7 @@ static struct resource tmu4_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 97,
|
||||
.start = evt2irq(0xe20),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -275,7 +276,7 @@ static struct resource tmu5_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 98,
|
||||
.start = evt2irq(0xe40),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -375,10 +376,13 @@ static struct resource sh7785_dmae0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
{
|
||||
/* Real DMA error IRQ is 39, and channel IRQs are 33-38 */
|
||||
/*
|
||||
* Real DMA error vector is 0x6e0, and channel
|
||||
* vectors are 0x620-0x6c0
|
||||
*/
|
||||
.name = "error_irq",
|
||||
.start = 33,
|
||||
.end = 33,
|
||||
.start = evt2irq(0x620),
|
||||
.end = evt2irq(0x620),
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
|
||||
},
|
||||
};
|
||||
|
@ -392,10 +396,13 @@ static struct resource sh7785_dmae1_resources[] = {
|
|||
},
|
||||
/* DMAC1 has no DMARS */
|
||||
{
|
||||
/* Real DMA error IRQ is 58, and channel IRQs are 52-57 */
|
||||
/*
|
||||
* Real DMA error vector is 0x940, and channel
|
||||
* vectors are 0x880-0x920
|
||||
*/
|
||||
.name = "error_irq",
|
||||
.start = 52,
|
||||
.end = 52,
|
||||
.start = evt2irq(0x880),
|
||||
.end = evt2irq(0x880),
|
||||
.flags = IORESOURCE_IRQ | IORESOURCE_IRQ_SHAREABLE,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -32,7 +32,10 @@ static struct plat_sci_port scif0_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
|
||||
.scbrr_algo_id = SCBRR_ALGO_1,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = { 40, 41, 43, 42 },
|
||||
.irqs = { evt2irq(0x700),
|
||||
evt2irq(0x720),
|
||||
evt2irq(0x760),
|
||||
evt2irq(0x740) },
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
|
||||
|
@ -125,7 +128,7 @@ static struct plat_sci_port scif5_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE | SCSCR_CKE1,
|
||||
.scbrr_algo_id = SCBRR_ALGO_1,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x8A0)),
|
||||
.irqs = SCIx_IRQ_MUXED(evt2irq(0x8a0)),
|
||||
.regtype = SCIx_SH4_SCIF_FIFODATA_REGTYPE,
|
||||
};
|
||||
|
||||
|
@ -150,7 +153,7 @@ static struct resource tmu0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 16,
|
||||
.start = evt2irq(0x400),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -178,7 +181,7 @@ static struct resource tmu1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 17,
|
||||
.start = evt2irq(0x420),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -205,7 +208,7 @@ static struct resource tmu2_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 18,
|
||||
.start = evt2irq(0x440),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -232,7 +235,7 @@ static struct resource tmu3_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 20,
|
||||
.start = evt2irq(0x480),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -259,7 +262,7 @@ static struct resource tmu4_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 21,
|
||||
.start = evt2irq(0x4a0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -286,7 +289,7 @@ static struct resource tmu5_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 22,
|
||||
.start = evt2irq(0x4c0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -313,7 +316,7 @@ static struct resource tmu6_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 45,
|
||||
.start = evt2irq(0x7a0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -340,7 +343,7 @@ static struct resource tmu7_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 45,
|
||||
.start = evt2irq(0x7a0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -367,7 +370,7 @@ static struct resource tmu8_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 45,
|
||||
.start = evt2irq(0x7a0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -394,7 +397,7 @@ static struct resource tmu9_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 46,
|
||||
.start = evt2irq(0x7c0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -421,7 +424,7 @@ static struct resource tmu10_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 46,
|
||||
.start = evt2irq(0x7c0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -448,7 +451,7 @@ static struct resource tmu11_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 46,
|
||||
.start = evt2irq(0x7c0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -550,8 +553,8 @@ static struct resource usb_ehci_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 77,
|
||||
.end = 77,
|
||||
.start = evt2irq(0xba0),
|
||||
.end = evt2irq(0xba0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -574,8 +577,8 @@ static struct resource usb_ohci_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 77,
|
||||
.end = 77,
|
||||
.start = evt2irq(0xba0),
|
||||
.end = evt2irq(0xba0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -14,6 +14,7 @@
|
|||
#include <linux/io.h>
|
||||
#include <linux/gpio.h>
|
||||
#include <linux/sh_timer.h>
|
||||
#include <linux/sh_intc.h>
|
||||
#include <cpu/shx3.h>
|
||||
#include <asm/mmzone.h>
|
||||
|
||||
|
@ -32,7 +33,10 @@ static struct plat_sci_port scif0_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = { 40, 41, 43, 42 },
|
||||
.irqs = { evt2irq(0x700),
|
||||
evt2irq(0x720),
|
||||
evt2irq(0x760),
|
||||
evt2irq(0x740) },
|
||||
};
|
||||
|
||||
static struct platform_device scif0_device = {
|
||||
|
@ -49,7 +53,10 @@ static struct plat_sci_port scif1_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = { 44, 45, 47, 46 },
|
||||
.irqs = { evt2irq(0x780),
|
||||
evt2irq(0x7a0),
|
||||
evt2irq(0x7e0),
|
||||
evt2irq(0x7c0) },
|
||||
};
|
||||
|
||||
static struct platform_device scif1_device = {
|
||||
|
@ -66,7 +73,10 @@ static struct plat_sci_port scif2_platform_data = {
|
|||
.scscr = SCSCR_RE | SCSCR_TE | SCSCR_REIE,
|
||||
.scbrr_algo_id = SCBRR_ALGO_2,
|
||||
.type = PORT_SCIF,
|
||||
.irqs = { 52, 53, 55, 54 },
|
||||
.irqs = { evt2irq(0x880),
|
||||
evt2irq(0x8a0),
|
||||
evt2irq(0x8e0),
|
||||
evt2irq(0x8c0) },
|
||||
};
|
||||
|
||||
static struct platform_device scif2_device = {
|
||||
|
@ -90,7 +100,7 @@ static struct resource tmu0_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 16,
|
||||
.start = evt2irq(0x400),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -118,7 +128,7 @@ static struct resource tmu1_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 17,
|
||||
.start = evt2irq(0x420),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -145,7 +155,7 @@ static struct resource tmu2_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 18,
|
||||
.start = evt2irq(0x440),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -172,7 +182,7 @@ static struct resource tmu3_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 19,
|
||||
.start = evt2irq(0x460),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -199,7 +209,7 @@ static struct resource tmu4_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 20,
|
||||
.start = evt2irq(0x480),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
@ -226,7 +236,7 @@ static struct resource tmu5_resources[] = {
|
|||
.flags = IORESOURCE_MEM,
|
||||
},
|
||||
[1] = {
|
||||
.start = 21,
|
||||
.start = evt2irq(0x4a0),
|
||||
.flags = IORESOURCE_IRQ,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -269,4 +269,4 @@ static int __init sunfire_init(void)
|
|||
return 0;
|
||||
}
|
||||
|
||||
subsys_initcall(sunfire_init);
|
||||
fs_initcall(sunfire_init);
|
||||
|
|
Some files were not shown because too many files have changed in this diff Show More
Loading…
Reference in New Issue