mirror of https://gitee.com/openkylin/linux.git
drm/i915: unify the definitions of the HDMI/SDVO register
Since they're all the same register, leave all the #defines at the same place, organized by Gen and also specify which bits are used by only a specific port or encoding. Also remove a few unused duplicates and adjust indentation. Signed-off-by: Paulo Zanoni <paulo.r.zanoni@intel.com> Signed-off-by: Daniel Vetter <daniel.vetter@ffwll.ch>
This commit is contained in:
Paulo Zanoni
Daniel Vetter
parent
e2debe919a
commit
c20cd31252
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@ -1680,43 +1680,68 @@
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#define SDVOC_HOTPLUG_INT_STATUS_I915 (1 << 7)
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#define SDVOB_HOTPLUG_INT_STATUS_I915 (1 << 6)
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/* SDVO port control */
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#define GEN3_SDVOB 0x61140
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#define GEN3_SDVOC 0x61160
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#define PCH_SDVOB 0xe1140
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#define SDVO_ENABLE (1 << 31)
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#define SDVO_PIPE_B_SELECT (1 << 30)
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#define SDVO_STALL_SELECT (1 << 29)
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#define SDVO_INTERRUPT_ENABLE (1 << 26)
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/* SDVO and HDMI port control.
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* The same register may be used for SDVO or HDMI */
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#define GEN3_SDVOB 0x61140
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#define GEN3_SDVOC 0x61160
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#define GEN4_HDMIB GEN3_SDVOB
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#define GEN4_HDMIC GEN3_SDVOC
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#define PCH_SDVOB 0xe1140
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#define PCH_HDMIB PCH_SDVOB
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#define PCH_HDMIC 0xe1150
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#define PCH_HDMID 0xe1160
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/* Gen 3 SDVO bits: */
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#define SDVO_ENABLE (1 << 31)
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#define SDVO_PIPE_B_SELECT (1 << 30)
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#define SDVO_STALL_SELECT (1 << 29)
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#define SDVO_INTERRUPT_ENABLE (1 << 26)
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/**
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* 915G/GM SDVO pixel multiplier.
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*
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* Programmed value is multiplier - 1, up to 5x.
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*
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* \sa DPLL_MD_UDI_MULTIPLIER_MASK
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*/
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#define SDVO_PORT_MULTIPLY_MASK (7 << 23)
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#define SDVO_PORT_MULTIPLY_MASK (7 << 23)
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#define SDVO_PORT_MULTIPLY_SHIFT 23
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#define SDVO_PHASE_SELECT_MASK (15 << 19)
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#define SDVO_PHASE_SELECT_DEFAULT (6 << 19)
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#define SDVO_CLOCK_OUTPUT_INVERT (1 << 18)
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#define SDVOC_GANG_MODE (1 << 16)
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#define SDVO_ENCODING_SDVO (0x0 << 10)
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#define SDVO_ENCODING_HDMI (0x2 << 10)
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/** Requird for HDMI operation */
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#define SDVO_NULL_PACKETS_DURING_VSYNC (1 << 9)
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#define SDVO_COLOR_RANGE_16_235 (1 << 8)
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#define SDVO_BORDER_ENABLE (1 << 7)
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#define SDVO_AUDIO_ENABLE (1 << 6)
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/** New with 965, default is to be set */
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#define SDVO_VSYNC_ACTIVE_HIGH (1 << 4)
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/** New with 965, default is to be set */
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#define SDVO_HSYNC_ACTIVE_HIGH (1 << 3)
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#define SDVOB_PCIE_CONCURRENCY (1 << 3)
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#define SDVO_DETECTED (1 << 2)
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#define SDVO_PHASE_SELECT_MASK (15 << 19)
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#define SDVO_PHASE_SELECT_DEFAULT (6 << 19)
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#define SDVO_CLOCK_OUTPUT_INVERT (1 << 18)
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#define SDVOC_GANG_MODE (1 << 16) /* Port C only */
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#define SDVO_BORDER_ENABLE (1 << 7) /* SDVO only */
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#define SDVOB_PCIE_CONCURRENCY (1 << 3) /* Port B only */
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#define SDVO_DETECTED (1 << 2)
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/* Bits to be preserved when writing */
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#define SDVOB_PRESERVE_MASK ((1 << 17) | (1 << 16) | (1 << 14) | (1 << 26))
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#define SDVOC_PRESERVE_MASK ((1 << 17) | (1 << 26))
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#define SDVOB_PRESERVE_MASK ((1 << 17) | (1 << 16) | (1 << 14) | \
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SDVO_INTERRUPT_ENABLE)
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#define SDVOC_PRESERVE_MASK ((1 << 17) | SDVO_INTERRUPT_ENABLE)
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/* Gen 4 SDVO/HDMI bits: */
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#define COLOR_FORMAT_8bpc (0 << 26)
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#define SDVO_ENCODING_SDVO (0 << 10)
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#define SDVO_ENCODING_HDMI (2 << 10)
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#define SDVO_NULL_PACKETS_DURING_VSYNC (1 << 9) /* HDMI only */
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#define SDVO_COLOR_RANGE_16_235 (1 << 8) /* HDMI only */
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#define SDVO_AUDIO_ENABLE (1 << 6)
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/* VSYNC/HSYNC bits new with 965, default is to be set */
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#define SDVO_VSYNC_ACTIVE_HIGH (1 << 4)
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#define SDVO_HSYNC_ACTIVE_HIGH (1 << 3)
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/* Gen 5 (IBX) SDVO/HDMI bits: */
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#define COLOR_FORMAT_12bpc (3 << 26) /* HDMI only */
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#define SDVOB_HOTPLUG_ENABLE (1 << 23) /* SDVO only */
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/* Gen 6 (CPT) SDVO/HDMI bits: */
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#define TRANSCODER_CPT(pipe) ((pipe) << 29)
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#define TRANSCODER_MASK_CPT (3 << 29)
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/* Repeated but still used bits: */
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#define PORT_ENABLE (1 << 31)
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#define TRANSCODER(pipe) ((pipe) << 30)
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#define TRANSCODER_MASK (1 << 30)
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#define HDMI_MODE_SELECT (1 << 9)
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#define DVI_MODE_SELECT (0 << 9)
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#define PORT_DETECTED (1 << 2)
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/* DVO port control */
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#define DVOA 0x61120
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@ -3983,32 +4008,6 @@
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#define FDI_PLL_CTL_1 0xfe000
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#define FDI_PLL_CTL_2 0xfe004
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/* The same register may be used for SDVO or HDMI */
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#define GEN4_HDMIB GEN3_SDVOB
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#define GEN4_HDMIC GEN3_SDVOC
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#define PCH_HDMIB PCH_SDVOB
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#define PCH_HDMIC 0xe1150
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#define PCH_HDMID 0xe1160
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#define PORT_ENABLE (1 << 31)
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#define TRANSCODER(pipe) ((pipe) << 30)
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#define TRANSCODER_CPT(pipe) ((pipe) << 29)
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#define TRANSCODER_MASK (1 << 30)
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#define TRANSCODER_MASK_CPT (3 << 29)
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#define COLOR_FORMAT_8bpc (0)
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#define COLOR_FORMAT_12bpc (3 << 26)
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#define SDVOB_HOTPLUG_ENABLE (1 << 23)
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#define SDVO_ENCODING (0)
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#define TMDS_ENCODING (2 << 10)
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#define NULL_PACKET_VSYNC_ENABLE (1 << 9)
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/* CPT */
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#define HDMI_MODE_SELECT (1 << 9)
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#define DVI_MODE_SELECT (0)
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#define SDVOB_BORDER_ENABLE (1 << 7)
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#define AUDIO_ENABLE (1 << 6)
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#define VSYNC_ACTIVE_HIGH (1 << 4)
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#define HSYNC_ACTIVE_HIGH (1 << 3)
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#define PORT_DETECTED (1 << 2)
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#define PCH_LVDS 0xe1180
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#define LVDS_DETECTED (1 << 1)
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