mirror of https://gitee.com/openkylin/linux.git
remove the outdated arch/i386/kernel/cpu/{,mtrr/}changelog
This patch removes two outdated changelog files. Signed-off-by: Adrian Bunk <bunk@stusta.de> Signed-off-by: Dave Jones <davej@redhat.com>
This commit is contained in:
Adrian Bunk
Adrian Bunk
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52461121b2
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/*
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* Enhanced CPU type detection by Mike Jagdis, Patrick St. Jean
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* and Martin Mares, November 1997.
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*
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* Force Cyrix 6x86(MX) and M II processors to report MTRR capability
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* and Cyrix "coma bug" recognition by
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* Zoltán Böszörményi <zboszor@mail.externet.hu> February 1999.
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*
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* Force Centaur C6 processors to report MTRR capability.
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* Bart Hartgers <bart@etpmod.phys.tue.nl>, May 1999.
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*
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* Intel Mobile Pentium II detection fix. Sean Gilley, June 1999.
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*
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* IDT Winchip tweaks, misc clean ups.
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* Dave Jones <davej@suse.de>, August 1999
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*
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* Better detection of Centaur/IDT WinChip models.
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* Bart Hartgers <bart@etpmod.phys.tue.nl>, August 1999.
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*
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* Cleaned up cache-detection code
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* Dave Jones <davej@suse.de>, October 1999
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*
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* Added proper L2 cache detection for Coppermine
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* Dragan Stancevic <visitor@valinux.com>, October 1999
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*
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* Added the original array for capability flags but forgot to credit
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* myself :) (~1998) Fixed/cleaned up some cpu_model_info and other stuff
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* Jauder Ho <jauderho@carumba.com>, January 2000
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*
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* Detection for Celeron coppermine, identify_cpu() overhauled,
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* and a few other clean ups.
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* Dave Jones <davej@suse.de>, April 2000
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*
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* Pentium III FXSR, SSE support
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* General FPU state handling cleanups
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* Gareth Hughes <gareth@valinux.com>, May 2000
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*
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* Added proper Cascades CPU and L2 cache detection for Cascades
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* and 8-way type cache happy bunch from Intel:^)
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* Dragan Stancevic <visitor@valinux.com>, May 2000
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*
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* Forward port AMD Duron errata T13 from 2.2.17pre
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* Dave Jones <davej@suse.de>, August 2000
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*
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* Forward port lots of fixes/improvements from 2.2.18pre
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* Cyrix III, Pentium IV support.
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* Dave Jones <davej@suse.de>, October 2000
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*
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* Massive cleanup of CPU detection and bug handling;
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* Transmeta CPU detection,
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* H. Peter Anvin <hpa@zytor.com>, November 2000
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*
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* VIA C3 Support.
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* Dave Jones <davej@suse.de>, March 2001
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*
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* AMD Athlon/Duron/Thunderbird bluesmoke support.
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* Dave Jones <davej@suse.de>, April 2001.
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*
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* CacheSize bug workaround updates for AMD, Intel & VIA Cyrix.
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* Dave Jones <davej@suse.de>, September, October 2001.
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*
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*/
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@ -1,229 +0,0 @@
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ChangeLog
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Prehistory Martin Tischhäuser <martin@ikcbarka.fzk.de>
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Initial register-setting code (from proform-1.0).
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19971216 Richard Gooch <rgooch@atnf.csiro.au>
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Original version for /proc/mtrr interface, SMP-safe.
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v1.0
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19971217 Richard Gooch <rgooch@atnf.csiro.au>
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Bug fix for ioctls()'s.
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Added sample code in Documentation/mtrr.txt
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v1.1
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19971218 Richard Gooch <rgooch@atnf.csiro.au>
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Disallow overlapping regions.
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19971219 Jens Maurer <jmaurer@menuett.rhein-main.de>
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Register-setting fixups.
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v1.2
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19971222 Richard Gooch <rgooch@atnf.csiro.au>
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Fixups for kernel 2.1.75.
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v1.3
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19971229 David Wragg <dpw@doc.ic.ac.uk>
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Register-setting fixups and conformity with Intel conventions.
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19971229 Richard Gooch <rgooch@atnf.csiro.au>
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Cosmetic changes and wrote this ChangeLog ;-)
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19980106 Richard Gooch <rgooch@atnf.csiro.au>
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Fixups for kernel 2.1.78.
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v1.4
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19980119 David Wragg <dpw@doc.ic.ac.uk>
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Included passive-release enable code (elsewhere in PCI setup).
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v1.5
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19980131 Richard Gooch <rgooch@atnf.csiro.au>
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Replaced global kernel lock with private spinlock.
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v1.6
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19980201 Richard Gooch <rgooch@atnf.csiro.au>
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Added wait for other CPUs to complete changes.
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v1.7
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19980202 Richard Gooch <rgooch@atnf.csiro.au>
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Bug fix in definition of <set_mtrr> for UP.
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v1.8
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19980319 Richard Gooch <rgooch@atnf.csiro.au>
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Fixups for kernel 2.1.90.
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19980323 Richard Gooch <rgooch@atnf.csiro.au>
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Move SMP BIOS fixup before secondary CPUs call <calibrate_delay>
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v1.9
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19980325 Richard Gooch <rgooch@atnf.csiro.au>
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Fixed test for overlapping regions: confused by adjacent regions
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19980326 Richard Gooch <rgooch@atnf.csiro.au>
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Added wbinvd in <set_mtrr_prepare>.
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19980401 Richard Gooch <rgooch@atnf.csiro.au>
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Bug fix for non-SMP compilation.
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19980418 David Wragg <dpw@doc.ic.ac.uk>
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Fixed-MTRR synchronisation for SMP and use atomic operations
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instead of spinlocks.
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19980418 Richard Gooch <rgooch@atnf.csiro.au>
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Differentiate different MTRR register classes for BIOS fixup.
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v1.10
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19980419 David Wragg <dpw@doc.ic.ac.uk>
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Bug fix in variable MTRR synchronisation.
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v1.11
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19980419 Richard Gooch <rgooch@atnf.csiro.au>
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Fixups for kernel 2.1.97.
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v1.12
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19980421 Richard Gooch <rgooch@atnf.csiro.au>
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Safer synchronisation across CPUs when changing MTRRs.
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v1.13
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19980423 Richard Gooch <rgooch@atnf.csiro.au>
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Bugfix for SMP systems without MTRR support.
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v1.14
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19980427 Richard Gooch <rgooch@atnf.csiro.au>
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Trap calls to <mtrr_add> and <mtrr_del> on non-MTRR machines.
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v1.15
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19980427 Richard Gooch <rgooch@atnf.csiro.au>
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Use atomic bitops for setting SMP change mask.
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v1.16
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19980428 Richard Gooch <rgooch@atnf.csiro.au>
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Removed spurious diagnostic message.
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v1.17
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19980429 Richard Gooch <rgooch@atnf.csiro.au>
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Moved register-setting macros into this file.
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Moved setup code from init/main.c to i386-specific areas.
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v1.18
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19980502 Richard Gooch <rgooch@atnf.csiro.au>
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Moved MTRR detection outside conditionals in <mtrr_init>.
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v1.19
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19980502 Richard Gooch <rgooch@atnf.csiro.au>
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Documentation improvement: mention Pentium II and AGP.
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v1.20
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19980521 Richard Gooch <rgooch@atnf.csiro.au>
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Only manipulate interrupt enable flag on local CPU.
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Allow enclosed uncachable regions.
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v1.21
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19980611 Richard Gooch <rgooch@atnf.csiro.au>
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Always define <main_lock>.
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v1.22
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19980901 Richard Gooch <rgooch@atnf.csiro.au>
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Removed module support in order to tidy up code.
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Added sanity check for <mtrr_add>/<mtrr_del> before <mtrr_init>.
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Created addition queue for prior to SMP commence.
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v1.23
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19980902 Richard Gooch <rgooch@atnf.csiro.au>
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Ported patch to kernel 2.1.120-pre3.
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v1.24
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19980910 Richard Gooch <rgooch@atnf.csiro.au>
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Removed sanity checks and addition queue: Linus prefers an OOPS.
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v1.25
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19981001 Richard Gooch <rgooch@atnf.csiro.au>
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Fixed harmless compiler warning in include/asm-i386/mtrr.h
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Fixed version numbering and history for v1.23 -> v1.24.
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v1.26
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19990118 Richard Gooch <rgooch@atnf.csiro.au>
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Added devfs support.
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v1.27
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19990123 Richard Gooch <rgooch@atnf.csiro.au>
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Changed locking to spin with reschedule.
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Made use of new <smp_call_function>.
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v1.28
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19990201 Zoltán Böszörményi <zboszor@mail.externet.hu>
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Extended the driver to be able to use Cyrix style ARRs.
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19990204 Richard Gooch <rgooch@atnf.csiro.au>
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Restructured Cyrix support.
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v1.29
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19990204 Zoltán Böszörményi <zboszor@mail.externet.hu>
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Refined ARR support: enable MAPEN in set_mtrr_prepare()
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and disable MAPEN in set_mtrr_done().
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19990205 Richard Gooch <rgooch@atnf.csiro.au>
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Minor cleanups.
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v1.30
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19990208 Zoltán Böszörményi <zboszor@mail.externet.hu>
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Protect plain 6x86s (and other processors without the
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Page Global Enable feature) against accessing CR4 in
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set_mtrr_prepare() and set_mtrr_done().
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19990210 Richard Gooch <rgooch@atnf.csiro.au>
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Turned <set_mtrr_up> and <get_mtrr> into function pointers.
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v1.31
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19990212 Zoltán Böszörményi <zboszor@mail.externet.hu>
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Major rewrite of cyrix_arr_init(): do not touch ARRs,
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leave them as the BIOS have set them up.
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Enable usage of all 8 ARRs.
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Avoid multiplications by 3 everywhere and other
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code clean ups/speed ups.
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19990213 Zoltán Böszörményi <zboszor@mail.externet.hu>
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Set up other Cyrix processors identical to the boot cpu.
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Since Cyrix don't support Intel APIC, this is l'art pour l'art.
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Weigh ARRs by size:
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If size <= 32M is given, set up ARR# we were given.
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If size > 32M is given, set up ARR7 only if it is free,
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fail otherwise.
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19990214 Zoltán Böszörményi <zboszor@mail.externet.hu>
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Also check for size >= 256K if we are to set up ARR7,
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mtrr_add() returns the value it gets from set_mtrr()
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19990218 Zoltán Böszörményi <zboszor@mail.externet.hu>
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Remove Cyrix "coma bug" workaround from here.
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Moved to linux/arch/i386/kernel/setup.c and
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linux/include/asm-i386/bugs.h
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19990228 Richard Gooch <rgooch@atnf.csiro.au>
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Added MTRRIOC_KILL_ENTRY ioctl(2)
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Trap for counter underflow in <mtrr_file_del>.
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Trap for 4 MiB aligned regions for PPro, stepping <= 7.
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19990301 Richard Gooch <rgooch@atnf.csiro.au>
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Created <get_free_region> hook.
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19990305 Richard Gooch <rgooch@atnf.csiro.au>
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Temporarily disable AMD support now MTRR capability flag is set.
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v1.32
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19990308 Zoltán Böszörményi <zboszor@mail.externet.hu>
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Adjust my changes (19990212-19990218) to Richard Gooch's
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latest changes. (19990228-19990305)
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v1.33
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19990309 Richard Gooch <rgooch@atnf.csiro.au>
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Fixed typo in <printk> message.
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19990310 Richard Gooch <rgooch@atnf.csiro.au>
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Support K6-II/III based on Alan Cox's <alan@redhat.com> patches.
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v1.34
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19990511 Bart Hartgers <bart@etpmod.phys.tue.nl>
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Support Centaur C6 MCR's.
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19990512 Richard Gooch <rgooch@atnf.csiro.au>
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Minor cleanups.
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v1.35
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19990707 Zoltán Böszörményi <zboszor@mail.externet.hu>
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Check whether ARR3 is protected in cyrix_get_free_region()
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and mtrr_del(). The code won't attempt to delete or change it
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from now on if the BIOS protected ARR3. It silently skips ARR3
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in cyrix_get_free_region() or returns with an error code from
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mtrr_del().
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19990711 Zoltán Böszörményi <zboszor@mail.externet.hu>
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Reset some bits in the CCRs in cyrix_arr_init() to disable SMM
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if ARR3 isn't protected. This is needed because if SMM is active
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and ARR3 isn't protected then deleting and setting ARR3 again
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may lock up the processor. With SMM entirely disabled, it does
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not happen.
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19990812 Zoltán Böszörményi <zboszor@mail.externet.hu>
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Rearrange switch() statements so the driver accomodates to
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the fact that the AMD Athlon handles its MTRRs the same way
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as Intel does.
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19990814 Zoltán Böszörményi <zboszor@mail.externet.hu>
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Double check for Intel in mtrr_add()'s big switch() because
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that revision check is only valid for Intel CPUs.
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19990819 Alan Cox <alan@redhat.com>
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Tested Zoltan's changes on a pre production Athlon - 100%
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success.
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19991008 Manfred Spraul <manfreds@colorfullife.com>
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replaced spin_lock_reschedule() with a normal semaphore.
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v1.36
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20000221 Richard Gooch <rgooch@atnf.csiro.au>
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Compile fix if procfs and devfs not enabled.
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Formatting changes.
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v1.37
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20001109 H. Peter Anvin <hpa@zytor.com>
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Use the new centralized CPU feature detects.
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v1.38
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20010309 Dave Jones <davej@suse.de>
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Add support for Cyrix III.
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v1.39
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20010312 Dave Jones <davej@suse.de>
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Ugh, I broke AMD support.
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Reworked fix by Troels Walsted Hansen <troels@thule.no>
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v1.40
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20010327 Dave Jones <davej@suse.de>
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Adapted Cyrix III support to include VIA C3.
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v2.0
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20020306 Patrick Mochel <mochel@osdl.org>
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Split mtrr.c -> mtrr/*.c
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Converted to Linux Kernel Coding Style
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Fixed several minor nits in form
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Moved some SMP-only functions out, so they can be used
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for power management in the future.
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TODO: Fix user interface cruft.
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