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gpio: add a real time compliance notes
Put in a compliance checklist. Signed-off-by: Grygorii Strashko <grygorii.strashko@ti.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
This commit is contained in:
Grygorii Strashko
Linus Walleij
parent
4aa50b87f1
commit
c307b00254
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@ -62,6 +62,11 @@ Any debugfs dump method should normally ignore signals which haven't been
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requested as GPIOs. They can use gpiochip_is_requested(), which returns either
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NULL or the label associated with that GPIO when it was requested.
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RT_FULL: GPIO driver should not use spinlock_t or any sleepable APIs
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(like PM runtime) in its gpio_chip implementation (.get/.set and direction
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control callbacks) if it is expected to call GPIO APIs from atomic context
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on -RT (inside hard IRQ handlers and similar contexts). Normally this should
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not be required.
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GPIO drivers providing IRQs
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---------------------------
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@ -73,6 +78,13 @@ The IRQ portions of the GPIO block are implemented using an irqchip, using
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the header <linux/irq.h>. So basically such a driver is utilizing two sub-
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systems simultaneously: gpio and irq.
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RT_FULL: GPIO driver should not use spinlock_t or any sleepable APIs
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(like PM runtime) as part of its irq_chip implementation on -RT.
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- spinlock_t should be replaced with raw_spinlock_t [1].
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- If sleepable APIs have to be used, these can be done from the .irq_bus_lock()
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and .irq_bus_unlock() callbacks, as these are the only slowpath callbacks
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on an irqchip. Create the callbacks if needed [2].
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GPIO irqchips usually fall in one of two categories:
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* CHAINED GPIO irqchips: these are usually the type that is embedded on
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@ -93,6 +105,38 @@ GPIO irqchips usually fall in one of two categories:
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Chained GPIO irqchips typically can NOT set the .can_sleep flag on
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struct gpio_chip, as everything happens directly in the callbacks.
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RT_FULL: Note, chained IRQ handlers will not be forced threaded on -RT.
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As result, spinlock_t or any sleepable APIs (like PM runtime) can't be used
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in chained IRQ handler.
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if required (and if it can't be converted to the nested threaded GPIO irqchip)
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- chained IRQ handler can be converted to generic irq handler and this way
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it will be threaded IRQ handler on -RT and hard IRQ handler on non-RT
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(for example, see [3]).
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Know W/A: The generic_handle_irq() is expected to be called with IRQ disabled,
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so IRQ core will complain if it will be called from IRQ handler wich is forced
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thread. The "fake?" raw lock can be used to W/A this problem:
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raw_spinlock_t wa_lock;
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static irqreturn_t omap_gpio_irq_handler(int irq, void *gpiobank)
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unsigned long wa_lock_flags;
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raw_spin_lock_irqsave(&bank->wa_lock, wa_lock_flags);
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generic_handle_irq(irq_find_mapping(bank->chip.irqdomain, bit));
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raw_spin_unlock_irqrestore(&bank->wa_lock, wa_lock_flags);
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* GENERIC CHAINED GPIO irqchips: these are the same as "CHAINED GPIO irqchips",
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but chained IRQ handlers are not used. Instead GPIO IRQs dispatching is
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performed by generic IRQ handler which is configured using request_irq().
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The GPIO irqchip will then end up calling something like this sequence in
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its interrupt handler:
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static irqreturn_t gpio_rcar_irq_handler(int irq, void *dev_id)
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for each detected GPIO IRQ
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generic_handle_irq(...);
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RT_FULL: Such kind of handlers will be forced threaded on -RT, as result IRQ
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core will complain that generic_handle_irq() is called with IRQ enabled and
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the same W/A as for "CHAINED GPIO irqchips" can be applied.
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* NESTED THREADED GPIO irqchips: these are off-chip GPIO expanders and any
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other GPIO irqchip residing on the other side of a sleeping bus. Of course
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such drivers that need slow bus traffic to read out IRQ status and similar,
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@ -133,6 +177,13 @@ To use the helpers please keep the following in mind:
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the irqchip can initialize. E.g. .dev and .can_sleep shall be set up
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properly.
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- Nominally set all handlers to handle_bad_irq() in the setup call and pass
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handle_bad_irq() as flow handler parameter in gpiochip_irqchip_add() if it is
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expected for GPIO driver that irqchip .set_type() callback have to be called
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before using/enabling GPIO IRQ. Then set the handler to handle_level_irq()
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and/or handle_edge_irq() in the irqchip .set_type() callback depending on
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what your controller supports.
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It is legal for any IRQ consumer to request an IRQ from any irqchip no matter
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if that is a combined GPIO+IRQ driver. The basic premise is that gpio_chip and
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irq_chip are orthogonal, and offering their services independent of each
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@ -169,6 +220,31 @@ When implementing an irqchip inside a GPIO driver, these two functions should
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typically be called in the .startup() and .shutdown() callbacks from the
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irqchip.
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Real-Time compliance for GPIO IRQ chips
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---------------------------------------
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Any provider of irqchips needs to be carefully tailored to support Real Time
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preemption. It is desireable that all irqchips in the GPIO subsystem keep this
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in mind and does the proper testing to assure they are real time-enabled.
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So, pay attention on above " RT_FULL:" notes, please.
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The following is a checklist to follow when preparing a driver for real
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time-compliance:
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- ensure spinlock_t is not used as part irq_chip implementation;
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- ensure that sleepable APIs are not used as part irq_chip implementation.
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If sleepable APIs have to be used, these can be done from the .irq_bus_lock()
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and .irq_bus_unlock() callbacks;
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- Chained GPIO irqchips: ensure spinlock_t or any sleepable APIs are not used
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from chained IRQ handler;
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- Generic chained GPIO irqchips: take care about generic_handle_irq() calls and
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apply corresponding W/A;
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- Chained GPIO irqchips: get rid of chained IRQ handler and use generic irq
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handler if possible :)
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- regmap_mmio: Sry, but you are in trouble :( if MMIO regmap is used as for
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GPIO IRQ chip implementation;
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- Test your driver with the appropriate in-kernel real time test cases for both
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level and edge IRQs.
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Requesting self-owned GPIO pins
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-------------------------------
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@ -190,3 +266,7 @@ gpiochip_free_own_desc().
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These functions must be used with care since they do not affect module use
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count. Do not use the functions to request gpio descriptors not owned by the
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calling driver.
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[1] http://www.spinics.net/lists/linux-omap/msg120425.html
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[2] https://lkml.org/lkml/2015/9/25/494
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[3] https://lkml.org/lkml/2015/9/25/495
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