iwlwifi: set 512 TX queue slots for AX210 devices

AX210 devices support 256 BA (256 MPDUs in an AMPDU).
The firmware requires that the number of TFDs will be
minimum twice as big as the BA size (2 * 256 = 512).

Signed-off-by: Shaul Triebitz <shaul.triebitz@intel.com>
Signed-off-by: Luca Coelho <luciano.coelho@intel.com>
This commit is contained in:
Shaul Triebitz 2019-02-27 16:18:11 +02:00 committed by Luca Coelho
parent afc1e3b4fc
commit c30aef01ba
3 changed files with 9 additions and 3 deletions

View File

@ -209,7 +209,8 @@ static const struct iwl_ht_params iwl_22000_ht_params = {
.base_params = &iwl_22000_base_params, \
.csr = &iwl_csr_v1, \
.min_txq_size = 128, \
.gp2_reg_addr = 0xd02c68
.gp2_reg_addr = 0xd02c68, \
.min_256_ba_txq_size = 512
const struct iwl_cfg iwl22000_2ac_cfg_hr = {
.name = "Intel(R) Dual Band Wireless AC 22000",

View File

@ -384,6 +384,8 @@ struct iwl_csr_params {
* @min_txq_size: minimum number of slots required in a TX queue
* @umac_prph_offset: offset to add to UMAC periphery address
* @uhb_supported: ultra high band channels supported
* @min_256_ba_txq_size: minimum number of slots required in a TX queue which
* supports 256 BA aggregation
*
* We enable the driver to be backward compatible wrt. hardware features.
* API differences in uCode shouldn't be handled here but through TLVs
@ -457,6 +459,7 @@ struct iwl_cfg {
u32 fw_mon_smem_cycle_cnt_ptr_addr;
u32 fw_mon_smem_cycle_cnt_ptr_msk;
u32 gp2_reg_addr;
u32 min_256_ba_txq_size;
};
extern const struct iwl_csr_params iwl_csr_v1;

View File

@ -999,7 +999,8 @@ static int iwl_pcie_tx_alloc(struct iwl_trans *trans)
slots_num = max_t(u32, TFD_CMD_SLOTS,
trans->cfg->min_txq_size);
else
slots_num = TFD_TX_CMD_SLOTS;
slots_num = max_t(u32, TFD_TX_CMD_SLOTS,
trans->cfg->min_256_ba_txq_size);
trans_pcie->txq[txq_id] = &trans_pcie->txq_memory[txq_id];
ret = iwl_pcie_txq_alloc(trans, trans_pcie->txq[txq_id],
slots_num, cmd_queue);
@ -1052,7 +1053,8 @@ int iwl_pcie_tx_init(struct iwl_trans *trans)
slots_num = max_t(u32, TFD_CMD_SLOTS,
trans->cfg->min_txq_size);
else
slots_num = TFD_TX_CMD_SLOTS;
slots_num = max_t(u32, TFD_TX_CMD_SLOTS,
trans->cfg->min_256_ba_txq_size);
ret = iwl_pcie_txq_init(trans, trans_pcie->txq[txq_id],
slots_num, cmd_queue);
if (ret) {