mirror of https://gitee.com/openkylin/linux.git
Fixes for omap variants for v5.3-rc cycle
We have another fix to disable voltage switching for am57xx SDIO as the bootrom cannot handle all the voltages after a reset that thought I had already sent a pull request for earlier but forgot. And we also update dra74x iodelay configuration for mmc3 to use the recommended values. Then I noticed we had introduced few new boot warnings with the various recent ti-sysc changes and wanted to fix those. I also noticed we still have too many warnings to be able to spot the real ones easily and fixed up few of those. Sure some of the warnings have been around for a long time and few of the fixes could have waited for the merge window, but having more usable dmesg log level output is a valuable. Other fixes are IO size correction for am335x UARTs that cause issues for at least FreeBSD using the same device tree file that checks that the child IO range is not larger than the parent has. For omap1 ams-delta keyboard we need to fix a irq ack that broke with all the recent gpio changes. And there are also few static checker warning fixes for recent am335x PM changes and ti-sysc driver and one switch fall-though update. -----BEGIN PGP SIGNATURE----- iQJFBAABCAAvFiEEkgNvrZJU/QSQYIcQG9Q+yVyrpXMFAl1U4r8RHHRvbnlAYXRv bWlkZS5jb20ACgkQG9Q+yVyrpXPeSg/+OBq0tWVzAmWTYguIxObg6MR3YCin/wC8 ObX62E3++l8PHV7dmF+oh+c9Ab6kEqD7Czadz7+vYpFuDoNiiNY5SKdthNS7WAdT scTwa40pS2zT4FVJ9NFyRokvFOmtQ4o3LYtjydcWo7Ej0vC0ZyHYirZl+DR9//Cl Omo6WwpHVUm7REbzo+EE7H5yGZWKwKeQ2pZAG7BiQEQGKVgsrb6niiXWbM6Y6H98 B1uqTinxh4nojmj0kZrhjOCOsQyPoHcOt4BzquC5UT/ZgBKldIdGK7y6S8fb7r7o yJdbh1FV7en/baf9YoIORD7pGyaSPkQ+z+mNtepY0Z1ZJ1hSdQ0dyXNZnx5QyWhC i/UoC+/qdtUXlLFkCsf4YvAsTVCD2FjpjMKbXpu8GBE4Z7avx8SSerwqXuFEPPmp 9SpsGprkKXwt811I0BlgpZLr97vxICfckphew52X0ef97AuULoR1HMVjPqBg4/3D 2eKear74SNbrHqixTnXs8HuwSeHLfSYq1QatKRK0dF+4E+a0hu8RAh0HE9uA/uur KyG+CcNNtcMxk3mtXGuSIK9U+3oBs5TN8F+T+K8Zw6HZZvRxToqZ351xApwmR5tK OXAZc4k1APJM7KrxhVfgY4gzSqMXDaFfgtvqjo4Rtt+BYQOaNwIqmFudjmemlJAe 3lhZcqTFwUo= =TsdN -----END PGP SIGNATURE----- Merge tag 'omap-for-v5.3/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap into arm/fixes Fixes for omap variants for v5.3-rc cycle We have another fix to disable voltage switching for am57xx SDIO as the bootrom cannot handle all the voltages after a reset that thought I had already sent a pull request for earlier but forgot. And we also update dra74x iodelay configuration for mmc3 to use the recommended values. Then I noticed we had introduced few new boot warnings with the various recent ti-sysc changes and wanted to fix those. I also noticed we still have too many warnings to be able to spot the real ones easily and fixed up few of those. Sure some of the warnings have been around for a long time and few of the fixes could have waited for the merge window, but having more usable dmesg log level output is a valuable. Other fixes are IO size correction for am335x UARTs that cause issues for at least FreeBSD using the same device tree file that checks that the child IO range is not larger than the parent has. For omap1 ams-delta keyboard we need to fix a irq ack that broke with all the recent gpio changes. And there are also few static checker warning fixes for recent am335x PM changes and ti-sysc driver and one switch fall-though update. * tag 'omap-for-v5.3/fixes-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/tmlind/linux-omap: soc: ti: pm33xx: Make two symbols static soc: ti: pm33xx: Fix static checker warnings ARM: OMAP: dma: Mark expected switch fall-throughs ARM: dts: Fix incomplete dts data for am3 and am4 mmc bus: ti-sysc: Simplify cleanup upon failures in sysc_probe() ARM: OMAP1: ams-delta-fiq: Fix missing irq_ack ARM: dts: dra74x: Fix iodelay configuration for mmc3 ARM: dts: am335x: Fix UARTs length ARM: OMAP2+: Fix omap4 errata warning on other SoCs ARM: dts: Fix incorrect dcan register mapping for am3, am4 and dra7 ARM: dts: Fix flags for gpio7 bus: ti-sysc: Fix using configured sysc mask value bus: ti-sysc: Fix handling of forced idle ARM: OMAP2+: Fix missing SYSC_HAS_RESET_STATUS for dra7 epwmss ARM: dts: am57xx: Disable voltage switching for SD card Link: https://lore.kernel.org/r/pull-1565844391-332885@atomide.com Signed-off-by: Arnd Bergmann <arnd@arndb.de>
This commit is contained in:
Arnd Bergmann
commit
c372740c07
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@ -185,7 +185,7 @@ SYSC_OMAP2_SOFTRESET |
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uart0: serial@0 {
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compatible = "ti,am3352-uart", "ti,omap3-uart";
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clock-frequency = <48000000>;
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reg = <0x0 0x2000>;
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reg = <0x0 0x1000>;
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interrupts = <72>;
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status = "disabled";
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dmas = <&edma 26 0>, <&edma 27 0>;
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@ -934,7 +934,7 @@ SYSC_OMAP2_SOFTRESET |
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uart1: serial@0 {
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compatible = "ti,am3352-uart", "ti,omap3-uart";
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clock-frequency = <48000000>;
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reg = <0x0 0x2000>;
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reg = <0x0 0x1000>;
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interrupts = <73>;
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status = "disabled";
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dmas = <&edma 28 0>, <&edma 29 0>;
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@ -966,7 +966,7 @@ SYSC_OMAP2_SOFTRESET |
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uart2: serial@0 {
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compatible = "ti,am3352-uart", "ti,omap3-uart";
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clock-frequency = <48000000>;
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reg = <0x0 0x2000>;
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reg = <0x0 0x1000>;
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interrupts = <74>;
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status = "disabled";
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dmas = <&edma 30 0>, <&edma 31 0>;
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@ -1614,7 +1614,7 @@ SYSC_OMAP2_SOFTRESET |
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uart3: serial@0 {
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compatible = "ti,am3352-uart", "ti,omap3-uart";
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clock-frequency = <48000000>;
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reg = <0x0 0x2000>;
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reg = <0x0 0x1000>;
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interrupts = <44>;
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status = "disabled";
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};
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@ -1644,7 +1644,7 @@ SYSC_OMAP2_SOFTRESET |
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uart4: serial@0 {
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compatible = "ti,am3352-uart", "ti,omap3-uart";
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clock-frequency = <48000000>;
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reg = <0x0 0x2000>;
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reg = <0x0 0x1000>;
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interrupts = <45>;
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status = "disabled";
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};
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@ -1674,7 +1674,7 @@ SYSC_OMAP2_SOFTRESET |
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uart5: serial@0 {
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compatible = "ti,am3352-uart", "ti,omap3-uart";
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clock-frequency = <48000000>;
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reg = <0x0 0x2000>;
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reg = <0x0 0x1000>;
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interrupts = <46>;
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status = "disabled";
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};
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@ -1758,6 +1758,8 @@ target-module@b0000 { /* 0x481b0000, ap 58 50.0 */
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target-module@cc000 { /* 0x481cc000, ap 60 46.0 */
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compatible = "ti,sysc-omap4", "ti,sysc";
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reg = <0xcc020 0x4>;
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reg-names = "rev";
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ti,hwmods = "d_can0";
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/* Domains (P, C): per_pwrdm, l4ls_clkdm */
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clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN0_CLKCTRL 0>,
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@ -1780,6 +1782,8 @@ dcan0: can@0 {
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target-module@d0000 { /* 0x481d0000, ap 62 42.0 */
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compatible = "ti,sysc-omap4", "ti,sysc";
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reg = <0xd0020 0x4>;
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reg-names = "rev";
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ti,hwmods = "d_can1";
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/* Domains (P, C): per_pwrdm, l4ls_clkdm */
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clocks = <&l4ls_clkctrl AM3_L4LS_D_CAN1_CLKCTRL 0>,
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@ -234,13 +234,33 @@ edma_tptc2: tptc@49a00000 {
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interrupt-names = "edma3_tcerrint";
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};
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mmc3: mmc@47810000 {
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compatible = "ti,omap4-hsmmc";
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target-module@47810000 {
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compatible = "ti,sysc-omap2", "ti,sysc";
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ti,hwmods = "mmc3";
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ti,needs-special-reset;
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interrupts = <29>;
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reg = <0x47810000 0x1000>;
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status = "disabled";
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reg = <0x478102fc 0x4>,
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<0x47810110 0x4>,
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<0x47810114 0x4>;
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reg-names = "rev", "sysc", "syss";
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ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
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SYSC_OMAP2_ENAWAKEUP |
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SYSC_OMAP2_SOFTRESET |
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SYSC_OMAP2_AUTOIDLE)>;
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ti,sysc-sidle = <SYSC_IDLE_FORCE>,
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<SYSC_IDLE_NO>,
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<SYSC_IDLE_SMART>;
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ti,syss-mask = <1>;
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clocks = <&l3s_clkctrl AM3_L3S_MMC3_CLKCTRL 0>;
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clock-names = "fck";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x47810000 0x1000>;
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mmc3: mmc@0 {
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compatible = "ti,omap4-hsmmc";
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ti,needs-special-reset;
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interrupts = <29>;
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reg = <0x0 0x1000>;
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};
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};
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usb: usb@47400000 {
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@ -228,13 +228,33 @@ edma_tptc2: tptc@49a00000 {
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interrupt-names = "edma3_tcerrint";
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};
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mmc3: mmc@47810000 {
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compatible = "ti,omap4-hsmmc";
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reg = <0x47810000 0x1000>;
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target-module@47810000 {
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compatible = "ti,sysc-omap2", "ti,sysc";
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ti,hwmods = "mmc3";
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ti,needs-special-reset;
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interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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reg = <0x478102fc 0x4>,
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<0x47810110 0x4>,
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<0x47810114 0x4>;
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reg-names = "rev", "sysc", "syss";
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ti,sysc-mask = <(SYSC_OMAP2_CLOCKACTIVITY |
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SYSC_OMAP2_ENAWAKEUP |
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SYSC_OMAP2_SOFTRESET |
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SYSC_OMAP2_AUTOIDLE)>;
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ti,sysc-sidle = <SYSC_IDLE_FORCE>,
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<SYSC_IDLE_NO>,
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<SYSC_IDLE_SMART>;
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ti,syss-mask = <1>;
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clocks = <&l3s_clkctrl AM4_L3S_MMC3_CLKCTRL 0>;
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clock-names = "fck";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0x0 0x47810000 0x1000>;
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mmc3: mmc@0 {
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compatible = "ti,omap4-hsmmc";
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ti,needs-special-reset;
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interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
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reg = <0x0 0x1000>;
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};
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};
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sham: sham@53100000 {
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@ -1574,6 +1574,8 @@ timer8: timer@0 {
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target-module@cc000 { /* 0x481cc000, ap 50 46.0 */
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compatible = "ti,sysc-omap4", "ti,sysc";
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reg = <0xcc020 0x4>;
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reg-names = "rev";
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ti,hwmods = "d_can0";
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/* Domains (P, C): per_pwrdm, l4ls_clkdm */
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clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN0_CLKCTRL 0>;
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@ -1593,6 +1595,8 @@ dcan0: can@0 {
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target-module@d0000 { /* 0x481d0000, ap 52 3a.0 */
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compatible = "ti,sysc-omap4", "ti,sysc";
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reg = <0xd0020 0x4>;
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reg-names = "rev";
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ti,hwmods = "d_can1";
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/* Domains (P, C): per_pwrdm, l4ls_clkdm */
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clocks = <&l4ls_clkctrl AM4_L4LS_D_CAN1_CLKCTRL 0>;
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@ -175,14 +175,9 @@ &pcie1_ep {
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};
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&mmc1 {
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pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
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pinctrl-names = "default", "hs";
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pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
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pinctrl-1 = <&mmc1_pins_hs>;
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pinctrl-2 = <&mmc1_pins_sdr12>;
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pinctrl-3 = <&mmc1_pins_sdr25>;
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pinctrl-4 = <&mmc1_pins_sdr50>;
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pinctrl-5 = <&mmc1_pins_ddr50_rev20 &mmc1_iodelay_ddr50_conf>;
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pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
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};
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&mmc2 {
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@ -16,14 +16,9 @@ / {
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};
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&mmc1 {
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pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
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pinctrl-names = "default", "hs";
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pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
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pinctrl-1 = <&mmc1_pins_hs>;
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pinctrl-2 = <&mmc1_pins_sdr12>;
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pinctrl-3 = <&mmc1_pins_sdr25>;
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pinctrl-4 = <&mmc1_pins_sdr50>;
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pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev20_conf>;
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pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
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};
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&mmc2 {
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@ -24,14 +24,9 @@ m25p80@0 {
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};
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&mmc1 {
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pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
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pinctrl-names = "default", "hs";
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pinctrl-0 = <&mmc1_pins_default_no_clk_pu>;
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pinctrl-1 = <&mmc1_pins_hs>;
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pinctrl-2 = <&mmc1_pins_default>;
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pinctrl-3 = <&mmc1_pins_hs>;
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pinctrl-4 = <&mmc1_pins_sdr50>;
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pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_conf>;
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pinctrl-6 = <&mmc1_pins_ddr50 &mmc1_iodelay_sdr104_conf>;
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};
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&mmc2 {
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@ -379,7 +379,7 @@ mcp_rtc: rtc@6f {
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};
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};
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&gpio7 {
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&gpio7_target {
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ti,no-reset-on-init;
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ti,no-idle-on-init;
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};
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@ -430,6 +430,7 @@ &mmc1 {
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bus-width = <4>;
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cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
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no-1-8-v;
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};
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&mmc2 {
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|
|
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@ -16,14 +16,9 @@ &tpd12s015 {
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};
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&mmc1 {
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pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
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pinctrl-names = "default", "hs";
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pinctrl-0 = <&mmc1_pins_default>;
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pinctrl-1 = <&mmc1_pins_hs>;
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pinctrl-2 = <&mmc1_pins_sdr12>;
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pinctrl-3 = <&mmc1_pins_sdr25>;
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pinctrl-4 = <&mmc1_pins_sdr50>;
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pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev11_conf>;
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pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev11_conf>;
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vmmc-supply = <&vdd_3v3>;
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vqmmc-supply = <&ldo1_reg>;
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};
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|
|
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@ -16,14 +16,9 @@ &tpd12s015 {
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|||
};
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&mmc1 {
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pinctrl-names = "default", "hs", "sdr12", "sdr25", "sdr50", "ddr50", "sdr104";
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pinctrl-names = "default", "hs";
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pinctrl-0 = <&mmc1_pins_default>;
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pinctrl-1 = <&mmc1_pins_hs>;
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pinctrl-2 = <&mmc1_pins_sdr12>;
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pinctrl-3 = <&mmc1_pins_sdr25>;
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pinctrl-4 = <&mmc1_pins_sdr50>;
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pinctrl-5 = <&mmc1_pins_ddr50 &mmc1_iodelay_ddr_rev20_conf>;
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pinctrl-6 = <&mmc1_pins_sdr104 &mmc1_iodelay_sdr104_rev20_conf>;
|
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vmmc-supply = <&vdd_3v3>;
|
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vqmmc-supply = <&ldo1_reg>;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -498,7 +498,7 @@ &usb2_phy2 {
|
|||
phy-supply = <&ldousb_reg>;
|
||||
};
|
||||
|
||||
&gpio7 {
|
||||
&gpio7_target {
|
||||
ti,no-reset-on-init;
|
||||
ti,no-idle-on-init;
|
||||
};
|
||||
|
|
|
|||
|
|
@ -1261,7 +1261,7 @@ timer9: timer@0 {
|
|||
};
|
||||
};
|
||||
|
||||
target-module@51000 { /* 0x48051000, ap 45 2e.0 */
|
||||
gpio7_target: target-module@51000 { /* 0x48051000, ap 45 2e.0 */
|
||||
compatible = "ti,sysc-omap2", "ti,sysc";
|
||||
ti,hwmods = "gpio7";
|
||||
reg = <0x51000 0x4>,
|
||||
|
|
@ -3025,7 +3025,7 @@ mcasp8: mcasp@0 {
|
|||
|
||||
target-module@80000 { /* 0x48480000, ap 31 16.0 */
|
||||
compatible = "ti,sysc-omap4", "ti,sysc";
|
||||
reg = <0x80000 0x4>;
|
||||
reg = <0x80020 0x4>;
|
||||
reg-names = "rev";
|
||||
clocks = <&l4per2_clkctrl DRA7_L4PER2_DCAN2_CLKCTRL 0>;
|
||||
clock-names = "fck";
|
||||
|
|
@ -4577,7 +4577,7 @@ target-module@9000 { /* 0x4ae39000, ap 42 70.0 */
|
|||
|
||||
target-module@c000 { /* 0x4ae3c000, ap 30 04.0 */
|
||||
compatible = "ti,sysc-omap4", "ti,sysc";
|
||||
reg = <0xc000 0x4>;
|
||||
reg = <0xc020 0x4>;
|
||||
reg-names = "rev";
|
||||
clocks = <&wkupaon_clkctrl DRA7_WKUPAON_DCAN1_CLKCTRL 0>;
|
||||
clock-names = "fck";
|
||||
|
|
|
|||
|
|
@ -32,7 +32,7 @@
|
|||
*
|
||||
* Datamanual Revisions:
|
||||
*
|
||||
* AM572x Silicon Revision 2.0: SPRS953B, Revised November 2016
|
||||
* AM572x Silicon Revision 2.0: SPRS953F, Revised May 2019
|
||||
* AM572x Silicon Revision 1.1: SPRS915R, Revised November 2016
|
||||
*
|
||||
*/
|
||||
|
|
@ -229,45 +229,45 @@ DRA7XX_CORE_IOPAD(0x37fc, PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE3) /* uart2_r
|
|||
|
||||
mmc3_pins_default: mmc3_pins_default {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
|
||||
DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
|
||||
DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
|
||||
DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
|
||||
DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
|
||||
DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
|
||||
DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
|
||||
DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
|
||||
DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
|
||||
DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
|
||||
DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
|
||||
DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc3_pins_hs: mmc3_pins_hs {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
|
||||
DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
|
||||
DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
|
||||
DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
|
||||
DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
|
||||
DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
|
||||
DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
|
||||
DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
|
||||
DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
|
||||
DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
|
||||
DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
|
||||
DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc3_pins_sdr12: mmc3_pins_sdr12 {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
|
||||
DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
|
||||
DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
|
||||
DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
|
||||
DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
|
||||
DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
|
||||
DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
|
||||
DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
|
||||
DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
|
||||
DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
|
||||
DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
|
||||
DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
mmc3_pins_sdr25: mmc3_pins_sdr25 {
|
||||
pinctrl-single,pins = <
|
||||
DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
|
||||
DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
|
||||
DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
|
||||
DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
|
||||
DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
|
||||
DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
|
||||
DRA7XX_CORE_IOPAD(0x377c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_clk.mmc3_clk */
|
||||
DRA7XX_CORE_IOPAD(0x3780, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_cmd.mmc3_cmd */
|
||||
DRA7XX_CORE_IOPAD(0x3784, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat0.mmc3_dat0 */
|
||||
DRA7XX_CORE_IOPAD(0x3788, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat1.mmc3_dat1 */
|
||||
DRA7XX_CORE_IOPAD(0x378c, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat2.mmc3_dat2 */
|
||||
DRA7XX_CORE_IOPAD(0x3790, (PIN_INPUT_PULLUP | MODE_SELECT | MUX_MODE0)) /* mmc3_dat3.mmc3_dat3 */
|
||||
>;
|
||||
};
|
||||
|
||||
|
|
|
|||
|
|
@ -126,6 +126,8 @@ restart:
|
|||
orr r11, r11, r13 @ mask all requested interrupts
|
||||
str r11, [r12, #OMAP1510_GPIO_INT_MASK]
|
||||
|
||||
str r13, [r12, #OMAP1510_GPIO_INT_STATUS] @ ack all requested interrupts
|
||||
|
||||
ands r10, r13, #KEYBRD_CLK_MASK @ extract keyboard status - set?
|
||||
beq hksw @ no - try next source
|
||||
|
||||
|
|
@ -133,7 +135,6 @@ restart:
|
|||
@@@@@@@@@@@@@@@@@@@@@@
|
||||
@ Keyboard clock FIQ mode interrupt handler
|
||||
@ r10 now contains KEYBRD_CLK_MASK, use it
|
||||
str r10, [r12, #OMAP1510_GPIO_INT_STATUS] @ ack the interrupt
|
||||
bic r11, r11, r10 @ unmask it
|
||||
str r11, [r12, #OMAP1510_GPIO_INT_MASK]
|
||||
|
||||
|
|
|
|||
|
|
@ -70,9 +70,7 @@ static irqreturn_t deferred_fiq(int irq, void *dev_id)
|
|||
* interrupts default to since commit 80ac93c27441
|
||||
* requires interrupt already acked and unmasked.
|
||||
*/
|
||||
if (irq_chip->irq_ack)
|
||||
irq_chip->irq_ack(d);
|
||||
if (irq_chip->irq_unmask)
|
||||
if (!WARN_ON_ONCE(!irq_chip->irq_unmask))
|
||||
irq_chip->irq_unmask(d);
|
||||
}
|
||||
for (; irq_counter[gpio] < fiq_count; irq_counter[gpio]++)
|
||||
|
|
|
|||
|
|
@ -127,6 +127,9 @@ static int __init omap4_sram_init(void)
|
|||
struct device_node *np;
|
||||
struct gen_pool *sram_pool;
|
||||
|
||||
if (!soc_is_omap44xx() && !soc_is_omap54xx())
|
||||
return 0;
|
||||
|
||||
np = of_find_compatible_node(NULL, NULL, "ti,omap4-mpu");
|
||||
if (!np)
|
||||
pr_warn("%s:Unable to allocate sram needed to handle errata I688\n",
|
||||
|
|
|
|||
|
|
@ -379,7 +379,8 @@ static struct omap_hwmod dra7xx_dcan2_hwmod = {
|
|||
static struct omap_hwmod_class_sysconfig dra7xx_epwmss_sysc = {
|
||||
.rev_offs = 0x0,
|
||||
.sysc_offs = 0x4,
|
||||
.sysc_flags = SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET,
|
||||
.sysc_flags = SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET |
|
||||
SYSC_HAS_RESET_STATUS,
|
||||
.idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
|
||||
.sysc_fields = &omap_hwmod_sysc_type2,
|
||||
};
|
||||
|
|
|
|||
|
|
@ -949,7 +949,7 @@ static int sysc_best_idle_mode(u32 idlemodes, u32 *best_mode)
|
|||
*best_mode = SYSC_IDLE_SMART_WKUP;
|
||||
else if (idlemodes & BIT(SYSC_IDLE_SMART))
|
||||
*best_mode = SYSC_IDLE_SMART;
|
||||
else if (idlemodes & SYSC_IDLE_FORCE)
|
||||
else if (idlemodes & BIT(SYSC_IDLE_FORCE))
|
||||
*best_mode = SYSC_IDLE_FORCE;
|
||||
else
|
||||
return -EINVAL;
|
||||
|
|
@ -1267,7 +1267,8 @@ static const struct sysc_revision_quirk sysc_revision_quirks[] = {
|
|||
SYSC_QUIRK("control", 0, 0, 0x10, -1, 0x40000900, 0xffffffff, 0),
|
||||
SYSC_QUIRK("cpgmac", 0, 0x1200, 0x1208, 0x1204, 0x4edb1902,
|
||||
0xffff00f0, 0),
|
||||
SYSC_QUIRK("dcan", 0, 0, -1, -1, 0xffffffff, 0xffffffff, 0),
|
||||
SYSC_QUIRK("dcan", 0, 0x20, -1, -1, 0xa3170504, 0xffffffff, 0),
|
||||
SYSC_QUIRK("dcan", 0, 0x20, -1, -1, 0x4edb1902, 0xffffffff, 0),
|
||||
SYSC_QUIRK("dmic", 0, 0, 0x10, -1, 0x50010000, 0xffffffff, 0),
|
||||
SYSC_QUIRK("dwc3", 0, 0, 0x10, -1, 0x500a0200, 0xffffffff, 0),
|
||||
SYSC_QUIRK("epwmss", 0, 0, 0x4, -1, 0x47400001, 0xffffffff, 0),
|
||||
|
|
@ -1692,10 +1693,7 @@ static int sysc_init_sysc_mask(struct sysc *ddata)
|
|||
if (error)
|
||||
return 0;
|
||||
|
||||
if (val)
|
||||
ddata->cfg.sysc_val = val & ddata->cap->sysc_mask;
|
||||
else
|
||||
ddata->cfg.sysc_val = ddata->cap->sysc_mask;
|
||||
ddata->cfg.sysc_val = val & ddata->cap->sysc_mask;
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
|
@ -2385,27 +2383,27 @@ static int sysc_probe(struct platform_device *pdev)
|
|||
|
||||
error = sysc_init_dts_quirks(ddata);
|
||||
if (error)
|
||||
goto unprepare;
|
||||
return error;
|
||||
|
||||
error = sysc_map_and_check_registers(ddata);
|
||||
if (error)
|
||||
goto unprepare;
|
||||
return error;
|
||||
|
||||
error = sysc_init_sysc_mask(ddata);
|
||||
if (error)
|
||||
goto unprepare;
|
||||
return error;
|
||||
|
||||
error = sysc_init_idlemodes(ddata);
|
||||
if (error)
|
||||
goto unprepare;
|
||||
return error;
|
||||
|
||||
error = sysc_init_syss_mask(ddata);
|
||||
if (error)
|
||||
goto unprepare;
|
||||
return error;
|
||||
|
||||
error = sysc_init_pdata(ddata);
|
||||
if (error)
|
||||
goto unprepare;
|
||||
return error;
|
||||
|
||||
sysc_init_early_quirks(ddata);
|
||||
|
||||
|
|
@ -2415,7 +2413,7 @@ static int sysc_probe(struct platform_device *pdev)
|
|||
|
||||
error = sysc_init_resets(ddata);
|
||||
if (error)
|
||||
return error;
|
||||
goto unprepare;
|
||||
|
||||
error = sysc_init_module(ddata);
|
||||
if (error)
|
||||
|
|
|
|||
|
|
@ -141,7 +141,7 @@ static int __init am43xx_map_gic(void)
|
|||
}
|
||||
|
||||
#ifdef CONFIG_SUSPEND
|
||||
struct wkup_m3_wakeup_src rtc_wake_src(void)
|
||||
static struct wkup_m3_wakeup_src rtc_wake_src(void)
|
||||
{
|
||||
u32 i;
|
||||
|
||||
|
|
@ -157,7 +157,7 @@ struct wkup_m3_wakeup_src rtc_wake_src(void)
|
|||
return rtc_ext_wakeup;
|
||||
}
|
||||
|
||||
int am33xx_rtc_only_idle(unsigned long wfi_flags)
|
||||
static int am33xx_rtc_only_idle(unsigned long wfi_flags)
|
||||
{
|
||||
omap_rtc_power_off_program(&omap_rtc->dev);
|
||||
am33xx_do_wfi_sram(wfi_flags);
|
||||
|
|
@ -252,7 +252,7 @@ static int am33xx_pm_begin(suspend_state_t state)
|
|||
if (state == PM_SUSPEND_MEM && pm_ops->check_off_mode_enable()) {
|
||||
nvmem = devm_nvmem_device_get(&omap_rtc->dev,
|
||||
"omap_rtc_scratch0");
|
||||
if (nvmem)
|
||||
if (!IS_ERR(nvmem))
|
||||
nvmem_device_write(nvmem, RTC_SCRATCH_MAGIC_REG * 4, 4,
|
||||
(void *)&rtc_magic_val);
|
||||
rtc_only_idle = 1;
|
||||
|
|
@ -278,9 +278,12 @@ static void am33xx_pm_end(void)
|
|||
struct nvmem_device *nvmem;
|
||||
|
||||
nvmem = devm_nvmem_device_get(&omap_rtc->dev, "omap_rtc_scratch0");
|
||||
if (IS_ERR(nvmem))
|
||||
return;
|
||||
|
||||
m3_ipc->ops->finish_low_power(m3_ipc);
|
||||
if (rtc_only_idle) {
|
||||
if (retrigger_irq)
|
||||
if (retrigger_irq) {
|
||||
/*
|
||||
* 32 bits of Interrupt Set-Pending correspond to 32
|
||||
* 32 interrupts. Compute the bit offset of the
|
||||
|
|
@ -291,8 +294,10 @@ static void am33xx_pm_end(void)
|
|||
writel_relaxed(1 << (retrigger_irq & 31),
|
||||
gic_dist_base + GIC_INT_SET_PENDING_BASE
|
||||
+ retrigger_irq / 32 * 4);
|
||||
nvmem_device_write(nvmem, RTC_SCRATCH_MAGIC_REG * 4, 4,
|
||||
(void *)&val);
|
||||
}
|
||||
|
||||
nvmem_device_write(nvmem, RTC_SCRATCH_MAGIC_REG * 4, 4,
|
||||
(void *)&val);
|
||||
}
|
||||
|
||||
rtc_only_idle = 0;
|
||||
|
|
@ -415,7 +420,7 @@ static int am33xx_pm_rtc_setup(void)
|
|||
|
||||
nvmem = devm_nvmem_device_get(&omap_rtc->dev,
|
||||
"omap_rtc_scratch0");
|
||||
if (nvmem) {
|
||||
if (!IS_ERR(nvmem)) {
|
||||
nvmem_device_read(nvmem, RTC_SCRATCH_MAGIC_REG * 4,
|
||||
4, (void *)&rtc_magic_val);
|
||||
if ((rtc_magic_val & 0xffff) != RTC_REG_BOOT_MAGIC)
|
||||
|
|
|
|||
Loading…
Reference in New Issue