mirror of https://gitee.com/openkylin/linux.git
tpm_tis: Move ilb_base_addr to tpm_tis_data
Move static variable ilb_base_addr to tpm_tis_data. Cc: stable@vger.kernel.org Signed-off-by: Azhar Shaikh <azhar.shaikh@intel.com> Reviewed-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> Tested-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com> Signed-off-by: Jarkko Sakkinen <jarkko.sakkinen@linux.intel.com>
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0b66f2a05a
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c382babccb
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@ -134,33 +134,24 @@ static int check_acpi_tpm2(struct device *dev)
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#endif
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#endif
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#ifdef CONFIG_X86
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#ifdef CONFIG_X86
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#define INTEL_LEGACY_BLK_BASE_ADDR 0xFED08000
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#define LPC_CNTRL_OFFSET 0x84
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#define ILB_REMAP_SIZE 0x100
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#define LPC_CLKRUN_EN (1 << 2)
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#define LPC_CNTRL_REG_OFFSET 0x84
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#define LPC_CLKRUN_EN (1 << 2)
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static void __iomem *ilb_base_addr;
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static inline bool is_bsw(void)
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{
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return ((boot_cpu_data.x86_model == INTEL_FAM6_ATOM_AIRMONT) ? 1 : 0);
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}
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/**
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/**
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* tpm_platform_begin_xfer() - clear LPC CLKRUN_EN i.e. clocks will be running
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* tpm_platform_begin_xfer() - clear LPC CLKRUN_EN i.e. clocks will be running
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*/
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*/
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static void tpm_platform_begin_xfer(void)
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static void tpm_platform_begin_xfer(struct tpm_tis_data *data)
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{
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{
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u32 clkrun_val;
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u32 clkrun_val;
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if (!is_bsw())
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if (!is_bsw())
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return;
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return;
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clkrun_val = ioread32(ilb_base_addr + LPC_CNTRL_REG_OFFSET);
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clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
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/* Disable LPC CLKRUN# */
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/* Disable LPC CLKRUN# */
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clkrun_val &= ~LPC_CLKRUN_EN;
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clkrun_val &= ~LPC_CLKRUN_EN;
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iowrite32(clkrun_val, ilb_base_addr + LPC_CNTRL_REG_OFFSET);
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iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
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/*
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/*
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* Write any random value on port 0x80 which is on LPC, to make
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* Write any random value on port 0x80 which is on LPC, to make
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@ -173,18 +164,18 @@ static void tpm_platform_begin_xfer(void)
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/**
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/**
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* tpm_platform_end_xfer() - set LPC CLKRUN_EN i.e. clocks can be turned off
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* tpm_platform_end_xfer() - set LPC CLKRUN_EN i.e. clocks can be turned off
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*/
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*/
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static void tpm_platform_end_xfer(void)
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static void tpm_platform_end_xfer(struct tpm_tis_data *data)
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{
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{
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u32 clkrun_val;
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u32 clkrun_val;
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if (!is_bsw())
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if (!is_bsw())
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return;
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return;
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clkrun_val = ioread32(ilb_base_addr + LPC_CNTRL_REG_OFFSET);
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clkrun_val = ioread32(data->ilb_base_addr + LPC_CNTRL_OFFSET);
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/* Enable LPC CLKRUN# */
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/* Enable LPC CLKRUN# */
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clkrun_val |= LPC_CLKRUN_EN;
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clkrun_val |= LPC_CLKRUN_EN;
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iowrite32(clkrun_val, ilb_base_addr + LPC_CNTRL_REG_OFFSET);
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iowrite32(clkrun_val, data->ilb_base_addr + LPC_CNTRL_OFFSET);
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/*
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/*
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* Write any random value on port 0x80 which is on LPC, to make
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* Write any random value on port 0x80 which is on LPC, to make
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@ -194,16 +185,11 @@ static void tpm_platform_end_xfer(void)
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}
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}
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#else
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#else
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static inline bool is_bsw(void)
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static void tpm_platform_begin_xfer(struct tpm_tis_data *data)
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{
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return false;
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}
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static void tpm_platform_begin_xfer(void)
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{
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{
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}
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}
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static void tpm_platform_end_xfer(void)
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static void tpm_platform_end_xfer(struct tpm_tis_data *data)
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{
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{
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}
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}
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#endif
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#endif
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@ -213,12 +199,12 @@ static int tpm_tcg_read_bytes(struct tpm_tis_data *data, u32 addr, u16 len,
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{
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{
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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tpm_platform_begin_xfer();
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tpm_platform_begin_xfer(data);
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while (len--)
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while (len--)
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*result++ = ioread8(phy->iobase + addr);
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*result++ = ioread8(phy->iobase + addr);
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tpm_platform_end_xfer();
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tpm_platform_end_xfer(data);
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return 0;
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return 0;
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}
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}
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@ -228,12 +214,12 @@ static int tpm_tcg_write_bytes(struct tpm_tis_data *data, u32 addr, u16 len,
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{
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{
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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tpm_platform_begin_xfer();
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tpm_platform_begin_xfer(data);
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while (len--)
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while (len--)
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iowrite8(*value++, phy->iobase + addr);
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iowrite8(*value++, phy->iobase + addr);
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tpm_platform_end_xfer();
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tpm_platform_end_xfer(data);
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return 0;
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return 0;
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}
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}
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@ -242,11 +228,11 @@ static int tpm_tcg_read16(struct tpm_tis_data *data, u32 addr, u16 *result)
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{
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{
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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tpm_platform_begin_xfer();
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tpm_platform_begin_xfer(data);
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*result = ioread16(phy->iobase + addr);
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*result = ioread16(phy->iobase + addr);
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tpm_platform_end_xfer();
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tpm_platform_end_xfer(data);
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return 0;
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return 0;
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}
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}
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@ -255,11 +241,11 @@ static int tpm_tcg_read32(struct tpm_tis_data *data, u32 addr, u32 *result)
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{
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{
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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tpm_platform_begin_xfer();
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tpm_platform_begin_xfer(data);
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*result = ioread32(phy->iobase + addr);
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*result = ioread32(phy->iobase + addr);
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tpm_platform_end_xfer();
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tpm_platform_end_xfer(data);
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return 0;
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return 0;
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}
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}
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@ -268,11 +254,11 @@ static int tpm_tcg_write32(struct tpm_tis_data *data, u32 addr, u32 value)
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{
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{
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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struct tpm_tis_tcg_phy *phy = to_tpm_tis_tcg_phy(data);
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tpm_platform_begin_xfer();
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tpm_platform_begin_xfer(data);
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iowrite32(value, phy->iobase + addr);
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iowrite32(value, phy->iobase + addr);
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tpm_platform_end_xfer();
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tpm_platform_end_xfer(data);
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return 0;
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return 0;
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}
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}
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@ -351,9 +337,13 @@ MODULE_DEVICE_TABLE(pnp, tpm_pnp_tbl);
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static void tpm_tis_pnp_remove(struct pnp_dev *dev)
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static void tpm_tis_pnp_remove(struct pnp_dev *dev)
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{
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{
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struct tpm_chip *chip = pnp_get_drvdata(dev);
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struct tpm_chip *chip = pnp_get_drvdata(dev);
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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tpm_chip_unregister(chip);
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tpm_chip_unregister(chip);
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tpm_tis_remove(chip);
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tpm_tis_remove(chip);
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if (is_bsw())
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iounmap(priv->ilb_base_addr);
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}
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}
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static struct pnp_driver tis_pnp_driver = {
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static struct pnp_driver tis_pnp_driver = {
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@ -400,10 +390,14 @@ static int tpm_tis_plat_probe(struct platform_device *pdev)
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static int tpm_tis_plat_remove(struct platform_device *pdev)
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static int tpm_tis_plat_remove(struct platform_device *pdev)
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{
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{
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struct tpm_chip *chip = dev_get_drvdata(&pdev->dev);
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struct tpm_chip *chip = dev_get_drvdata(&pdev->dev);
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struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
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tpm_chip_unregister(chip);
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tpm_chip_unregister(chip);
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tpm_tis_remove(chip);
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tpm_tis_remove(chip);
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if (is_bsw())
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iounmap(priv->ilb_base_addr);
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return 0;
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return 0;
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}
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}
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@ -461,11 +455,6 @@ static int __init init_tis(void)
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if (rc)
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if (rc)
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goto err_force;
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goto err_force;
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#ifdef CONFIG_X86
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if (is_bsw())
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ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR,
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ILB_REMAP_SIZE);
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#endif
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rc = platform_driver_register(&tis_drv);
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rc = platform_driver_register(&tis_drv);
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if (rc)
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if (rc)
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goto err_platform;
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goto err_platform;
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@ -484,10 +473,6 @@ static int __init init_tis(void)
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err_platform:
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err_platform:
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if (force_pdev)
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if (force_pdev)
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platform_device_unregister(force_pdev);
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platform_device_unregister(force_pdev);
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#ifdef CONFIG_X86
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if (is_bsw())
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iounmap(ilb_base_addr);
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#endif
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err_force:
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err_force:
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return rc;
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return rc;
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}
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}
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@ -497,10 +482,6 @@ static void __exit cleanup_tis(void)
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pnp_unregister_driver(&tis_pnp_driver);
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pnp_unregister_driver(&tis_pnp_driver);
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platform_driver_unregister(&tis_drv);
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platform_driver_unregister(&tis_drv);
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#ifdef CONFIG_X86
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if (is_bsw())
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iounmap(ilb_base_addr);
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#endif
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if (force_pdev)
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if (force_pdev)
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platform_device_unregister(force_pdev);
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platform_device_unregister(force_pdev);
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}
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}
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@ -766,6 +766,13 @@ int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
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priv->phy_ops = phy_ops;
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priv->phy_ops = phy_ops;
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dev_set_drvdata(&chip->dev, priv);
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dev_set_drvdata(&chip->dev, priv);
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if (is_bsw()) {
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priv->ilb_base_addr = ioremap(INTEL_LEGACY_BLK_BASE_ADDR,
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ILB_REMAP_SIZE);
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if (!priv->ilb_base_addr)
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return -ENOMEM;
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}
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if (wait_startup(chip, 0) != 0) {
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if (wait_startup(chip, 0) != 0) {
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rc = -ENODEV;
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rc = -ENODEV;
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goto out_err;
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goto out_err;
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@ -856,9 +863,16 @@ int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
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}
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}
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}
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}
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return tpm_chip_register(chip);
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rc = tpm_chip_register(chip);
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if (rc && is_bsw())
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iounmap(priv->ilb_base_addr);
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return rc;
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out_err:
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out_err:
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tpm_tis_remove(chip);
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tpm_tis_remove(chip);
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if (is_bsw())
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iounmap(priv->ilb_base_addr);
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return rc;
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return rc;
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}
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}
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EXPORT_SYMBOL_GPL(tpm_tis_core_init);
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EXPORT_SYMBOL_GPL(tpm_tis_core_init);
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@ -79,6 +79,9 @@ enum tis_defaults {
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#define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
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#define TPM_DID_VID(l) (0x0F00 | ((l) << 12))
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#define TPM_RID(l) (0x0F04 | ((l) << 12))
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#define TPM_RID(l) (0x0F04 | ((l) << 12))
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#define INTEL_LEGACY_BLK_BASE_ADDR 0xFED08000
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#define ILB_REMAP_SIZE 0x100
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enum tpm_tis_flags {
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enum tpm_tis_flags {
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TPM_TIS_ITPM_WORKAROUND = BIT(0),
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TPM_TIS_ITPM_WORKAROUND = BIT(0),
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};
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};
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@ -89,6 +92,7 @@ struct tpm_tis_data {
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int irq;
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int irq;
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bool irq_tested;
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bool irq_tested;
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unsigned int flags;
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unsigned int flags;
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void __iomem *ilb_base_addr;
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wait_queue_head_t int_queue;
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wait_queue_head_t int_queue;
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wait_queue_head_t read_queue;
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wait_queue_head_t read_queue;
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const struct tpm_tis_phy_ops *phy_ops;
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const struct tpm_tis_phy_ops *phy_ops;
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@ -144,6 +148,15 @@ static inline int tpm_tis_write32(struct tpm_tis_data *data, u32 addr,
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return data->phy_ops->write32(data, addr, value);
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return data->phy_ops->write32(data, addr, value);
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}
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}
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static inline bool is_bsw(void)
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{
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#ifdef CONFIG_X86
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return ((boot_cpu_data.x86_model == INTEL_FAM6_ATOM_AIRMONT) ? 1 : 0);
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#else
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return false;
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#endif
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}
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void tpm_tis_remove(struct tpm_chip *chip);
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void tpm_tis_remove(struct tpm_chip *chip);
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int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
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int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
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const struct tpm_tis_phy_ops *phy_ops,
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const struct tpm_tis_phy_ops *phy_ops,
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