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net: hns3: set dividual reset level for all RAS and MSI-X errors 

According to hardware description, reset level that should be
triggered are not consistent in a module. For example, in SSU
common errors, the first two bits has no need to do reset,
but the other bits need global reset.

This patch sets separate reset level for all RAS and MSI-X
interrupts by adding a reset_lvel field in struct hclge_hw_error,
and fixes some incorrect reset level.

Signed-off-by: Weihang Li <liweihang@hisilicon.com>
Signed-off-by: Peng Li <lipeng321@huawei.com>
Signed-off-by: Huazhong Tan <tanhuazhong@huawei.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Weihang Li 2019-04-14 09:47:43 +08:00 committed by David S. Miller
parent 1a49f3c614
commit c41e672d1e
2 changed files with 618 additions and 339 deletions
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956
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.c
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File diff suppressed because it is too large Load Diff

1
drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_err.h
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@ -112,6 +112,7 @@ struct hclge_hw_blk {
struct hclge_hw_error {
u32 int_msk;
const char *msg;
enum hnae3_reset_type reset_level;
};
int hclge_hw_error_set_state(struct hclge_dev *hdev, bool state);