mirror of https://gitee.com/openkylin/linux.git
arm64: dts: rockchip: replace to "max-frequency" instead of "clock-freq-min-max"
In drivers/mmc/core/host.c, there is "max-freqeuncy" property. It should be same behavior, So Use the "max-frequency" instead of "clock-freq-min-max". Signed-off-by: Jaehoon Chung <jh80.chung@samsung.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -347,7 +347,7 @@ &saradc {
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&sdmmc {
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&sdmmc {
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bus-width = <4>;
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bus-width = <4>;
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clock-frequency = <50000000>;
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clock-frequency = <50000000>;
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clock-freq-min-max = <400000 50000000>;
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max-frequency = <50000000>;
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cap-sd-highspeed;
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cap-sd-highspeed;
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card-detect-delay = <200>;
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card-detect-delay = <200>;
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keep-power-in-suspend;
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keep-power-in-suspend;
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@ -231,7 +231,7 @@ xin24m: oscillator {
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sdmmc: dwmmc@ff0c0000 {
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sdmmc: dwmmc@ff0c0000 {
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compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
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compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
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reg = <0x0 0xff0c0000 0x0 0x4000>;
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reg = <0x0 0xff0c0000 0x0 0x4000>;
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clock-freq-min-max = <400000 150000000>;
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max-frequency = <150000000>;
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clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
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clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
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<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
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<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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@ -243,7 +243,7 @@ sdmmc: dwmmc@ff0c0000 {
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sdio0: dwmmc@ff0d0000 {
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sdio0: dwmmc@ff0d0000 {
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compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
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compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
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reg = <0x0 0xff0d0000 0x0 0x4000>;
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reg = <0x0 0xff0d0000 0x0 0x4000>;
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clock-freq-min-max = <400000 150000000>;
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max-frequency = <150000000>;
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clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
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clocks = <&cru HCLK_SDIO0>, <&cru SCLK_SDIO0>,
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<&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
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<&cru SCLK_SDIO0_DRV>, <&cru SCLK_SDIO0_SAMPLE>;
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clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
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clock-names = "biu", "ciu", "ciu_drv", "ciu_sample";
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@ -255,7 +255,7 @@ sdio0: dwmmc@ff0d0000 {
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emmc: dwmmc@ff0f0000 {
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emmc: dwmmc@ff0f0000 {
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compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
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compatible = "rockchip,rk3368-dw-mshc", "rockchip,rk3288-dw-mshc";
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reg = <0x0 0xff0f0000 0x0 0x4000>;
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reg = <0x0 0xff0f0000 0x0 0x4000>;
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clock-freq-min-max = <400000 150000000>;
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max-frequency = <150000000>;
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clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
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clocks = <&cru HCLK_EMMC>, <&cru SCLK_EMMC>,
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<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
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<&cru SCLK_EMMC_DRV>, <&cru SCLK_EMMC_SAMPLE>;
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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@ -235,7 +235,7 @@ sdio0: dwmmc@fe310000 {
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"rockchip,rk3288-dw-mshc";
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"rockchip,rk3288-dw-mshc";
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reg = <0x0 0xfe310000 0x0 0x4000>;
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reg = <0x0 0xfe310000 0x0 0x4000>;
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interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH 0>;
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clock-freq-min-max = <400000 150000000>;
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max-frequency = <150000000>;
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clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
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clocks = <&cru HCLK_SDIO>, <&cru SCLK_SDIO>,
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<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
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<&cru SCLK_SDIO_DRV>, <&cru SCLK_SDIO_SAMPLE>;
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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@ -248,7 +248,7 @@ sdmmc: dwmmc@fe320000 {
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"rockchip,rk3288-dw-mshc";
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"rockchip,rk3288-dw-mshc";
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reg = <0x0 0xfe320000 0x0 0x4000>;
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reg = <0x0 0xfe320000 0x0 0x4000>;
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interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH 0>;
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interrupts = <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH 0>;
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clock-freq-min-max = <400000 150000000>;
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max-frequency = <150000000>;
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clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
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clocks = <&cru HCLK_SDMMC>, <&cru SCLK_SDMMC>,
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<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
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<&cru SCLK_SDMMC_DRV>, <&cru SCLK_SDMMC_SAMPLE>;
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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clock-names = "biu", "ciu", "ciu-drive", "ciu-sample";
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