mirror of https://gitee.com/openkylin/linux.git
dmaengine: k3dma: Add support for dma-channel-mask
Add dma-channel-mask as a property for k3dma, it defines available dma channels which a non-secure mode driver can use. One sample usage of this is in Hi3660 SoC. DMA channel 0 is reserved to lpm3, which is a coprocessor for power management. So as a result, any request in kernel (which runs on main processor and in non-secure mode) should start from at least channel 1. Cc: Dan Williams <dan.j.williams@intel.com> Cc: Vinod Koul <vkoul@kernel.org> Cc: Tanglei Han <hantanglei@huawei.com> Cc: Zhuangluan Su <suzhuangluan@hisilicon.com> Cc: Ryan Grachek <ryan@edited.us> Cc: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org> Cc: Guodong Xu <guodong.xu@linaro.org> Cc: dmaengine@vger.kernel.org Signed-off-by: Li Yu <liyu65@hisilicon.com> [jstultz: Reworked to use a channel mask] Signed-off-by: John Stultz <john.stultz@linaro.org> Signed-off-by: Vinod Koul <vkoul@kernel.org>
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@ -111,6 +111,7 @@ struct k3_dma_dev {
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struct dma_pool *pool;
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u32 dma_channels;
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u32 dma_requests;
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u32 dma_channel_mask;
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unsigned int irq;
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};
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@ -319,6 +320,9 @@ static void k3_dma_tasklet(unsigned long arg)
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/* check new channel request in d->chan_pending */
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spin_lock_irq(&d->lock);
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for (pch = 0; pch < d->dma_channels; pch++) {
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if (!(d->dma_channel_mask & (1 << pch)))
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continue;
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p = &d->phy[pch];
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if (p->vchan == NULL && !list_empty(&d->chan_pending)) {
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@ -336,6 +340,9 @@ static void k3_dma_tasklet(unsigned long arg)
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spin_unlock_irq(&d->lock);
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for (pch = 0; pch < d->dma_channels; pch++) {
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if (!(d->dma_channel_mask & (1 << pch)))
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continue;
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if (pch_alloc & (1 << pch)) {
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p = &d->phy[pch];
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c = p->vchan;
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@ -856,6 +863,13 @@ static int k3_dma_probe(struct platform_device *op)
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"dma-channels", &d->dma_channels);
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of_property_read_u32((&op->dev)->of_node,
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"dma-requests", &d->dma_requests);
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ret = of_property_read_u32((&op->dev)->of_node,
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"dma-channel-mask", &d->dma_channel_mask);
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if (ret) {
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dev_warn(&op->dev,
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"dma-channel-mask doesn't exist, considering all as available.\n");
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d->dma_channel_mask = (u32)~0UL;
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}
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}
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if (!(soc_data->flags & K3_FLAG_NOCLK)) {
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@ -887,8 +901,12 @@ static int k3_dma_probe(struct platform_device *op)
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return -ENOMEM;
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for (i = 0; i < d->dma_channels; i++) {
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struct k3_dma_phy *p = &d->phy[i];
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struct k3_dma_phy *p;
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if (!(d->dma_channel_mask & BIT(i)))
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continue;
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p = &d->phy[i];
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p->idx = i;
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p->base = d->base + i * 0x40;
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}
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